File Index
Files and directories
Sign in
FILE

sun50i-a64-sopine.dtsi

File preview with syntax highlighting.

linux-6.19.14/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi DEVICETREE
  1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2// Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz>
  3// Based on sun50i-a64-pine64.dts, which is:
  4//   Copyright (c) 2016 ARM Ltd.
  5
  6#include "sun50i-a64.dtsi"
  7#include "sun50i-a64-cpu-opp.dtsi"
  8
  9#include <dt-bindings/gpio/gpio.h>
 10
 11&codec_analog {
 12	cpvdd-supply = <&reg_eldo1>;
 13};
 14
 15&cpu0 {
 16	cpu-supply = <&reg_dcdc2>;
 17};
 18
 19&cpu1 {
 20	cpu-supply = <&reg_dcdc2>;
 21};
 22
 23&cpu2 {
 24	cpu-supply = <&reg_dcdc2>;
 25};
 26
 27&cpu3 {
 28	cpu-supply = <&reg_dcdc2>;
 29};
 30
 31&mmc0 {
 32	pinctrl-names = "default";
 33	pinctrl-0 = <&mmc0_pins>;
 34	vmmc-supply = <&reg_dcdc1>;
 35	disable-wp;
 36	bus-width = <4>;
 37	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 push-pull switch */
 38	status = "okay";
 39};
 40
 41&r_rsb {
 42	status = "okay";
 43
 44	axp803: pmic@3a3 {
 45		compatible = "x-powers,axp803";
 46		reg = <0x3a3>;
 47		interrupt-parent = <&r_intc>;
 48		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
 49	};
 50};
 51
 52&spi0  {
 53	status = "okay";
 54
 55	flash@0 {
 56		#address-cells = <1>;
 57		#size-cells = <1>;
 58		compatible = "jedec,spi-nor";
 59		reg = <0>;
 60		spi-max-frequency = <40000000>;
 61	};
 62};
 63
 64#include "axp803.dtsi"
 65
 66&reg_aldo2 {
 67	regulator-always-on;
 68	regulator-min-microvolt = <1800000>;
 69	regulator-max-microvolt = <3300000>;
 70	regulator-name = "vcc-pl";
 71};
 72
 73&reg_aldo3 {
 74	regulator-always-on;
 75	regulator-min-microvolt = <3000000>;
 76	regulator-max-microvolt = <3000000>;
 77	regulator-name = "vcc-pll-avcc";
 78};
 79
 80&reg_dcdc1 {
 81	regulator-always-on;
 82	regulator-min-microvolt = <3300000>;
 83	regulator-max-microvolt = <3300000>;
 84	regulator-name = "vcc-3v3";
 85};
 86
 87&reg_dcdc2 {
 88	regulator-always-on;
 89	regulator-min-microvolt = <1040000>;
 90	regulator-max-microvolt = <1300000>;
 91	regulator-name = "vdd-cpux";
 92};
 93
 94/* DCDC3 is polyphased with DCDC2 */
 95
 96&reg_dcdc5 {
 97	regulator-always-on;
 98	regulator-min-microvolt = <1200000>;
 99	regulator-max-microvolt = <1200000>;
100	regulator-name = "vcc-dram";
101};
102
103&reg_dcdc6 {
104	regulator-always-on;
105	regulator-min-microvolt = <1100000>;
106	regulator-max-microvolt = <1100000>;
107	regulator-name = "vdd-sys";
108};
109
110&reg_eldo1 {
111	regulator-always-on;
112	regulator-min-microvolt = <1800000>;
113	regulator-max-microvolt = <1800000>;
114	regulator-name = "vdd-1v8-lpddr";
115};
116
117&reg_fldo1 {
118	regulator-min-microvolt = <1200000>;
119	regulator-max-microvolt = <1200000>;
120	regulator-name = "vcc-1v2-hsic";
121};
122
123/*
124 * The A64 chip cannot work without this regulator off, although
125 * it seems to be only driving the AR100 core.
126 * Maybe we don't still know well about CPUs domain.
127 */
128&reg_fldo2 {
129	regulator-always-on;
130	regulator-min-microvolt = <1100000>;
131	regulator-max-microvolt = <1100000>;
132	regulator-name = "vdd-cpus";
133};
134
135&reg_rtc_ldo {
136	regulator-name = "vcc-rtc";
137};
~/ Read-only file preview.