spear320.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * arch/arm/mach-spear3xx/spear320.c
  4 *
  5 * SPEAr320 machine source file
  6 *
  7 * Copyright (C) 2009-2012 ST Microelectronics
  8 * Viresh Kumar <vireshk@kernel.org>
  9 */
 10
 11#define pr_fmt(fmt) "SPEAr320: " fmt
 12
 13#include <linux/amba/pl022.h>
 14#include <linux/amba/pl08x.h>
 15#include <linux/amba/serial.h>
 16#include <linux/of_platform.h>
 17#include <asm/mach/arch.h>
 18#include <asm/mach/map.h>
 19#include "generic.h"
 20#include "spear.h"
 21
 22#define SPEAR320_UART1_BASE		UL(0xA3000000)
 23#define SPEAR320_UART2_BASE		UL(0xA4000000)
 24#define SPEAR320_SSP0_BASE		UL(0xA5000000)
 25#define SPEAR320_SSP1_BASE		UL(0xA6000000)
 26
 27/* DMAC platform data's slave info */
 28struct pl08x_channel_data spear320_dma_info[] = {
 29	{
 30		.bus_id = "uart0_rx",
 31		.min_signal = 2,
 32		.max_signal = 2,
 33		.muxval = 0,
 34		.periph_buses = PL08X_AHB1,
 35	}, {
 36		.bus_id = "uart0_tx",
 37		.min_signal = 3,
 38		.max_signal = 3,
 39		.muxval = 0,
 40		.periph_buses = PL08X_AHB1,
 41	}, {
 42		.bus_id = "ssp0_rx",
 43		.min_signal = 8,
 44		.max_signal = 8,
 45		.muxval = 0,
 46		.periph_buses = PL08X_AHB1,
 47	}, {
 48		.bus_id = "ssp0_tx",
 49		.min_signal = 9,
 50		.max_signal = 9,
 51		.muxval = 0,
 52		.periph_buses = PL08X_AHB1,
 53	}, {
 54		.bus_id = "i2c0_rx",
 55		.min_signal = 10,
 56		.max_signal = 10,
 57		.muxval = 0,
 58		.periph_buses = PL08X_AHB1,
 59	}, {
 60		.bus_id = "i2c0_tx",
 61		.min_signal = 11,
 62		.max_signal = 11,
 63		.muxval = 0,
 64		.periph_buses = PL08X_AHB1,
 65	}, {
 66		.bus_id = "irda",
 67		.min_signal = 12,
 68		.max_signal = 12,
 69		.muxval = 0,
 70		.periph_buses = PL08X_AHB1,
 71	}, {
 72		.bus_id = "adc",
 73		.min_signal = 13,
 74		.max_signal = 13,
 75		.muxval = 0,
 76		.periph_buses = PL08X_AHB1,
 77	}, {
 78		.bus_id = "to_jpeg",
 79		.min_signal = 14,
 80		.max_signal = 14,
 81		.muxval = 0,
 82		.periph_buses = PL08X_AHB1,
 83	}, {
 84		.bus_id = "from_jpeg",
 85		.min_signal = 15,
 86		.max_signal = 15,
 87		.muxval = 0,
 88		.periph_buses = PL08X_AHB1,
 89	}, {
 90		.bus_id = "ssp1_rx",
 91		.min_signal = 0,
 92		.max_signal = 0,
 93		.muxval = 1,
 94		.periph_buses = PL08X_AHB2,
 95	}, {
 96		.bus_id = "ssp1_tx",
 97		.min_signal = 1,
 98		.max_signal = 1,
 99		.muxval = 1,
100		.periph_buses = PL08X_AHB2,
101	}, {
102		.bus_id = "ssp2_rx",
103		.min_signal = 2,
104		.max_signal = 2,
105		.muxval = 1,
106		.periph_buses = PL08X_AHB2,
107	}, {
108		.bus_id = "ssp2_tx",
109		.min_signal = 3,
110		.max_signal = 3,
111		.muxval = 1,
112		.periph_buses = PL08X_AHB2,
113	}, {
114		.bus_id = "uart1_rx",
115		.min_signal = 4,
116		.max_signal = 4,
117		.muxval = 1,
118		.periph_buses = PL08X_AHB2,
119	}, {
120		.bus_id = "uart1_tx",
121		.min_signal = 5,
122		.max_signal = 5,
123		.muxval = 1,
124		.periph_buses = PL08X_AHB2,
125	}, {
126		.bus_id = "uart2_rx",
127		.min_signal = 6,
128		.max_signal = 6,
129		.muxval = 1,
130		.periph_buses = PL08X_AHB2,
131	}, {
132		.bus_id = "uart2_tx",
133		.min_signal = 7,
134		.max_signal = 7,
135		.muxval = 1,
136		.periph_buses = PL08X_AHB2,
137	}, {
138		.bus_id = "i2c1_rx",
139		.min_signal = 8,
140		.max_signal = 8,
141		.muxval = 1,
142		.periph_buses = PL08X_AHB2,
143	}, {
144		.bus_id = "i2c1_tx",
145		.min_signal = 9,
146		.max_signal = 9,
147		.muxval = 1,
148		.periph_buses = PL08X_AHB2,
149	}, {
150		.bus_id = "i2c2_rx",
151		.min_signal = 10,
152		.max_signal = 10,
153		.muxval = 1,
154		.periph_buses = PL08X_AHB2,
155	}, {
156		.bus_id = "i2c2_tx",
157		.min_signal = 11,
158		.max_signal = 11,
159		.muxval = 1,
160		.periph_buses = PL08X_AHB2,
161	}, {
162		.bus_id = "i2s_rx",
163		.min_signal = 12,
164		.max_signal = 12,
165		.muxval = 1,
166		.periph_buses = PL08X_AHB2,
167	}, {
168		.bus_id = "i2s_tx",
169		.min_signal = 13,
170		.max_signal = 13,
171		.muxval = 1,
172		.periph_buses = PL08X_AHB2,
173	}, {
174		.bus_id = "rs485_rx",
175		.min_signal = 14,
176		.max_signal = 14,
177		.muxval = 1,
178		.periph_buses = PL08X_AHB2,
179	}, {
180		.bus_id = "rs485_tx",
181		.min_signal = 15,
182		.max_signal = 15,
183		.muxval = 1,
184		.periph_buses = PL08X_AHB2,
185	},
186};
187
188static struct pl022_ssp_controller spear320_ssp_data[] = {
189	{
190		.bus_id = 1,
191		.enable_dma = 1,
192		.dma_filter = pl08x_filter_id,
193		.dma_tx_param = "ssp1_tx",
194		.dma_rx_param = "ssp1_rx",
195	}, {
196		.bus_id = 2,
197		.enable_dma = 1,
198		.dma_filter = pl08x_filter_id,
199		.dma_tx_param = "ssp2_tx",
200		.dma_rx_param = "ssp2_rx",
201	}
202};
203
204static struct amba_pl011_data spear320_uart_data[] = {
205	{
206		.dma_filter = pl08x_filter_id,
207		.dma_tx_param = "uart1_tx",
208		.dma_rx_param = "uart1_rx",
209	}, {
210		.dma_filter = pl08x_filter_id,
211		.dma_tx_param = "uart2_tx",
212		.dma_rx_param = "uart2_rx",
213	},
214};
215
216/* Add SPEAr310 auxdata to pass platform data */
217static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = {
218	OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
219			&pl022_plat_data),
220	OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
221			&pl080_plat_data),
222	OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL,
223			&spear320_ssp_data[0]),
224	OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP1_BASE, NULL,
225			&spear320_ssp_data[1]),
226	OF_DEV_AUXDATA("arm,pl011", SPEAR320_UART1_BASE, NULL,
227			&spear320_uart_data[0]),
228	OF_DEV_AUXDATA("arm,pl011", SPEAR320_UART2_BASE, NULL,
229			&spear320_uart_data[1]),
230	{}
231};
232
233static void __init spear320_dt_init(void)
234{
235	pl080_plat_data.slave_channels = spear320_dma_info;
236	pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear320_dma_info);
237
238	of_platform_default_populate(NULL, spear320_auxdata_lookup, NULL);
239}
240
241static const char * const spear320_dt_board_compat[] = {
242	"st,spear320",
243	"st,spear320-evb",
244	"st,spear320-hmi",
245	NULL,
246};
247
248struct map_desc spear320_io_desc[] __initdata = {
249	{
250		.virtual	= (unsigned long)VA_SPEAR320_SOC_CONFIG_BASE,
251		.pfn		= __phys_to_pfn(SPEAR320_SOC_CONFIG_BASE),
252		.length		= SZ_16M,
253		.type		= MT_DEVICE
254	},
255};
256
257static void __init spear320_map_io(void)
258{
259	iotable_init(spear320_io_desc, ARRAY_SIZE(spear320_io_desc));
260	spear3xx_map_io();
261}
262
263DT_MACHINE_START(SPEAR320_DT, "ST SPEAr320 SoC with Flattened Device Tree")
264	.map_io		=	spear320_map_io,
265	.init_time	=	spear3xx_timer_init,
266	.init_machine	=	spear320_dt_init,
267	.restart	=	spear_restart,
268	.dt_compat	=	spear320_dt_board_compat,
269MACHINE_END