mach-crag6410.c

  1// SPDX-License-Identifier: GPL-2.0
  2//
  3// Copyright 2011 Wolfson Microelectronics plc
  4//	Mark Brown <broonie@opensource.wolfsonmicro.com>
  5//
  6// Copyright 2011 Simtec Electronics
  7//	Ben Dooks <ben@simtec.co.uk>
  8
  9#include <linux/kernel.h>
 10#include <linux/list.h>
 11#include <linux/serial_core.h>
 12#include <linux/serial_s3c.h>
 13#include <linux/platform_device.h>
 14#include <linux/fb.h>
 15#include <linux/io.h>
 16#include <linux/init.h>
 17#include <linux/input-event-codes.h>
 18#include <linux/gpio.h>
 19#include <linux/gpio/machine.h>
 20#include <linux/leds.h>
 21#include <linux/delay.h>
 22#include <linux/mmc/host.h>
 23#include <linux/regulator/machine.h>
 24#include <linux/regulator/fixed.h>
 25#include <linux/pwm.h>
 26#include <linux/pwm_backlight.h>
 27#include <linux/dm9000.h>
 28#include <linux/gpio_keys.h>
 29#include <linux/gpio/driver.h>
 30#include <linux/spi/spi.h>
 31
 32#include <linux/platform_data/pca953x.h>
 33#include <linux/platform_data/s3c-hsotg.h>
 34
 35#include <video/platform_lcd.h>
 36
 37#include <linux/mfd/wm831x/core.h>
 38#include <linux/mfd/wm831x/pdata.h>
 39#include <linux/mfd/wm831x/irq.h>
 40#include <linux/mfd/wm831x/gpio.h>
 41
 42#include <asm/mach/arch.h>
 43#include <asm/mach-types.h>
 44
 45#include <video/samsung_fimd.h>
 46#include "map.h"
 47#include "regs-gpio.h"
 48#include "gpio-samsung.h"
 49#include "irqs.h"
 50
 51#include "fb.h"
 52#include "sdhci.h"
 53#include "gpio-cfg.h"
 54#include <linux/platform_data/spi-s3c64xx.h>
 55
 56#include "keypad.h"
 57#include "devs.h"
 58#include "cpu.h"
 59#include <linux/platform_data/i2c-s3c2410.h>
 60#include "pm.h"
 61
 62#include "s3c64xx.h"
 63#include "crag6410.h"
 64#include "regs-gpio-memport-s3c64xx.h"
 65#include "regs-modem-s3c64xx.h"
 66#include "regs-sys-s3c64xx.h"
 67
 68/* serial port setup */
 69
 70#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
 71#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
 72#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
 73
 74static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
 75	[0] = {
 76		.hwport		= 0,
 77		.flags		= 0,
 78		.ucon		= UCON,
 79		.ulcon		= ULCON,
 80		.ufcon		= UFCON,
 81	},
 82	[1] = {
 83		.hwport		= 1,
 84		.flags		= 0,
 85		.ucon		= UCON,
 86		.ulcon		= ULCON,
 87		.ufcon		= UFCON,
 88	},
 89	[2] = {
 90		.hwport		= 2,
 91		.flags		= 0,
 92		.ucon		= UCON,
 93		.ulcon		= ULCON,
 94		.ufcon		= UFCON,
 95	},
 96	[3] = {
 97		.hwport		= 3,
 98		.flags		= 0,
 99		.ucon		= UCON,
100		.ulcon		= ULCON,
101		.ufcon		= UFCON,
102	},
103};
104
105static struct pwm_lookup crag6410_pwm_lookup[] = {
106	PWM_LOOKUP("samsung-pwm", 0, "pwm-backlight", NULL, 100000,
107		   PWM_POLARITY_NORMAL),
108};
109
110static struct platform_pwm_backlight_data crag6410_backlight_data = {
111	.max_brightness	= 1000,
112	.dft_brightness	= 600,
113};
114
115static struct platform_device crag6410_backlight_device = {
116	.name		= "pwm-backlight",
117	.id		= -1,
118	.dev		= {
119		.parent	= &samsung_device_pwm.dev,
120		.platform_data = &crag6410_backlight_data,
121	},
122};
123
124static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
125{
126	pr_debug("%s: setting power %d\n", __func__, power);
127
128	if (power) {
129		gpio_set_value(S3C64XX_GPB(0), 1);
130		msleep(1);
131		s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
132	} else {
133		gpio_direction_output(S3C64XX_GPF(14), 0);
134		gpio_set_value(S3C64XX_GPB(0), 0);
135	}
136}
137
138static struct platform_device crag6410_lcd_powerdev = {
139	.name			= "platform-lcd",
140	.id			= -1,
141	.dev.parent		= &s3c_device_fb.dev,
142	.dev.platform_data	= &(struct plat_lcd_data) {
143		.set_power	= crag6410_lcd_power_set,
144	},
145};
146
147/* 640x480 URT */
148static struct s3c_fb_pd_win crag6410_fb_win0 = {
149	.max_bpp	= 32,
150	.default_bpp	= 16,
151	.xres		= 640,
152	.yres		= 480,
153	.virtual_y	= 480 * 2,
154	.virtual_x	= 640,
155};
156
157static struct fb_videomode crag6410_lcd_timing = {
158	.left_margin	= 150,
159	.right_margin	= 80,
160	.upper_margin	= 40,
161	.lower_margin	= 5,
162	.hsync_len	= 40,
163	.vsync_len	= 5,
164	.xres		= 640,
165	.yres		= 480,
166};
167
168/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
169static struct s3c_fb_platdata crag6410_lcd_pdata = {
170	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
171	.vtiming	= &crag6410_lcd_timing,
172	.win[0]		= &crag6410_fb_win0,
173	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
174	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
175};
176
177/* 2x6 keypad */
178
179static uint32_t crag6410_keymap[] = {
180	/* KEY(row, col, keycode) */
181	KEY(0, 0, KEY_VOLUMEUP),
182	KEY(0, 1, KEY_HOME),
183	KEY(0, 2, KEY_VOLUMEDOWN),
184	KEY(0, 3, KEY_HELP),
185	KEY(0, 4, KEY_MENU),
186	KEY(0, 5, KEY_MEDIA),
187	KEY(1, 0, 232),
188	KEY(1, 1, KEY_DOWN),
189	KEY(1, 2, KEY_LEFT),
190	KEY(1, 3, KEY_UP),
191	KEY(1, 4, KEY_RIGHT),
192	KEY(1, 5, KEY_CAMERA),
193};
194
195static struct matrix_keymap_data crag6410_keymap_data = {
196	.keymap		= crag6410_keymap,
197	.keymap_size	= ARRAY_SIZE(crag6410_keymap),
198};
199
200static struct samsung_keypad_platdata crag6410_keypad_data = {
201	.keymap_data	= &crag6410_keymap_data,
202	.rows		= 2,
203	.cols		= 6,
204};
205
206static struct gpio_keys_button crag6410_gpio_keys[] = {
207	[0] = {
208		.code	= KEY_SUSPEND,
209		.gpio	= S3C64XX_GPL(10),	/* EINT 18 */
210		.type	= EV_KEY,
211		.wakeup	= 1,
212		.active_low = 1,
213	},
214	[1] = {
215		.code	= SW_FRONT_PROXIMITY,
216		.gpio	= S3C64XX_GPN(11),	/* EINT 11 */
217		.type	= EV_SW,
218	},
219};
220
221static struct gpio_keys_platform_data crag6410_gpio_keydata = {
222	.buttons	= crag6410_gpio_keys,
223	.nbuttons	= ARRAY_SIZE(crag6410_gpio_keys),
224};
225
226static struct platform_device crag6410_gpio_keydev = {
227	.name		= "gpio-keys",
228	.id		= 0,
229	.dev.platform_data = &crag6410_gpio_keydata,
230};
231
232static struct resource crag6410_dm9k_resource[] = {
233	[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
234	[1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
235	[2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
236				| IORESOURCE_IRQ_HIGHLEVEL),
237};
238
239static struct dm9000_plat_data mini6410_dm9k_pdata = {
240	.flags	= DM9000_PLATF_16BITONLY,
241};
242
243static struct platform_device crag6410_dm9k_device = {
244	.name		= "dm9000",
245	.id		= -1,
246	.num_resources	= ARRAY_SIZE(crag6410_dm9k_resource),
247	.resource	= crag6410_dm9k_resource,
248	.dev.platform_data = &mini6410_dm9k_pdata,
249};
250
251static struct resource crag6410_mmgpio_resource[] = {
252	[0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
253};
254
255static const struct property_entry crag6410_mmgpio_props[] = {
256	PROPERTY_ENTRY_U32("gpio-mmio,base", MMGPIO_GPIO_BASE),
257	{ }
258};
259
260static struct platform_device_info crag6410_mmgpio_devinfo = {
261	.name		= "basic-mmio-gpio",
262	.id		= -1,
263	.res		= crag6410_mmgpio_resource,
264	.num_res	= ARRAY_SIZE(crag6410_mmgpio_resource),
265	.properties	= crag6410_mmgpio_props,
266};
267
268static struct platform_device speyside_device = {
269	.name		= "speyside",
270	.id		= -1,
271};
272
273static struct platform_device lowland_device = {
274	.name		= "lowland",
275	.id		= -1,
276};
277
278static struct platform_device tobermory_device = {
279	.name		= "tobermory",
280	.id		= -1,
281};
282
283static struct platform_device littlemill_device = {
284	.name		= "littlemill",
285	.id		= -1,
286};
287
288static struct platform_device bells_wm2200_device = {
289	.name		= "bells",
290	.id		= 0,
291};
292
293static struct platform_device bells_wm5102_device = {
294	.name		= "bells",
295	.id		= 1,
296};
297
298static struct platform_device bells_wm5110_device = {
299	.name		= "bells",
300	.id		= 2,
301};
302
303static struct regulator_consumer_supply wallvdd_consumers[] = {
304	REGULATOR_SUPPLY("SPKVDD", "1-001a"),
305	REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
306	REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
307	REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
308	REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
309
310	REGULATOR_SUPPLY("SPKVDDL", "spi0.1"),
311	REGULATOR_SUPPLY("SPKVDDR", "spi0.1"),
312
313	REGULATOR_SUPPLY("DC1VDD", "0-0034"),
314	REGULATOR_SUPPLY("DC2VDD", "0-0034"),
315	REGULATOR_SUPPLY("DC3VDD", "0-0034"),
316	REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
317	REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
318	REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
319	REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
320	REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
321	REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
322	REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
323	REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
324	REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
325	REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
326
327	REGULATOR_SUPPLY("DC1VDD", "1-0034"),
328	REGULATOR_SUPPLY("DC2VDD", "1-0034"),
329	REGULATOR_SUPPLY("DC3VDD", "1-0034"),
330	REGULATOR_SUPPLY("LDO1VDD", "1-0034"),
331	REGULATOR_SUPPLY("LDO2VDD", "1-0034"),
332	REGULATOR_SUPPLY("LDO4VDD", "1-0034"),
333	REGULATOR_SUPPLY("LDO5VDD", "1-0034"),
334	REGULATOR_SUPPLY("LDO6VDD", "1-0034"),
335	REGULATOR_SUPPLY("LDO7VDD", "1-0034"),
336	REGULATOR_SUPPLY("LDO8VDD", "1-0034"),
337	REGULATOR_SUPPLY("LDO9VDD", "1-0034"),
338	REGULATOR_SUPPLY("LDO10VDD", "1-0034"),
339	REGULATOR_SUPPLY("LDO11VDD", "1-0034"),
340};
341
342static struct regulator_init_data wallvdd_data = {
343	.constraints = {
344		.always_on = 1,
345	},
346	.num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
347	.consumer_supplies = wallvdd_consumers,
348};
349
350static struct fixed_voltage_config wallvdd_pdata = {
351	.supply_name = "WALLVDD",
352	.microvolts = 5000000,
353	.init_data = &wallvdd_data,
354};
355
356static struct platform_device wallvdd_device = {
357	.name		= "reg-fixed-voltage",
358	.id		= -1,
359	.dev = {
360		.platform_data = &wallvdd_pdata,
361	},
362};
363
364static struct platform_device *crag6410_devices[] __initdata = {
365	&s3c_device_hsmmc0,
366	&s3c_device_hsmmc2,
367	&s3c_device_i2c0,
368	&s3c_device_i2c1,
369	&s3c_device_fb,
370	&s3c_device_ohci,
371	&s3c_device_usb_hsotg,
372	&samsung_device_pwm,
373	&s3c64xx_device_iis0,
374	&s3c64xx_device_iis1,
375	&samsung_device_keypad,
376	&crag6410_gpio_keydev,
377	&crag6410_dm9k_device,
378	&s3c64xx_device_spi0,
379	&crag6410_lcd_powerdev,
380	&crag6410_backlight_device,
381	&speyside_device,
382	&tobermory_device,
383	&littlemill_device,
384	&lowland_device,
385	&bells_wm2200_device,
386	&bells_wm5102_device,
387	&bells_wm5110_device,
388	&wallvdd_device,
389};
390
391static struct pca953x_platform_data crag6410_pca_data = {
392	.gpio_base	= PCA935X_GPIO_BASE,
393	.irq_base	= -1,
394};
395
396/* VDDARM is controlled by DVS1 connected to GPK(0) */
397static struct wm831x_buckv_pdata vddarm_pdata = {
398	.dvs_control_src = 1,
399};
400
401static struct regulator_consumer_supply vddarm_consumers[] = {
402	REGULATOR_SUPPLY("vddarm", NULL),
403};
404
405static struct regulator_init_data vddarm = {
406	.constraints = {
407		.name = "VDDARM",
408		.min_uV = 1000000,
409		.max_uV = 1300000,
410		.always_on = 1,
411		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
412	},
413	.num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
414	.consumer_supplies = vddarm_consumers,
415	.supply_regulator = "WALLVDD",
416	.driver_data = &vddarm_pdata,
417};
418
419static struct regulator_consumer_supply vddint_consumers[] = {
420	REGULATOR_SUPPLY("vddint", NULL),
421};
422
423static struct regulator_init_data vddint = {
424	.constraints = {
425		.name = "VDDINT",
426		.min_uV = 1000000,
427		.max_uV = 1200000,
428		.always_on = 1,
429		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
430	},
431	.num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
432	.consumer_supplies = vddint_consumers,
433	.supply_regulator = "WALLVDD",
434};
435
436static struct regulator_init_data vddmem = {
437	.constraints = {
438		.name = "VDDMEM",
439		.always_on = 1,
440	},
441};
442
443static struct regulator_init_data vddsys = {
444	.constraints = {
445		.name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
446		.always_on = 1,
447	},
448};
449
450static struct regulator_consumer_supply vddmmc_consumers[] = {
451	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
452	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
453	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
454};
455
456static struct regulator_init_data vddmmc = {
457	.constraints = {
458		.name = "VDDMMC,UH",
459		.always_on = 1,
460	},
461	.num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
462	.consumer_supplies = vddmmc_consumers,
463	.supply_regulator = "WALLVDD",
464};
465
466static struct regulator_init_data vddotgi = {
467	.constraints = {
468		.name = "VDDOTGi",
469		.always_on = 1,
470	},
471	.supply_regulator = "WALLVDD",
472};
473
474static struct regulator_init_data vddotg = {
475	.constraints = {
476		.name = "VDDOTG",
477		.always_on = 1,
478	},
479	.supply_regulator = "WALLVDD",
480};
481
482static struct regulator_init_data vddhi = {
483	.constraints = {
484		.name = "VDDHI",
485		.always_on = 1,
486	},
487	.supply_regulator = "WALLVDD",
488};
489
490static struct regulator_init_data vddadc = {
491	.constraints = {
492		.name = "VDDADC,VDDDAC",
493		.always_on = 1,
494	},
495	.supply_regulator = "WALLVDD",
496};
497
498static struct regulator_init_data vddmem0 = {
499	.constraints = {
500		.name = "VDDMEM0",
501		.always_on = 1,
502	},
503	.supply_regulator = "WALLVDD",
504};
505
506static struct regulator_init_data vddpll = {
507	.constraints = {
508		.name = "VDDPLL",
509		.always_on = 1,
510	},
511	.supply_regulator = "WALLVDD",
512};
513
514static struct regulator_init_data vddlcd = {
515	.constraints = {
516		.name = "VDDLCD",
517		.always_on = 1,
518	},
519	.supply_regulator = "WALLVDD",
520};
521
522static struct regulator_init_data vddalive = {
523	.constraints = {
524		.name = "VDDALIVE",
525		.always_on = 1,
526	},
527	.supply_regulator = "WALLVDD",
528};
529
530static struct wm831x_backup_pdata banff_backup_pdata = {
531	.charger_enable = 1,
532	.vlim = 2500,  /* mV */
533	.ilim = 200,   /* uA */
534};
535
536static struct wm831x_status_pdata banff_red_led = {
537	.name = "banff:red:",
538	.default_src = WM831X_STATUS_MANUAL,
539};
540
541static struct wm831x_status_pdata banff_green_led = {
542	.name = "banff:green:",
543	.default_src = WM831X_STATUS_MANUAL,
544};
545
546static struct wm831x_touch_pdata touch_pdata = {
547	.data_irq = S3C_EINT(26),
548	.pd_irq = S3C_EINT(27),
549};
550
551static struct wm831x_pdata crag_pmic_pdata = {
552	.wm831x_num = 1,
553	.irq_base = BANFF_PMIC_IRQ_BASE,
554	.gpio_base = BANFF_PMIC_GPIO_BASE,
555	.soft_shutdown = true,
556
557	.backup = &banff_backup_pdata,
558
559	.gpio_defaults = {
560		/* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
561		[4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
562		/* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
563		[10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
564		/* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
565		[11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
566	},
567
568	.dcdc = {
569		&vddarm,  /* DCDC1 */
570		&vddint,  /* DCDC2 */
571		&vddmem,  /* DCDC3 */
572	},
573
574	.ldo = {
575		&vddsys,   /* LDO1 */
576		&vddmmc,   /* LDO2 */
577		NULL,      /* LDO3 */
578		&vddotgi,  /* LDO4 */
579		&vddotg,   /* LDO5 */
580		&vddhi,    /* LDO6 */
581		&vddadc,   /* LDO7 */
582		&vddmem0,  /* LDO8 */
583		&vddpll,   /* LDO9 */
584		&vddlcd,   /* LDO10 */
585		&vddalive, /* LDO11 */
586	},
587
588	.status = {
589		&banff_green_led,
590		&banff_red_led,
591	},
592
593	.touch = &touch_pdata,
594};
595
596/*
597 * VDDARM is eventually ending up as a regulator hanging on the MFD cell device
598 * "wm831x-buckv.1" spawn from drivers/mfd/wm831x-core.c.
599 *
600 * From the note on the platform data we can see that this is clearly DVS1
601 * and assigned as dcdc1 resource to the MFD core which sets .id of the cell
602 * spawning the DVS1 platform device to 1, then the cell platform device
603 * name is calculated from 10*instance + id resulting in the device name
604 * "wm831x-buckv.11"
605 */
606static struct gpiod_lookup_table crag_pmic_gpiod_table = {
607	.dev_id = "wm831x-buckv.11",
608	.table = {
609		GPIO_LOOKUP("GPIOK", 0, "dvs", GPIO_ACTIVE_HIGH),
610		{ },
611	},
612};
613
614static struct i2c_board_info i2c_devs0[] = {
615	{ I2C_BOARD_INFO("24c08", 0x50), },
616	{ I2C_BOARD_INFO("tca6408", 0x20),
617	  .platform_data = &crag6410_pca_data,
618	},
619	{ I2C_BOARD_INFO("wm8312", 0x34),
620	  .platform_data = &crag_pmic_pdata,
621	  .irq = S3C_EINT(23),
622	},
623};
624
625static struct s3c2410_platform_i2c i2c0_pdata = {
626	.frequency = 400000,
627};
628
629static struct regulator_consumer_supply pvdd_1v2_consumers[] = {
630	REGULATOR_SUPPLY("DCVDD", "spi0.0"),
631	REGULATOR_SUPPLY("AVDD", "spi0.0"),
632	REGULATOR_SUPPLY("AVDD", "spi0.1"),
633};
634
635static struct regulator_init_data pvdd_1v2 = {
636	.constraints = {
637		.name = "PVDD_1V2",
638		.valid_ops_mask = REGULATOR_CHANGE_STATUS,
639	},
640
641	.consumer_supplies = pvdd_1v2_consumers,
642	.num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
643};
644
645static struct regulator_consumer_supply pvdd_1v8_consumers[] = {
646	REGULATOR_SUPPLY("LDOVDD", "1-001a"),
647	REGULATOR_SUPPLY("PLLVDD", "1-001a"),
648	REGULATOR_SUPPLY("DBVDD", "1-001a"),
649	REGULATOR_SUPPLY("DBVDD1", "1-001a"),
650	REGULATOR_SUPPLY("DBVDD2", "1-001a"),
651	REGULATOR_SUPPLY("DBVDD3", "1-001a"),
652	REGULATOR_SUPPLY("CPVDD", "1-001a"),
653	REGULATOR_SUPPLY("AVDD2", "1-001a"),
654	REGULATOR_SUPPLY("DCVDD", "1-001a"),
655	REGULATOR_SUPPLY("AVDD", "1-001a"),
656	REGULATOR_SUPPLY("DBVDD", "spi0.0"),
657
658	REGULATOR_SUPPLY("DBVDD", "1-003a"),
659	REGULATOR_SUPPLY("LDOVDD", "1-003a"),
660	REGULATOR_SUPPLY("CPVDD", "1-003a"),
661	REGULATOR_SUPPLY("AVDD", "1-003a"),
662	REGULATOR_SUPPLY("DBVDD1", "spi0.1"),
663	REGULATOR_SUPPLY("DBVDD2", "spi0.1"),
664	REGULATOR_SUPPLY("DBVDD3", "spi0.1"),
665	REGULATOR_SUPPLY("LDOVDD", "spi0.1"),
666	REGULATOR_SUPPLY("CPVDD", "spi0.1"),
667};
668
669static struct regulator_init_data pvdd_1v8 = {
670	.constraints = {
671		.name = "PVDD_1V8",
672		.always_on = 1,
673	},
674
675	.consumer_supplies = pvdd_1v8_consumers,
676	.num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
677};
678
679static struct regulator_consumer_supply pvdd_3v3_consumers[] = {
680	REGULATOR_SUPPLY("MICVDD", "1-001a"),
681	REGULATOR_SUPPLY("AVDD1", "1-001a"),
682};
683
684static struct regulator_init_data pvdd_3v3 = {
685	.constraints = {
686		.name = "PVDD_3V3",
687		.always_on = 1,
688	},
689
690	.consumer_supplies = pvdd_3v3_consumers,
691	.num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
692};
693
694static struct wm831x_pdata glenfarclas_pmic_pdata = {
695	.wm831x_num = 2,
696	.irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
697	.gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
698	.soft_shutdown = true,
699
700	.gpio_defaults = {
701		/* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
702		[0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
703		[1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
704		[2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
705	},
706
707	.dcdc = {
708		&pvdd_1v2,  /* DCDC1 */
709		&pvdd_1v8,  /* DCDC2 */
710		&pvdd_3v3,  /* DCDC3 */
711	},
712
713	.disable_touch = true,
714};
715
716static struct gpiod_lookup_table crag_wm1250_ev1_gpiod_table = {
717	/* The WM1250-EV1 is device 0027 on I2C bus 1 */
718	.dev_id = "1-0027",
719	.table = {
720		GPIO_LOOKUP("GPION", 12, "clk-ena", GPIO_ACTIVE_HIGH),
721		GPIO_LOOKUP("GPIOL", 12, "clk-sel0", GPIO_ACTIVE_HIGH),
722		GPIO_LOOKUP("GPIOL", 13, "clk-sel1", GPIO_ACTIVE_HIGH),
723		GPIO_LOOKUP("GPIOL", 14, "osr", GPIO_ACTIVE_HIGH),
724		GPIO_LOOKUP("GPIOL", 8, "master", GPIO_ACTIVE_HIGH),
725		{ },
726	},
727};
728
729static struct i2c_board_info i2c_devs1[] = {
730	{ I2C_BOARD_INFO("wm8311", 0x34),
731	  .irq = S3C_EINT(0),
732	  .platform_data = &glenfarclas_pmic_pdata },
733
734	{ I2C_BOARD_INFO("wlf-gf-module", 0x20) },
735	{ I2C_BOARD_INFO("wlf-gf-module", 0x22) },
736	{ I2C_BOARD_INFO("wlf-gf-module", 0x24) },
737	{ I2C_BOARD_INFO("wlf-gf-module", 0x25) },
738	{ I2C_BOARD_INFO("wlf-gf-module", 0x26) },
739	{ I2C_BOARD_INFO("wm1250-ev1", 0x27), },
740};
741
742static struct s3c2410_platform_i2c i2c1_pdata = {
743	.frequency = 400000,
744	.bus_num = 1,
745};
746
747static void __init crag6410_map_io(void)
748{
749	s3c64xx_init_io(NULL, 0);
750	s3c64xx_set_xtal_freq(12000000);
751	s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
752	s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4);
753
754	/* LCD type and Bypass set by bootloader */
755}
756
757static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
758	.max_width		= 4,
759	.cd_type		= S3C_SDHCI_CD_PERMANENT,
760	.host_caps		= MMC_CAP_POWER_OFF_CARD,
761};
762
763static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
764{
765	/* Set all the necessary GPG pins to special-function 2 */
766	s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
767
768	/* force card-detected for prototype 0 */
769	s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
770}
771
772static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
773	.max_width		= 4,
774	.cd_type		= S3C_SDHCI_CD_INTERNAL,
775	.cfg_gpio		= crag6410_cfg_sdhci0,
776	.host_caps		= MMC_CAP_POWER_OFF_CARD,
777};
778
779static const struct gpio_led gpio_leds[] = {
780	{
781		.name = "d13:green:",
782		.gpio = MMGPIO_GPIO_BASE + 0,
783		.default_state = LEDS_GPIO_DEFSTATE_ON,
784	},
785	{
786		.name = "d14:green:",
787		.gpio = MMGPIO_GPIO_BASE + 1,
788		.default_state = LEDS_GPIO_DEFSTATE_ON,
789	},
790	{
791		.name = "d15:green:",
792		.gpio = MMGPIO_GPIO_BASE + 2,
793		.default_state = LEDS_GPIO_DEFSTATE_ON,
794	},
795	{
796		.name = "d16:green:",
797		.gpio = MMGPIO_GPIO_BASE + 3,
798		.default_state = LEDS_GPIO_DEFSTATE_ON,
799	},
800	{
801		.name = "d17:green:",
802		.gpio = MMGPIO_GPIO_BASE + 4,
803		.default_state = LEDS_GPIO_DEFSTATE_ON,
804	},
805	{
806		.name = "d18:green:",
807		.gpio = MMGPIO_GPIO_BASE + 5,
808		.default_state = LEDS_GPIO_DEFSTATE_ON,
809	},
810	{
811		.name = "d19:green:",
812		.gpio = MMGPIO_GPIO_BASE + 6,
813		.default_state = LEDS_GPIO_DEFSTATE_ON,
814	},
815	{
816		.name = "d20:green:",
817		.gpio = MMGPIO_GPIO_BASE + 7,
818		.default_state = LEDS_GPIO_DEFSTATE_ON,
819	},
820};
821
822static const struct gpio_led_platform_data gpio_leds_pdata = {
823	.leds = gpio_leds,
824	.num_leds = ARRAY_SIZE(gpio_leds),
825};
826
827static struct dwc2_hsotg_plat crag6410_hsotg_pdata;
828
829static struct gpiod_lookup_table crag_spi0_gpiod_table = {
830	.dev_id = "s3c6410-spi.0",
831	.table = {
832		GPIO_LOOKUP_IDX("GPIOC", 3, "cs", 0, GPIO_ACTIVE_LOW),
833		GPIO_LOOKUP_IDX("GPION", 5, "cs", 1, GPIO_ACTIVE_LOW),
834		{ },
835	},
836};
837
838static void __init crag6410_machine_init(void)
839{
840	/* Open drain IRQs need pullups */
841	s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
842	s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
843
844	gpio_request(S3C64XX_GPB(0), "LCD power");
845	gpio_direction_output(S3C64XX_GPB(0), 0);
846
847	gpio_request(S3C64XX_GPF(14), "LCD PWM");
848	gpio_direction_output(S3C64XX_GPF(14), 0);  /* turn off */
849
850	gpio_request(S3C64XX_GPB(1), "SD power");
851	gpio_direction_output(S3C64XX_GPB(1), 0);
852
853	gpio_request(S3C64XX_GPF(10), "nRESETSEL");
854	gpio_direction_output(S3C64XX_GPF(10), 1);
855
856	s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
857	s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
858
859	s3c_i2c0_set_platdata(&i2c0_pdata);
860	s3c_i2c1_set_platdata(&i2c1_pdata);
861	s3c_fb_set_platdata(&crag6410_lcd_pdata);
862	dwc2_hsotg_set_platdata(&crag6410_hsotg_pdata);
863
864	gpiod_add_lookup_table(&crag_pmic_gpiod_table);
865	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
866	gpiod_add_lookup_table(&crag_wm1250_ev1_gpiod_table);
867	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
868
869	samsung_keypad_set_platdata(&crag6410_keypad_data);
870
871	gpiod_add_lookup_table(&crag_spi0_gpiod_table);
872	s3c64xx_spi0_set_platdata(0, 2);
873
874	pwm_add_table(crag6410_pwm_lookup, ARRAY_SIZE(crag6410_pwm_lookup));
875	platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
876	platform_device_register_full(&crag6410_mmgpio_devinfo);
877
878	gpio_led_register_device(-1, &gpio_leds_pdata);
879
880	regulator_has_full_constraints();
881
882	s3c64xx_pm_init();
883}
884
885MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
886	/* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
887	.atag_offset	= 0x100,
888	.nr_irqs	= S3C64XX_NR_IRQS,
889	.init_irq	= s3c6410_init_irq,
890	.map_io		= crag6410_map_io,
891	.init_machine	= crag6410_machine_init,
892	.init_time	= s3c64xx_timer_init,
893MACHINE_END