gpio-cfg.h

  1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * Copyright 2008 Openmoko, Inc.
  4 * Copyright 2008 Simtec Electronics
  5 *	http://armlinux.simtec.co.uk/
  6 *	Ben Dooks <ben@simtec.co.uk>
  7 *
  8 * S3C Platform - GPIO pin configuration
  9 */
 10
 11/* This file contains the necessary definitions to get the basic gpio
 12 * pin configuration done such as setting a pin to input or output or
 13 * changing the pull-{up,down} configurations.
 14 */
 15
 16/* Note, this interface is being added to the s3c64xx arch first and will
 17 * be added to the s3c24xx systems later.
 18 */
 19
 20#ifndef __PLAT_GPIO_CFG_H
 21#define __PLAT_GPIO_CFG_H __FILE__
 22
 23#include <linux/types.h>
 24
 25typedef unsigned int __bitwise samsung_gpio_pull_t;
 26
 27/* forward declaration if gpio-core.h hasn't been included */
 28struct samsung_gpio_chip;
 29
 30/**
 31 * struct samsung_gpio_cfg GPIO configuration
 32 * @cfg_eint: Configuration setting when used for external interrupt source
 33 * @get_pull: Read the current pull configuration for the GPIO
 34 * @set_pull: Set the current pull configuration for the GPIO
 35 * @set_config: Set the current configuration for the GPIO
 36 * @get_config: Read the current configuration for the GPIO
 37 *
 38 * Each chip can have more than one type of GPIO bank available and some
 39 * have different capabilites even when they have the same control register
 40 * layouts. Provide an point to vector control routine and provide any
 41 * per-bank configuration information that other systems such as the
 42 * external interrupt code will need.
 43 *
 44 * @sa samsung_gpio_cfgpin
 45 * @sa s3c_gpio_getcfg
 46 * @sa s3c_gpio_setpull
 47 * @sa s3c_gpio_getpull
 48 */
 49struct samsung_gpio_cfg {
 50	unsigned int	cfg_eint;
 51
 52	samsung_gpio_pull_t	(*get_pull)(struct samsung_gpio_chip *chip, unsigned offs);
 53	int		(*set_pull)(struct samsung_gpio_chip *chip, unsigned offs,
 54				    samsung_gpio_pull_t pull);
 55
 56	unsigned (*get_config)(struct samsung_gpio_chip *chip, unsigned offs);
 57	int	 (*set_config)(struct samsung_gpio_chip *chip, unsigned offs,
 58			       unsigned config);
 59};
 60
 61#define S3C_GPIO_SPECIAL_MARK	(0xfffffff0)
 62#define S3C_GPIO_SPECIAL(x)	(S3C_GPIO_SPECIAL_MARK | (x))
 63
 64/* Defines for generic pin configurations */
 65#define S3C_GPIO_INPUT	(S3C_GPIO_SPECIAL(0))
 66#define S3C_GPIO_OUTPUT	(S3C_GPIO_SPECIAL(1))
 67#define S3C_GPIO_SFN(x)	(S3C_GPIO_SPECIAL(x))
 68
 69#define samsung_gpio_is_cfg_special(_cfg) \
 70	(((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK)
 71
 72/**
 73 * s3c_gpio_cfgpin() - Change the GPIO function of a pin.
 74 * @pin pin The pin number to configure.
 75 * @to to The configuration for the pin's function.
 76 *
 77 * Configure which function is actually connected to the external
 78 * pin, such as an gpio input, output or some form of special function
 79 * connected to an internal peripheral block.
 80 *
 81 * The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT
 82 * or S3C_GPIO_SFN() to indicate one of the possible values that the helper
 83 * will then generate the correct bit mask and shift for the configuration.
 84 *
 85 * If a bank of GPIOs all needs to be set to special-function 2, then
 86 * the following code will work:
 87 *
 88 *	for (gpio = start; gpio < end; gpio++)
 89 *		s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
 90 *
 91 * The @to parameter can also be a specific value already shifted to the
 92 * correct position in the control register, although these are discouraged
 93 * in newer kernels and are only being kept for compatibility.
 94 */
 95extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
 96
 97/**
 98 * s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range
 99 * @start: The pin number to start at
100 * @nr: The number of pins to configure from @start.
101 * @cfg: The configuration for the pin's function
102 *
103 * Call s3c_gpio_cfgpin() for the @nr pins starting at @start.
104 *
105 * @sa s3c_gpio_cfgpin.
106 */
107extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
108				 unsigned int cfg);
109
110/* Define values for the pull-{up,down} available for each gpio pin.
111 *
112 * These values control the state of the weak pull-{up,down} resistors
113 * available on most pins on the S3C series. Not all chips support both
114 * up or down settings, and it may be dependent on the chip that is being
115 * used to whether the particular mode is available.
116 */
117#define S3C_GPIO_PULL_NONE	((__force samsung_gpio_pull_t)0x00)
118#define S3C_GPIO_PULL_DOWN	((__force samsung_gpio_pull_t)0x01)
119#define S3C_GPIO_PULL_UP	((__force samsung_gpio_pull_t)0x02)
120
121/**
122 * s3c_gpio_setpull() - set the state of a gpio pin pull resistor
123 * @pin: The pin number to configure the pull resistor.
124 * @pull: The configuration for the pull resistor.
125 *
126 * This function sets the state of the pull-{up,down} resistor for the
127 * specified pin. It will return 0 if successful, or a negative error
128 * code if the pin cannot support the requested pull setting.
129 *
130 * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP.
131*/
132extern int s3c_gpio_setpull(unsigned int pin, samsung_gpio_pull_t pull);
133
134/* configure `all` aspects of an gpio */
135
136/**
137 * s3c_gpio_cfgall_range() - configure range of gpio functtion and pull.
138 * @start: The gpio number to start at.
139 * @nr: The number of gpio to configure from @start.
140 * @cfg: The configuration to use
141 * @pull: The pull setting to use.
142 *
143 * Run s3c_gpio_cfgpin() and s3c_gpio_setpull() over the gpio range starting
144 * @gpio and running for @size.
145 *
146 * @sa s3c_gpio_cfgpin
147 * @sa s3c_gpio_setpull
148 * @sa s3c_gpio_cfgpin_range
149 */
150extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr,
151				 unsigned int cfg, samsung_gpio_pull_t pull);
152
153static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size,
154					   unsigned int cfg)
155{
156	return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE);
157}
158
159#endif /* __PLAT_GPIO_CFG_H */