devs.c

  1// SPDX-License-Identifier: GPL-2.0
  2//
  3// Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4//		http://www.samsung.com
  5//
  6// Base Samsung platform device definitions
  7
  8#include <linux/gpio.h>
  9#include <linux/kernel.h>
 10#include <linux/types.h>
 11#include <linux/interrupt.h>
 12#include <linux/list.h>
 13#include <linux/timer.h>
 14#include <linux/init.h>
 15#include <linux/serial_core.h>
 16#include <linux/serial_s3c.h>
 17#include <linux/platform_device.h>
 18#include <linux/io.h>
 19#include <linux/slab.h>
 20#include <linux/string.h>
 21#include <linux/dma-mapping.h>
 22#include <linux/gfp.h>
 23#include <linux/mmc/host.h>
 24#include <linux/ioport.h>
 25#include <linux/sizes.h>
 26#include <linux/platform_data/s3c-hsotg.h>
 27
 28#include <asm/irq.h>
 29#include <asm/mach/arch.h>
 30#include <asm/mach/map.h>
 31#include <asm/mach/irq.h>
 32
 33#include "irqs.h"
 34#include "map.h"
 35#include "gpio-samsung.h"
 36#include "gpio-cfg.h"
 37
 38#include "cpu.h"
 39#include "devs.h"
 40#include "fb.h"
 41#include <linux/platform_data/i2c-s3c2410.h>
 42#include "keypad.h"
 43#include "pwm-core.h"
 44#include "sdhci.h"
 45#include "usb-phy.h"
 46#include <linux/platform_data/asoc-s3c.h>
 47#include <linux/platform_data/spi-s3c64xx.h>
 48
 49#define samsung_device_dma_mask (*((u64[]) { DMA_BIT_MASK(32) }))
 50
 51/* FB */
 52
 53#ifdef CONFIG_S3C_DEV_FB
 54static struct resource s3c_fb_resource[] = {
 55	[0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
 56	[1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
 57	[2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
 58	[3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
 59};
 60
 61struct platform_device s3c_device_fb = {
 62	.name		= "s3c-fb",
 63	.id		= -1,
 64	.num_resources	= ARRAY_SIZE(s3c_fb_resource),
 65	.resource	= s3c_fb_resource,
 66	.dev		= {
 67		.dma_mask		= &samsung_device_dma_mask,
 68		.coherent_dma_mask	= DMA_BIT_MASK(32),
 69	},
 70};
 71
 72void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
 73{
 74	s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
 75			 &s3c_device_fb);
 76}
 77#endif /* CONFIG_S3C_DEV_FB */
 78
 79/* HSMMC */
 80
 81#ifdef CONFIG_S3C_DEV_HSMMC
 82static struct resource s3c_hsmmc_resource[] = {
 83	[0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
 84	[1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
 85};
 86
 87struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
 88	.max_width	= 4,
 89	.host_caps	= (MMC_CAP_4_BIT_DATA |
 90			   MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
 91};
 92
 93struct platform_device s3c_device_hsmmc0 = {
 94	.name		= "s3c-sdhci",
 95	.id		= 0,
 96	.num_resources	= ARRAY_SIZE(s3c_hsmmc_resource),
 97	.resource	= s3c_hsmmc_resource,
 98	.dev		= {
 99		.dma_mask		= &samsung_device_dma_mask,
100		.coherent_dma_mask	= DMA_BIT_MASK(32),
101		.platform_data		= &s3c_hsmmc0_def_platdata,
102	},
103};
104
105void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
106{
107	s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
108}
109#endif /* CONFIG_S3C_DEV_HSMMC */
110
111#ifdef CONFIG_S3C_DEV_HSMMC1
112static struct resource s3c_hsmmc1_resource[] = {
113	[0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
114	[1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
115};
116
117struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
118	.max_width	= 4,
119	.host_caps	= (MMC_CAP_4_BIT_DATA |
120			   MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
121};
122
123struct platform_device s3c_device_hsmmc1 = {
124	.name		= "s3c-sdhci",
125	.id		= 1,
126	.num_resources	= ARRAY_SIZE(s3c_hsmmc1_resource),
127	.resource	= s3c_hsmmc1_resource,
128	.dev		= {
129		.dma_mask		= &samsung_device_dma_mask,
130		.coherent_dma_mask	= DMA_BIT_MASK(32),
131		.platform_data		= &s3c_hsmmc1_def_platdata,
132	},
133};
134
135void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
136{
137	s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
138}
139#endif /* CONFIG_S3C_DEV_HSMMC1 */
140
141/* HSMMC2 */
142
143#ifdef CONFIG_S3C_DEV_HSMMC2
144static struct resource s3c_hsmmc2_resource[] = {
145	[0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
146	[1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
147};
148
149struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
150	.max_width	= 4,
151	.host_caps	= (MMC_CAP_4_BIT_DATA |
152			   MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
153};
154
155struct platform_device s3c_device_hsmmc2 = {
156	.name		= "s3c-sdhci",
157	.id		= 2,
158	.num_resources	= ARRAY_SIZE(s3c_hsmmc2_resource),
159	.resource	= s3c_hsmmc2_resource,
160	.dev		= {
161		.dma_mask		= &samsung_device_dma_mask,
162		.coherent_dma_mask	= DMA_BIT_MASK(32),
163		.platform_data		= &s3c_hsmmc2_def_platdata,
164	},
165};
166
167void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
168{
169	s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
170}
171#endif /* CONFIG_S3C_DEV_HSMMC2 */
172
173#ifdef CONFIG_S3C_DEV_HSMMC3
174static struct resource s3c_hsmmc3_resource[] = {
175	[0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
176	[1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
177};
178
179struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
180	.max_width	= 4,
181	.host_caps	= (MMC_CAP_4_BIT_DATA |
182			   MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
183};
184
185struct platform_device s3c_device_hsmmc3 = {
186	.name		= "s3c-sdhci",
187	.id		= 3,
188	.num_resources	= ARRAY_SIZE(s3c_hsmmc3_resource),
189	.resource	= s3c_hsmmc3_resource,
190	.dev		= {
191		.dma_mask		= &samsung_device_dma_mask,
192		.coherent_dma_mask	= DMA_BIT_MASK(32),
193		.platform_data		= &s3c_hsmmc3_def_platdata,
194	},
195};
196
197void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
198{
199	s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
200}
201#endif /* CONFIG_S3C_DEV_HSMMC3 */
202
203/* I2C */
204
205static struct resource s3c_i2c0_resource[] = {
206	[0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
207	[1] = DEFINE_RES_IRQ(IRQ_IIC),
208};
209
210struct platform_device s3c_device_i2c0 = {
211	.name		= "s3c2410-i2c",
212	.id		= 0,
213	.num_resources	= ARRAY_SIZE(s3c_i2c0_resource),
214	.resource	= s3c_i2c0_resource,
215};
216
217struct s3c2410_platform_i2c default_i2c_data __initdata = {
218	.flags		= 0,
219	.slave_addr	= 0x10,
220	.frequency	= 100*1000,
221	.sda_delay	= 100,
222};
223
224void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
225{
226	struct s3c2410_platform_i2c *npd;
227
228	if (!pd) {
229		pd = &default_i2c_data;
230		pd->bus_num = 0;
231	}
232
233	npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c0);
234
235	if (!npd->cfg_gpio)
236		npd->cfg_gpio = s3c_i2c0_cfg_gpio;
237}
238
239#ifdef CONFIG_S3C_DEV_I2C1
240static struct resource s3c_i2c1_resource[] = {
241	[0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
242	[1] = DEFINE_RES_IRQ(IRQ_IIC1),
243};
244
245struct platform_device s3c_device_i2c1 = {
246	.name		= "s3c2410-i2c",
247	.id		= 1,
248	.num_resources	= ARRAY_SIZE(s3c_i2c1_resource),
249	.resource	= s3c_i2c1_resource,
250};
251
252void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
253{
254	struct s3c2410_platform_i2c *npd;
255
256	if (!pd) {
257		pd = &default_i2c_data;
258		pd->bus_num = 1;
259	}
260
261	npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c1);
262
263	if (!npd->cfg_gpio)
264		npd->cfg_gpio = s3c_i2c1_cfg_gpio;
265}
266#endif /* CONFIG_S3C_DEV_I2C1 */
267
268/* KEYPAD */
269
270#ifdef CONFIG_SAMSUNG_DEV_KEYPAD
271static struct resource samsung_keypad_resources[] = {
272	[0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
273	[1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
274};
275
276struct platform_device samsung_device_keypad = {
277	.name		= "samsung-keypad",
278	.id		= -1,
279	.num_resources	= ARRAY_SIZE(samsung_keypad_resources),
280	.resource	= samsung_keypad_resources,
281};
282
283void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
284{
285	struct samsung_keypad_platdata *npd;
286
287	npd = s3c_set_platdata(pd, sizeof(*npd), &samsung_device_keypad);
288
289	if (!npd->cfg_gpio)
290		npd->cfg_gpio = samsung_keypad_cfg_gpio;
291}
292#endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
293
294/* PWM Timer */
295
296#ifdef CONFIG_SAMSUNG_DEV_PWM
297static struct resource samsung_pwm_resource[] = {
298	DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
299};
300
301struct platform_device samsung_device_pwm = {
302	.name		= "samsung-pwm",
303	.id		= -1,
304	.num_resources	= ARRAY_SIZE(samsung_pwm_resource),
305	.resource	= samsung_pwm_resource,
306};
307
308void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
309{
310	samsung_device_pwm.dev.platform_data = pd;
311}
312#endif /* CONFIG_SAMSUNG_DEV_PWM */
313
314/* USB */
315
316#ifdef CONFIG_S3C_DEV_USB_HOST
317static struct resource s3c_usb_resource[] = {
318	[0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
319	[1] = DEFINE_RES_IRQ(IRQ_USBH),
320};
321
322struct platform_device s3c_device_ohci = {
323	.name		= "s3c2410-ohci",
324	.id		= -1,
325	.num_resources	= ARRAY_SIZE(s3c_usb_resource),
326	.resource	= s3c_usb_resource,
327	.dev		= {
328		.dma_mask		= &samsung_device_dma_mask,
329		.coherent_dma_mask	= DMA_BIT_MASK(32),
330	}
331};
332#endif /* CONFIG_S3C_DEV_USB_HOST */
333
334/* USB HSOTG */
335
336#ifdef CONFIG_S3C_DEV_USB_HSOTG
337static struct resource s3c_usb_hsotg_resources[] = {
338	[0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
339	[1] = DEFINE_RES_IRQ(IRQ_OTG),
340};
341
342struct platform_device s3c_device_usb_hsotg = {
343	.name		= "s3c-hsotg",
344	.id		= -1,
345	.num_resources	= ARRAY_SIZE(s3c_usb_hsotg_resources),
346	.resource	= s3c_usb_hsotg_resources,
347	.dev		= {
348		.dma_mask		= &samsung_device_dma_mask,
349		.coherent_dma_mask	= DMA_BIT_MASK(32),
350	},
351};
352
353void __init dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd)
354{
355	struct dwc2_hsotg_plat *npd;
356
357	npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_usb_hsotg);
358
359	if (!npd->phy_init)
360		npd->phy_init = s3c_usb_phy_init;
361	if (!npd->phy_exit)
362		npd->phy_exit = s3c_usb_phy_exit;
363}
364#endif /* CONFIG_S3C_DEV_USB_HSOTG */
365
366#ifdef CONFIG_S3C64XX_DEV_SPI0
367static struct resource s3c64xx_spi0_resource[] = {
368	[0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
369	[1] = DEFINE_RES_IRQ(IRQ_SPI0),
370};
371
372struct platform_device s3c64xx_device_spi0 = {
373	.name		= "s3c6410-spi",
374	.id		= 0,
375	.num_resources	= ARRAY_SIZE(s3c64xx_spi0_resource),
376	.resource	= s3c64xx_spi0_resource,
377	.dev = {
378		.dma_mask		= &samsung_device_dma_mask,
379		.coherent_dma_mask	= DMA_BIT_MASK(32),
380	},
381};
382
383void __init s3c64xx_spi0_set_platdata(int src_clk_nr, int num_cs)
384{
385	struct s3c64xx_spi_info pd;
386
387	/* Reject invalid configuration */
388	if (!num_cs || src_clk_nr < 0) {
389		pr_err("%s: Invalid SPI configuration\n", __func__);
390		return;
391	}
392
393	pd.num_cs = num_cs;
394	pd.src_clk_nr = src_clk_nr;
395	pd.cfg_gpio = s3c64xx_spi0_cfg_gpio;
396
397	s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
398}
399#endif /* CONFIG_S3C64XX_DEV_SPI0 */