omap_hwmod_2xxx_interconnect_data.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * omap_hwmod_2xxx_interconnect_data.c - common interconnect data for OMAP2xxx
  4 *
  5 * Copyright (C) 2009-2011 Nokia Corporation
  6 * Paul Walmsley
  7 *
  8 * XXX handle crossbar/shared link difference for L3?
  9 * XXX these should be marked initdata for multi-OMAP kernels
 10 */
 11#include <linux/sizes.h>
 12
 13#include "omap_hwmod.h"
 14#include "l3_2xxx.h"
 15#include "l4_2xxx.h"
 16
 17#include "omap_hwmod_common_data.h"
 18
 19/*
 20 * Common interconnect data
 21 */
 22
 23/* L3 -> L4_CORE interface */
 24struct omap_hwmod_ocp_if omap2xxx_l3_main__l4_core = {
 25	.master	= &omap2xxx_l3_main_hwmod,
 26	.slave	= &omap2xxx_l4_core_hwmod,
 27	.user	= OCP_USER_MPU | OCP_USER_SDMA,
 28};
 29
 30/* MPU -> L3 interface */
 31struct omap_hwmod_ocp_if omap2xxx_mpu__l3_main = {
 32	.master = &omap2xxx_mpu_hwmod,
 33	.slave	= &omap2xxx_l3_main_hwmod,
 34	.user	= OCP_USER_MPU,
 35};
 36
 37/* DSS -> l3 */
 38struct omap_hwmod_ocp_if omap2xxx_dss__l3 = {
 39	.master		= &omap2xxx_dss_core_hwmod,
 40	.slave		= &omap2xxx_l3_main_hwmod,
 41	.fw = {
 42		.omap2 = {
 43			.l3_perm_bit  = OMAP2_L3_CORE_FW_CONNID_DSS,
 44			.flags	= OMAP_FIREWALL_L3,
 45		},
 46	},
 47	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 48};
 49
 50/* L4_CORE -> L4_WKUP interface */
 51struct omap_hwmod_ocp_if omap2xxx_l4_core__l4_wkup = {
 52	.master	= &omap2xxx_l4_core_hwmod,
 53	.slave	= &omap2xxx_l4_wkup_hwmod,
 54	.user	= OCP_USER_MPU | OCP_USER_SDMA,
 55};
 56
 57/* L4 CORE -> UART1 interface */
 58struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
 59	.master		= &omap2xxx_l4_core_hwmod,
 60	.slave		= &omap2xxx_uart1_hwmod,
 61	.clk		= "uart1_ick",
 62	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 63};
 64
 65/* L4 CORE -> UART2 interface */
 66struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
 67	.master		= &omap2xxx_l4_core_hwmod,
 68	.slave		= &omap2xxx_uart2_hwmod,
 69	.clk		= "uart2_ick",
 70	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 71};
 72
 73/* L4 PER -> UART3 interface */
 74struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
 75	.master		= &omap2xxx_l4_core_hwmod,
 76	.slave		= &omap2xxx_uart3_hwmod,
 77	.clk		= "uart3_ick",
 78	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 79};
 80
 81/* l4 core -> mcspi1 interface */
 82struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi1 = {
 83	.master		= &omap2xxx_l4_core_hwmod,
 84	.slave		= &omap2xxx_mcspi1_hwmod,
 85	.clk		= "mcspi1_ick",
 86	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 87};
 88
 89/* l4 core -> mcspi2 interface */
 90struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2 = {
 91	.master		= &omap2xxx_l4_core_hwmod,
 92	.slave		= &omap2xxx_mcspi2_hwmod,
 93	.clk		= "mcspi2_ick",
 94	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 95};
 96
 97/* l4_core -> timer3 */
 98struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3 = {
 99	.master		= &omap2xxx_l4_core_hwmod,
100	.slave		= &omap2xxx_timer3_hwmod,
101	.clk		= "gpt3_ick",
102	.user		= OCP_USER_MPU | OCP_USER_SDMA,
103};
104
105/* l4_core -> timer4 */
106struct omap_hwmod_ocp_if omap2xxx_l4_core__timer4 = {
107	.master		= &omap2xxx_l4_core_hwmod,
108	.slave		= &omap2xxx_timer4_hwmod,
109	.clk		= "gpt4_ick",
110	.user		= OCP_USER_MPU | OCP_USER_SDMA,
111};
112
113/* l4_core -> timer5 */
114struct omap_hwmod_ocp_if omap2xxx_l4_core__timer5 = {
115	.master		= &omap2xxx_l4_core_hwmod,
116	.slave		= &omap2xxx_timer5_hwmod,
117	.clk		= "gpt5_ick",
118	.user		= OCP_USER_MPU | OCP_USER_SDMA,
119};
120
121/* l4_core -> timer6 */
122struct omap_hwmod_ocp_if omap2xxx_l4_core__timer6 = {
123	.master		= &omap2xxx_l4_core_hwmod,
124	.slave		= &omap2xxx_timer6_hwmod,
125	.clk		= "gpt6_ick",
126	.user		= OCP_USER_MPU | OCP_USER_SDMA,
127};
128
129/* l4_core -> timer7 */
130struct omap_hwmod_ocp_if omap2xxx_l4_core__timer7 = {
131	.master		= &omap2xxx_l4_core_hwmod,
132	.slave		= &omap2xxx_timer7_hwmod,
133	.clk		= "gpt7_ick",
134	.user		= OCP_USER_MPU | OCP_USER_SDMA,
135};
136
137/* l4_core -> timer8 */
138struct omap_hwmod_ocp_if omap2xxx_l4_core__timer8 = {
139	.master		= &omap2xxx_l4_core_hwmod,
140	.slave		= &omap2xxx_timer8_hwmod,
141	.clk		= "gpt8_ick",
142	.user		= OCP_USER_MPU | OCP_USER_SDMA,
143};
144
145/* l4_core -> timer9 */
146struct omap_hwmod_ocp_if omap2xxx_l4_core__timer9 = {
147	.master		= &omap2xxx_l4_core_hwmod,
148	.slave		= &omap2xxx_timer9_hwmod,
149	.clk		= "gpt9_ick",
150	.user		= OCP_USER_MPU | OCP_USER_SDMA,
151};
152
153/* l4_core -> timer10 */
154struct omap_hwmod_ocp_if omap2xxx_l4_core__timer10 = {
155	.master		= &omap2xxx_l4_core_hwmod,
156	.slave		= &omap2xxx_timer10_hwmod,
157	.clk		= "gpt10_ick",
158	.user		= OCP_USER_MPU | OCP_USER_SDMA,
159};
160
161/* l4_core -> timer11 */
162struct omap_hwmod_ocp_if omap2xxx_l4_core__timer11 = {
163	.master		= &omap2xxx_l4_core_hwmod,
164	.slave		= &omap2xxx_timer11_hwmod,
165	.clk		= "gpt11_ick",
166	.user		= OCP_USER_MPU | OCP_USER_SDMA,
167};
168
169/* l4_core -> timer12 */
170struct omap_hwmod_ocp_if omap2xxx_l4_core__timer12 = {
171	.master		= &omap2xxx_l4_core_hwmod,
172	.slave		= &omap2xxx_timer12_hwmod,
173	.clk		= "gpt12_ick",
174	.user		= OCP_USER_MPU | OCP_USER_SDMA,
175};
176
177/* l4_core -> dss */
178struct omap_hwmod_ocp_if omap2xxx_l4_core__dss = {
179	.master		= &omap2xxx_l4_core_hwmod,
180	.slave		= &omap2xxx_dss_core_hwmod,
181	.clk		= "dss_ick",
182	.fw = {
183		.omap2 = {
184			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
185			.flags	= OMAP_FIREWALL_L4,
186		},
187	},
188	.user		= OCP_USER_MPU | OCP_USER_SDMA,
189};
190
191/* l4_core -> dss_dispc */
192struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_dispc = {
193	.master		= &omap2xxx_l4_core_hwmod,
194	.slave		= &omap2xxx_dss_dispc_hwmod,
195	.clk		= "dss_ick",
196	.fw = {
197		.omap2 = {
198			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION,
199			.flags	= OMAP_FIREWALL_L4,
200		},
201	},
202	.user		= OCP_USER_MPU | OCP_USER_SDMA,
203};
204
205/* l4_core -> dss_rfbi */
206struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_rfbi = {
207	.master		= &omap2xxx_l4_core_hwmod,
208	.slave		= &omap2xxx_dss_rfbi_hwmod,
209	.clk		= "dss_ick",
210	.fw = {
211		.omap2 = {
212			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
213			.flags	= OMAP_FIREWALL_L4,
214		},
215	},
216	.user		= OCP_USER_MPU | OCP_USER_SDMA,
217};
218
219/* l4_core -> dss_venc */
220struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc = {
221	.master		= &omap2xxx_l4_core_hwmod,
222	.slave		= &omap2xxx_dss_venc_hwmod,
223	.clk		= "dss_ick",
224	.fw = {
225		.omap2 = {
226			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_VENC_REGION,
227			.flags	= OMAP_FIREWALL_L4,
228		},
229	},
230	.flags		= OCPIF_SWSUP_IDLE,
231	.user		= OCP_USER_MPU | OCP_USER_SDMA,
232};
233
234/* l4_core -> rng */
235struct omap_hwmod_ocp_if omap2xxx_l4_core__rng = {
236	.master		= &omap2xxx_l4_core_hwmod,
237	.slave		= &omap2xxx_rng_hwmod,
238	.clk		= "rng_ick",
239	.user		= OCP_USER_MPU | OCP_USER_SDMA,
240};
241
242/* l4 core -> sham interface */
243struct omap_hwmod_ocp_if omap2xxx_l4_core__sham = {
244	.master		= &omap2xxx_l4_core_hwmod,
245	.slave		= &omap2xxx_sham_hwmod,
246	.clk		= "sha_ick",
247	.user		= OCP_USER_MPU | OCP_USER_SDMA,
248};
249
250/* l4 core -> aes interface */
251struct omap_hwmod_ocp_if omap2xxx_l4_core__aes = {
252	.master		= &omap2xxx_l4_core_hwmod,
253	.slave		= &omap2xxx_aes_hwmod,
254	.clk		= "aes_ick",
255	.user		= OCP_USER_MPU | OCP_USER_SDMA,
256};