gpio16xx.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * OMAP16xx specific gpio init
  4 *
  5 * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
  6 *
  7 * Author:
  8 *	Charulatha V <charu@ti.com>
  9 */
 10
 11#include <linux/platform_data/gpio-omap.h>
 12#include <linux/soc/ti/omap1-io.h>
 13
 14#include "hardware.h"
 15#include "irqs.h"
 16#include "soc.h"
 17
 18#define OMAP1610_GPIO1_BASE		0xfffbe400
 19#define OMAP1610_GPIO2_BASE		0xfffbec00
 20#define OMAP1610_GPIO3_BASE		0xfffbb400
 21#define OMAP1610_GPIO4_BASE		0xfffbbc00
 22#define OMAP1_MPUIO_VBASE		OMAP1_MPUIO_BASE
 23
 24/* smart idle, enable wakeup */
 25#define SYSCONFIG_WORD			0x14
 26
 27/* mpu gpio */
 28static struct resource omap16xx_mpu_gpio_resources[] = {
 29	{
 30		.start	= OMAP1_MPUIO_VBASE,
 31		.end	= OMAP1_MPUIO_VBASE + SZ_2K - 1,
 32		.flags	= IORESOURCE_MEM,
 33	},
 34	{
 35		.start	= INT_MPUIO,
 36		.flags	= IORESOURCE_IRQ,
 37	},
 38};
 39
 40static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
 41	.revision       = USHRT_MAX,
 42	.direction	= OMAP_MPUIO_IO_CNTL,
 43	.datain		= OMAP_MPUIO_INPUT_LATCH,
 44	.dataout	= OMAP_MPUIO_OUTPUT,
 45	.irqstatus	= OMAP_MPUIO_GPIO_INT,
 46	.irqenable	= OMAP_MPUIO_GPIO_MASKIT,
 47	.irqenable_inv	= true,
 48	.irqctrl	= OMAP_MPUIO_GPIO_INT_EDGE,
 49};
 50
 51static struct omap_gpio_platform_data omap16xx_mpu_gpio_config = {
 52	.is_mpuio		= true,
 53	.bank_width		= 16,
 54	.bank_stride		= 1,
 55	.regs                   = &omap16xx_mpuio_regs,
 56};
 57
 58static struct platform_device omap16xx_mpu_gpio = {
 59	.name           = "omap_gpio",
 60	.id             = 0,
 61	.dev            = {
 62		.platform_data = &omap16xx_mpu_gpio_config,
 63	},
 64	.num_resources = ARRAY_SIZE(omap16xx_mpu_gpio_resources),
 65	.resource = omap16xx_mpu_gpio_resources,
 66};
 67
 68/* gpio1 */
 69static struct resource omap16xx_gpio1_resources[] = {
 70	{
 71		.start	= OMAP1610_GPIO1_BASE,
 72		.end	= OMAP1610_GPIO1_BASE + SZ_2K - 1,
 73		.flags	= IORESOURCE_MEM,
 74	},
 75	{
 76		.start	= INT_GPIO_BANK1,
 77		.flags	= IORESOURCE_IRQ,
 78	},
 79};
 80
 81static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
 82	.revision       = OMAP1610_GPIO_REVISION,
 83	.direction	= OMAP1610_GPIO_DIRECTION,
 84	.set_dataout	= OMAP1610_GPIO_SET_DATAOUT,
 85	.clr_dataout	= OMAP1610_GPIO_CLEAR_DATAOUT,
 86	.datain		= OMAP1610_GPIO_DATAIN,
 87	.dataout	= OMAP1610_GPIO_DATAOUT,
 88	.irqstatus	= OMAP1610_GPIO_IRQSTATUS1,
 89	.irqenable	= OMAP1610_GPIO_IRQENABLE1,
 90	.set_irqenable	= OMAP1610_GPIO_SET_IRQENABLE1,
 91	.clr_irqenable	= OMAP1610_GPIO_CLEAR_IRQENABLE1,
 92	.wkup_en	= OMAP1610_GPIO_WAKEUPENABLE,
 93	.edgectrl1	= OMAP1610_GPIO_EDGE_CTRL1,
 94	.edgectrl2	= OMAP1610_GPIO_EDGE_CTRL2,
 95};
 96
 97static struct omap_gpio_platform_data omap16xx_gpio1_config = {
 98	.bank_width		= 16,
 99	.regs                   = &omap16xx_gpio_regs,
100};
101
102static struct platform_device omap16xx_gpio1 = {
103	.name           = "omap_gpio",
104	.id             = 1,
105	.dev            = {
106		.platform_data = &omap16xx_gpio1_config,
107	},
108	.num_resources = ARRAY_SIZE(omap16xx_gpio1_resources),
109	.resource = omap16xx_gpio1_resources,
110};
111
112/* gpio2 */
113static struct resource omap16xx_gpio2_resources[] = {
114	{
115		.start	= OMAP1610_GPIO2_BASE,
116		.end	= OMAP1610_GPIO2_BASE + SZ_2K - 1,
117		.flags	= IORESOURCE_MEM,
118	},
119	{
120		.start	= INT_1610_GPIO_BANK2,
121		.flags	= IORESOURCE_IRQ,
122	},
123};
124
125static struct omap_gpio_platform_data omap16xx_gpio2_config = {
126	.bank_width		= 16,
127	.regs                   = &omap16xx_gpio_regs,
128};
129
130static struct platform_device omap16xx_gpio2 = {
131	.name           = "omap_gpio",
132	.id             = 2,
133	.dev            = {
134		.platform_data = &omap16xx_gpio2_config,
135	},
136	.num_resources = ARRAY_SIZE(omap16xx_gpio2_resources),
137	.resource = omap16xx_gpio2_resources,
138};
139
140/* gpio3 */
141static struct resource omap16xx_gpio3_resources[] = {
142	{
143		.start	= OMAP1610_GPIO3_BASE,
144		.end	= OMAP1610_GPIO3_BASE + SZ_2K - 1,
145		.flags	= IORESOURCE_MEM,
146	},
147	{
148		.start	= INT_1610_GPIO_BANK3,
149		.flags	= IORESOURCE_IRQ,
150	},
151};
152
153static struct omap_gpio_platform_data omap16xx_gpio3_config = {
154	.bank_width		= 16,
155	.regs                   = &omap16xx_gpio_regs,
156};
157
158static struct platform_device omap16xx_gpio3 = {
159	.name           = "omap_gpio",
160	.id             = 3,
161	.dev            = {
162		.platform_data = &omap16xx_gpio3_config,
163	},
164	.num_resources = ARRAY_SIZE(omap16xx_gpio3_resources),
165	.resource = omap16xx_gpio3_resources,
166};
167
168/* gpio4 */
169static struct resource omap16xx_gpio4_resources[] = {
170	{
171		.start	= OMAP1610_GPIO4_BASE,
172		.end	= OMAP1610_GPIO4_BASE + SZ_2K - 1,
173		.flags	= IORESOURCE_MEM,
174	},
175	{
176		.start	= INT_1610_GPIO_BANK4,
177		.flags	= IORESOURCE_IRQ,
178	},
179};
180
181static struct omap_gpio_platform_data omap16xx_gpio4_config = {
182	.bank_width		= 16,
183	.regs                   = &omap16xx_gpio_regs,
184};
185
186static struct platform_device omap16xx_gpio4 = {
187	.name           = "omap_gpio",
188	.id             = 4,
189	.dev            = {
190		.platform_data = &omap16xx_gpio4_config,
191	},
192	.num_resources = ARRAY_SIZE(omap16xx_gpio4_resources),
193	.resource = omap16xx_gpio4_resources,
194};
195
196static struct platform_device *omap16xx_gpio_dev[] __initdata = {
197	&omap16xx_mpu_gpio,
198	&omap16xx_gpio1,
199	&omap16xx_gpio2,
200	&omap16xx_gpio3,
201	&omap16xx_gpio4,
202};
203
204/*
205 * omap16xx_gpio_init needs to be done before
206 * machine_init functions access gpio APIs.
207 * Hence omap16xx_gpio_init is a postcore_initcall.
208 */
209static int __init omap16xx_gpio_init(void)
210{
211	int i;
212	void __iomem *base;
213	struct resource *res;
214	struct platform_device *pdev;
215	struct omap_gpio_platform_data *pdata;
216
217	if (!cpu_is_omap16xx())
218		return -EINVAL;
219
220	/*
221	 * Enable system clock for GPIO module.
222	 * The CAM_CLK_CTRL *is* really the right place.
223	 */
224	omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
225					ULPD_CAM_CLK_CTRL);
226
227	for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) {
228		pdev = omap16xx_gpio_dev[i];
229		pdata = pdev->dev.platform_data;
230
231		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
232		if (unlikely(!res)) {
233			dev_err(&pdev->dev, "Invalid mem resource.\n");
234			return -ENODEV;
235		}
236
237		base = ioremap(res->start, resource_size(res));
238		if (unlikely(!base)) {
239			dev_err(&pdev->dev, "ioremap failed.\n");
240			return -ENOMEM;
241		}
242
243		__raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG);
244		iounmap(base);
245
246		platform_device_register(omap16xx_gpio_dev[i]);
247	}
248
249	return 0;
250}
251postcore_initcall(omap16xx_gpio_init);