platsmp.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * arch/arm/mach-mediatek/platsmp.c
  4 *
  5 * Copyright (c) 2014 Mediatek Inc.
  6 * Author: Shunli Wang <shunli.wang@mediatek.com>
  7 *         Yingjoe Chen <yingjoe.chen@mediatek.com>
  8 */
  9#include <linux/io.h>
 10#include <linux/memblock.h>
 11#include <linux/of.h>
 12#include <linux/of_address.h>
 13#include <linux/string.h>
 14#include <linux/threads.h>
 15
 16#define MTK_MAX_CPU		8
 17#define MTK_SMP_REG_SIZE	0x1000
 18
 19struct mtk_smp_boot_info {
 20	unsigned long smp_base;
 21	unsigned int jump_reg;
 22	unsigned int core_keys[MTK_MAX_CPU - 1];
 23	unsigned int core_regs[MTK_MAX_CPU - 1];
 24};
 25
 26static const struct mtk_smp_boot_info mtk_mt8135_tz_boot = {
 27	0x80002000, 0x3fc,
 28	{ 0x534c4131, 0x4c415332, 0x41534c33 },
 29	{ 0x3f8, 0x3f8, 0x3f8 },
 30};
 31
 32static const struct mtk_smp_boot_info mtk_mt6572_boot = {
 33	0x10001400, 0x08,
 34	{ 0x534c4131 },
 35	{ 0x0c },
 36};
 37
 38static const struct mtk_smp_boot_info mtk_mt6589_boot = {
 39	0x10002000, 0x34,
 40	{ 0x534c4131, 0x4c415332, 0x41534c33 },
 41	{ 0x38, 0x3c, 0x40 },
 42};
 43
 44static const struct mtk_smp_boot_info mtk_mt7623_boot = {
 45	0x10202000, 0x34,
 46	{ 0x534c4131, 0x4c415332, 0x41534c33 },
 47	{ 0x38, 0x3c, 0x40 },
 48};
 49
 50static const struct of_device_id mtk_tz_smp_boot_infos[] __initconst = {
 51	{ .compatible   = "mediatek,mt8135", .data = &mtk_mt8135_tz_boot },
 52	{ .compatible   = "mediatek,mt8127", .data = &mtk_mt8135_tz_boot },
 53	{ .compatible   = "mediatek,mt2701", .data = &mtk_mt8135_tz_boot },
 54	{},
 55};
 56
 57static const struct of_device_id mtk_smp_boot_infos[] __initconst = {
 58	{ .compatible   = "mediatek,mt6572", .data = &mtk_mt6572_boot },
 59	{ .compatible   = "mediatek,mt6582", .data = &mtk_mt7623_boot },
 60	{ .compatible   = "mediatek,mt6589", .data = &mtk_mt6589_boot },
 61	{ .compatible   = "mediatek,mt7623", .data = &mtk_mt7623_boot },
 62	{ .compatible   = "mediatek,mt7629", .data = &mtk_mt7623_boot },
 63	{},
 64};
 65
 66static void __iomem *mtk_smp_base;
 67static const struct mtk_smp_boot_info *mtk_smp_info;
 68
 69static int mtk_boot_secondary(unsigned int cpu, struct task_struct *idle)
 70{
 71	if (!mtk_smp_base)
 72		return -EINVAL;
 73
 74	if (!mtk_smp_info->core_keys[cpu-1])
 75		return -EINVAL;
 76
 77	writel_relaxed(mtk_smp_info->core_keys[cpu-1],
 78		mtk_smp_base + mtk_smp_info->core_regs[cpu-1]);
 79
 80	arch_send_wakeup_ipi_mask(cpumask_of(cpu));
 81
 82	return 0;
 83}
 84
 85static void __init __mtk_smp_prepare_cpus(unsigned int max_cpus, int trustzone)
 86{
 87	int i, num;
 88	const struct of_device_id *infos;
 89
 90	if (trustzone) {
 91		num = ARRAY_SIZE(mtk_tz_smp_boot_infos);
 92		infos = mtk_tz_smp_boot_infos;
 93	} else {
 94		num = ARRAY_SIZE(mtk_smp_boot_infos);
 95		infos = mtk_smp_boot_infos;
 96	}
 97
 98	/* Find smp boot info for this SoC */
 99	for (i = 0; i < num; i++) {
100		if (of_machine_is_compatible(infos[i].compatible)) {
101			mtk_smp_info = infos[i].data;
102			break;
103		}
104	}
105
106	if (!mtk_smp_info) {
107		pr_err("%s: Device is not supported\n", __func__);
108		return;
109	}
110
111	if (trustzone) {
112		/* smp_base(trustzone-bootinfo) is reserved by device tree */
113		mtk_smp_base = phys_to_virt(mtk_smp_info->smp_base);
114	} else {
115		mtk_smp_base = ioremap(mtk_smp_info->smp_base, MTK_SMP_REG_SIZE);
116		if (!mtk_smp_base) {
117			pr_err("%s: Can't remap %lx\n", __func__,
118				mtk_smp_info->smp_base);
119			return;
120		}
121	}
122
123	/*
124	 * write the address of slave startup address into the system-wide
125	 * jump register
126	 */
127	writel_relaxed(__pa_symbol(secondary_startup_arm),
128			mtk_smp_base + mtk_smp_info->jump_reg);
129}
130
131static void __init mtk_tz_smp_prepare_cpus(unsigned int max_cpus)
132{
133	__mtk_smp_prepare_cpus(max_cpus, 1);
134}
135
136static void __init mtk_smp_prepare_cpus(unsigned int max_cpus)
137{
138	__mtk_smp_prepare_cpus(max_cpus, 0);
139}
140
141static const struct smp_operations mt81xx_tz_smp_ops __initconst = {
142	.smp_prepare_cpus = mtk_tz_smp_prepare_cpus,
143	.smp_boot_secondary = mtk_boot_secondary,
144};
145CPU_METHOD_OF_DECLARE(mt81xx_tz_smp, "mediatek,mt81xx-tz-smp", &mt81xx_tz_smp_ops);
146
147static const struct smp_operations mt6589_smp_ops __initconst = {
148	.smp_prepare_cpus = mtk_smp_prepare_cpus,
149	.smp_boot_secondary = mtk_boot_secondary,
150};
151CPU_METHOD_OF_DECLARE(mt6589_smp, "mediatek,mt6589-smp", &mt6589_smp_ops);