asm-offsets.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Copyright (C) 1995-2003 Russell King
  4 *               2001-2002 Keith Owens
  5 *     
  6 * Generate definitions needed by assembly language modules.
  7 * This code generates raw asm output which is post-processed to extract
  8 * and format the required data.
  9 */
 10#define COMPILE_OFFSETS
 11
 12#include <linux/compiler.h>
 13#include <linux/sched.h>
 14#include <linux/mm.h>
 15#include <linux/dma-mapping.h>
 16#include <asm/cacheflush.h>
 17#include <asm/kexec-internal.h>
 18#include <asm/glue-df.h>
 19#include <asm/glue-pf.h>
 20#include <asm/mach/arch.h>
 21#include <asm/thread_info.h>
 22#include <asm/page.h>
 23#include <asm/mpu.h>
 24#include <asm/procinfo.h>
 25#include <asm/suspend.h>
 26#include <asm/hardware/cache-l2x0.h>
 27#include <linux/kbuild.h>
 28#include <linux/arm-smccc.h>
 29
 30#include <vdso/datapage.h>
 31
 32#include "signal.h"
 33
 34/*
 35 * Make sure that the compiler and target are compatible.
 36 */
 37#if defined(__APCS_26__)
 38#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
 39#endif
 40
 41int main(void)
 42{
 43  DEFINE(TSK_ACTIVE_MM,		offsetof(struct task_struct, active_mm));
 44#ifdef CONFIG_STACKPROTECTOR
 45  DEFINE(TSK_STACK_CANARY,	offsetof(struct task_struct, stack_canary));
 46#endif
 47  BLANK();
 48  DEFINE(TI_FLAGS,		offsetof(struct thread_info, flags));
 49  DEFINE(TI_PREEMPT,		offsetof(struct thread_info, preempt_count));
 50  DEFINE(TI_CPU,		offsetof(struct thread_info, cpu));
 51  DEFINE(TI_CPU_DOMAIN,		offsetof(struct thread_info, cpu_domain));
 52  DEFINE(TI_CPU_SAVE,		offsetof(struct thread_info, cpu_context));
 53  DEFINE(TI_ABI_SYSCALL,	offsetof(struct thread_info, abi_syscall));
 54  DEFINE(TI_TP_VALUE,		offsetof(struct thread_info, tp_value));
 55  DEFINE(TI_FPSTATE,		offsetof(struct thread_info, fpstate));
 56#ifdef CONFIG_VFP
 57  DEFINE(TI_VFPSTATE,		offsetof(struct thread_info, vfpstate));
 58#ifdef CONFIG_SMP
 59  DEFINE(VFP_CPU,		offsetof(union vfp_state, hard.cpu));
 60#endif
 61#endif
 62  DEFINE(SOFTIRQ_DISABLE_OFFSET,SOFTIRQ_DISABLE_OFFSET);
 63#ifdef CONFIG_ARM_THUMBEE
 64  DEFINE(TI_THUMBEE_STATE,	offsetof(struct thread_info, thumbee_state));
 65#endif
 66#ifdef CONFIG_IWMMXT
 67  DEFINE(TI_IWMMXT_STATE,	offsetof(struct thread_info, fpstate.iwmmxt));
 68#endif
 69  BLANK();
 70  DEFINE(S_R0,			offsetof(struct pt_regs, ARM_r0));
 71  DEFINE(S_R1,			offsetof(struct pt_regs, ARM_r1));
 72  DEFINE(S_R2,			offsetof(struct pt_regs, ARM_r2));
 73  DEFINE(S_R3,			offsetof(struct pt_regs, ARM_r3));
 74  DEFINE(S_R4,			offsetof(struct pt_regs, ARM_r4));
 75  DEFINE(S_R5,			offsetof(struct pt_regs, ARM_r5));
 76  DEFINE(S_R6,			offsetof(struct pt_regs, ARM_r6));
 77  DEFINE(S_R7,			offsetof(struct pt_regs, ARM_r7));
 78  DEFINE(S_R8,			offsetof(struct pt_regs, ARM_r8));
 79  DEFINE(S_R9,			offsetof(struct pt_regs, ARM_r9));
 80  DEFINE(S_R10,			offsetof(struct pt_regs, ARM_r10));
 81  DEFINE(S_FP,			offsetof(struct pt_regs, ARM_fp));
 82  DEFINE(S_IP,			offsetof(struct pt_regs, ARM_ip));
 83  DEFINE(S_SP,			offsetof(struct pt_regs, ARM_sp));
 84  DEFINE(S_LR,			offsetof(struct pt_regs, ARM_lr));
 85  DEFINE(S_PC,			offsetof(struct pt_regs, ARM_pc));
 86  DEFINE(S_PSR,			offsetof(struct pt_regs, ARM_cpsr));
 87  DEFINE(S_OLD_R0,		offsetof(struct pt_regs, ARM_ORIG_r0));
 88  DEFINE(PT_REGS_SIZE,		sizeof(struct pt_regs));
 89  DEFINE(SVC_DACR,		offsetof(struct svc_pt_regs, dacr));
 90  DEFINE(SVC_TTBCR,		offsetof(struct svc_pt_regs, ttbcr));
 91  DEFINE(SVC_REGS_SIZE,		sizeof(struct svc_pt_regs));
 92  BLANK();
 93  DEFINE(SIGFRAME_RC3_OFFSET,	offsetof(struct sigframe, retcode[3]));
 94  DEFINE(RT_SIGFRAME_RC3_OFFSET, offsetof(struct rt_sigframe, sig.retcode[3]));
 95  BLANK();
 96#ifdef CONFIG_CACHE_L2X0
 97  DEFINE(L2X0_R_PHY_BASE,	offsetof(struct l2x0_regs, phy_base));
 98  DEFINE(L2X0_R_AUX_CTRL,	offsetof(struct l2x0_regs, aux_ctrl));
 99  DEFINE(L2X0_R_TAG_LATENCY,	offsetof(struct l2x0_regs, tag_latency));
100  DEFINE(L2X0_R_DATA_LATENCY,	offsetof(struct l2x0_regs, data_latency));
101  DEFINE(L2X0_R_FILTER_START,	offsetof(struct l2x0_regs, filter_start));
102  DEFINE(L2X0_R_FILTER_END,	offsetof(struct l2x0_regs, filter_end));
103  DEFINE(L2X0_R_PREFETCH_CTRL,	offsetof(struct l2x0_regs, prefetch_ctrl));
104  DEFINE(L2X0_R_PWR_CTRL,	offsetof(struct l2x0_regs, pwr_ctrl));
105  BLANK();
106#endif
107#ifdef CONFIG_CPU_HAS_ASID
108  DEFINE(MM_CONTEXT_ID,		offsetof(struct mm_struct, context.id.counter));
109  BLANK();
110#endif
111  DEFINE(VMA_VM_MM,		offsetof(struct vm_area_struct, vm_mm));
112  DEFINE(VMA_VM_FLAGS,		offsetof(struct vm_area_struct, vm_flags));
113  BLANK();
114  DEFINE(VM_EXEC,	       	VM_EXEC);
115  BLANK();
116  DEFINE(PAGE_SZ,	       	PAGE_SIZE);
117  BLANK();
118  DEFINE(SYS_ERROR0,		0x9f0000);
119  BLANK();
120  DEFINE(SIZEOF_MACHINE_DESC,	sizeof(struct machine_desc));
121  DEFINE(MACHINFO_TYPE,		offsetof(struct machine_desc, nr));
122  DEFINE(MACHINFO_NAME,		offsetof(struct machine_desc, name));
123  BLANK();
124  DEFINE(PROC_INFO_SZ,		sizeof(struct proc_info_list));
125  DEFINE(PROCINFO_INITFUNC,	offsetof(struct proc_info_list, __cpu_flush));
126  DEFINE(PROCINFO_MM_MMUFLAGS,	offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
127  DEFINE(PROCINFO_IO_MMUFLAGS,	offsetof(struct proc_info_list, __cpu_io_mmu_flags));
128  BLANK();
129#ifdef MULTI_DABORT
130  DEFINE(PROCESSOR_DABT_FUNC,	offsetof(struct processor, _data_abort));
131#endif
132#ifdef MULTI_PABORT
133  DEFINE(PROCESSOR_PABT_FUNC,	offsetof(struct processor, _prefetch_abort));
134#endif
135#ifdef MULTI_CPU
136  DEFINE(CPU_SLEEP_SIZE,	offsetof(struct processor, suspend_size));
137  DEFINE(CPU_DO_SUSPEND,	offsetof(struct processor, do_suspend));
138  DEFINE(CPU_DO_RESUME,		offsetof(struct processor, do_resume));
139#endif
140#ifdef MULTI_CACHE
141  DEFINE(CACHE_FLUSH_KERN_ALL,	offsetof(struct cpu_cache_fns, flush_kern_all));
142#endif
143#ifdef CONFIG_ARM_CPU_SUSPEND
144  DEFINE(SLEEP_SAVE_SP_SZ,	sizeof(struct sleep_save_sp));
145  DEFINE(SLEEP_SAVE_SP_PHYS,	offsetof(struct sleep_save_sp, save_ptr_stash_phys));
146  DEFINE(SLEEP_SAVE_SP_VIRT,	offsetof(struct sleep_save_sp, save_ptr_stash));
147#endif
148  DEFINE(ARM_SMCCC_QUIRK_ID_OFFS,	offsetof(struct arm_smccc_quirk, id));
149  DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS,	offsetof(struct arm_smccc_quirk, state));
150  BLANK();
151  DEFINE(DMA_BIDIRECTIONAL,	DMA_BIDIRECTIONAL);
152  DEFINE(DMA_TO_DEVICE,		DMA_TO_DEVICE);
153  DEFINE(DMA_FROM_DEVICE,	DMA_FROM_DEVICE);
154  BLANK();
155  DEFINE(CACHE_WRITEBACK_ORDER, __CACHE_WRITEBACK_ORDER);
156  DEFINE(CACHE_WRITEBACK_GRANULE, __CACHE_WRITEBACK_GRANULE);
157  BLANK();
158#ifdef CONFIG_ARM_MPU
159  DEFINE(MPU_RNG_INFO_RNGS,	offsetof(struct mpu_rgn_info, rgns));
160  DEFINE(MPU_RNG_INFO_USED,	offsetof(struct mpu_rgn_info, used));
161
162  DEFINE(MPU_RNG_SIZE,		sizeof(struct mpu_rgn));
163  DEFINE(MPU_RGN_DRBAR,	offsetof(struct mpu_rgn, drbar));
164  DEFINE(MPU_RGN_DRSR,	offsetof(struct mpu_rgn, drsr));
165  DEFINE(MPU_RGN_DRACR,	offsetof(struct mpu_rgn, dracr));
166  DEFINE(MPU_RGN_PRBAR,	offsetof(struct mpu_rgn, prbar));
167  DEFINE(MPU_RGN_PRLAR,	offsetof(struct mpu_rgn, prlar));
168#endif
169  DEFINE(KEXEC_START_ADDR,	offsetof(struct kexec_relocate_data, kexec_start_address));
170  DEFINE(KEXEC_INDIR_PAGE,	offsetof(struct kexec_relocate_data, kexec_indirection_page));
171  DEFINE(KEXEC_MACH_TYPE,	offsetof(struct kexec_relocate_data, kexec_mach_type));
172  DEFINE(KEXEC_R2,		offsetof(struct kexec_relocate_data, kexec_r2));
173  return 0; 
174}