am437x-l4.dtsi

   1&l4_wkup {						/* 0x44c00000 */
   2	compatible = "ti,am4-l4-wkup", "simple-pm-bus";
   3	power-domains = <&prm_wkup>;
   4	clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>;
   5	clock-names = "fck";
   6	reg = <0x44c00000 0x800>,
   7	      <0x44c00800 0x800>,
   8	      <0x44c01000 0x400>,
   9	      <0x44c01400 0x400>;
  10	reg-names = "ap", "la", "ia0", "ia1";
  11	#address-cells = <1>;
  12	#size-cells = <1>;
  13	ranges = <0x00000000 0x44c00000 0x100000>,	/* segment 0 */
  14		 <0x00100000 0x44d00000 0x100000>,	/* segment 1 */
  15		 <0x00200000 0x44e00000 0x100000>;	/* segment 2 */
  16
  17	segment@0 {					/* 0x44c00000 */
  18		compatible = "simple-pm-bus";
  19		#address-cells = <1>;
  20		#size-cells = <1>;
  21		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
  22			 <0x00000800 0x00000800 0x000800>,	/* ap 1 */
  23			 <0x00001000 0x00001000 0x000400>,	/* ap 2 */
  24			 <0x00001400 0x00001400 0x000400>;	/* ap 3 */
  25	};
  26
  27	segment@100000 {					/* 0x44d00000 */
  28		compatible = "simple-pm-bus";
  29		#address-cells = <1>;
  30		#size-cells = <1>;
  31		ranges = <0x00000000 0x00100000 0x004000>,	/* ap 4 */
  32			 <0x00004000 0x00104000 0x001000>,	/* ap 5 */
  33			 <0x00080000 0x00180000 0x002000>,	/* ap 6 */
  34			 <0x00082000 0x00182000 0x001000>,	/* ap 7 */
  35			 <0x000f0000 0x001f0000 0x010000>;	/* ap 8 */
  36
  37		target-module@0 {			/* 0x44d00000, ap 4 28.0 */
  38			compatible = "ti,sysc-omap4", "ti,sysc";
  39			reg = <0x0 0x4>;
  40			reg-names = "rev";
  41			clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_WKUP_M3_CLKCTRL 0>;
  42			clock-names = "fck";
  43			#address-cells = <1>;
  44			#size-cells = <1>;
  45			ranges = <0x00000000 0x00000000 0x4000>,
  46				 <0x00080000 0x00080000 0x2000>;
  47
  48			wkup_m3: cpu@0 {
  49				compatible = "ti,am4372-wkup-m3";
  50				reg = <0x00000000 0x4000>,
  51				      <0x00080000 0x2000>;
  52				reg-names = "umem", "dmem";
  53				resets = <&prm_wkup 3>;
  54				reset-names = "rstctrl";
  55				ti,pm-firmware = "am335x-pm-firmware.elf";
  56			};
  57		};
  58
  59		target-module@f0000 {			/* 0x44df0000, ap 8 58.0 */
  60			compatible = "ti,sysc-omap4", "ti,sysc";
  61			reg = <0xf0000 0x4>;
  62			reg-names = "rev";
  63			#address-cells = <1>;
  64			#size-cells = <1>;
  65			ranges = <0x0 0xf0000 0x10000>;
  66
  67			prcm: prcm@0 {
  68				compatible = "ti,am4-prcm", "simple-bus";
  69				reg = <0x0 0x11000>;
  70				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
  71				#address-cells = <1>;
  72				#size-cells = <1>;
  73				ranges = <0 0 0x11000>;
  74
  75				prcm_clocks: clocks {
  76					#address-cells = <1>;
  77					#size-cells = <0>;
  78				};
  79
  80				prcm_clockdomains: clockdomains {
  81				};
  82			};
  83		};
  84	};
  85
  86	segment@200000 {					/* 0x44e00000 */
  87		compatible = "simple-pm-bus";
  88		#address-cells = <1>;
  89		#size-cells = <1>;
  90		ranges = <0x00000000 0x00200000 0x001000>,	/* ap 9 */
  91			 <0x00003000 0x00203000 0x001000>,	/* ap 10 */
  92			 <0x00004000 0x00204000 0x001000>,	/* ap 11 */
  93			 <0x00005000 0x00205000 0x001000>,	/* ap 12 */
  94			 <0x00006000 0x00206000 0x001000>,	/* ap 13 */
  95			 <0x00007000 0x00207000 0x001000>,	/* ap 14 */
  96			 <0x00008000 0x00208000 0x001000>,	/* ap 15 */
  97			 <0x00009000 0x00209000 0x001000>,	/* ap 16 */
  98			 <0x0000a000 0x0020a000 0x001000>,	/* ap 17 */
  99			 <0x0000b000 0x0020b000 0x001000>,	/* ap 18 */
 100			 <0x0000c000 0x0020c000 0x001000>,	/* ap 19 */
 101			 <0x0000d000 0x0020d000 0x001000>,	/* ap 20 */
 102			 <0x0000f000 0x0020f000 0x001000>,	/* ap 21 */
 103			 <0x00010000 0x00210000 0x010000>,	/* ap 22 */
 104			 <0x00030000 0x00230000 0x001000>,	/* ap 23 */
 105			 <0x00031000 0x00231000 0x001000>,	/* ap 24 */
 106			 <0x00032000 0x00232000 0x001000>,	/* ap 25 */
 107			 <0x00033000 0x00233000 0x001000>,	/* ap 26 */
 108			 <0x00034000 0x00234000 0x001000>,	/* ap 27 */
 109			 <0x00035000 0x00235000 0x001000>,	/* ap 28 */
 110			 <0x00036000 0x00236000 0x001000>,	/* ap 29 */
 111			 <0x00037000 0x00237000 0x001000>,	/* ap 30 */
 112			 <0x00038000 0x00238000 0x001000>,	/* ap 31 */
 113			 <0x00039000 0x00239000 0x001000>,	/* ap 32 */
 114			 <0x0003a000 0x0023a000 0x001000>,	/* ap 33 */
 115			 <0x0003e000 0x0023e000 0x001000>,	/* ap 34 */
 116			 <0x0003f000 0x0023f000 0x001000>,	/* ap 35 */
 117			 <0x00040000 0x00240000 0x040000>,	/* ap 36 */
 118			 <0x00080000 0x00280000 0x001000>,	/* ap 37 */
 119			 <0x00088000 0x00288000 0x008000>,	/* ap 38 */
 120			 <0x00092000 0x00292000 0x001000>,	/* ap 39 */
 121			 <0x00086000 0x00286000 0x001000>,	/* ap 40 */
 122			 <0x00087000 0x00287000 0x001000>,	/* ap 41 */
 123			 <0x00090000 0x00290000 0x001000>,	/* ap 42 */
 124			 <0x00091000 0x00291000 0x001000>;	/* ap 43 */
 125
 126		target-module@3000 {			/* 0x44e03000, ap 10 0a.0 */
 127			compatible = "ti,sysc";
 128			status = "disabled";
 129			#address-cells = <1>;
 130			#size-cells = <1>;
 131			ranges = <0x0 0x3000 0x1000>;
 132		};
 133
 134		target-module@5000 {			/* 0x44e05000, ap 12 30.0 */
 135			compatible = "ti,sysc";
 136			status = "disabled";
 137			#address-cells = <1>;
 138			#size-cells = <1>;
 139			ranges = <0x0 0x5000 0x1000>;
 140		};
 141
 142		target-module@7000 {			/* 0x44e07000, ap 14 20.0 */
 143			compatible = "ti,sysc-omap2", "ti,sysc";
 144			reg = <0x7000 0x4>,
 145			      <0x7010 0x4>,
 146			      <0x7114 0x4>;
 147			reg-names = "rev", "sysc", "syss";
 148			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 149					 SYSC_OMAP2_SOFTRESET |
 150					 SYSC_OMAP2_AUTOIDLE)>;
 151			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 152					<SYSC_IDLE_NO>,
 153					<SYSC_IDLE_SMART>,
 154					<SYSC_IDLE_SMART_WKUP>;
 155			ti,syss-mask = <1>;
 156			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 157			clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 0>,
 158				 <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 8>;
 159			clock-names = "fck", "dbclk";
 160			#address-cells = <1>;
 161			#size-cells = <1>;
 162			ranges = <0x0 0x7000 0x1000>;
 163
 164			gpio0: gpio@0 {
 165				compatible = "ti,am4372-gpio","ti,omap4-gpio";
 166				reg = <0x0 0x1000>;
 167				interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
 168				gpio-controller;
 169				#gpio-cells = <2>;
 170				interrupt-controller;
 171				#interrupt-cells = <2>;
 172				status = "disabled";
 173			};
 174		};
 175
 176		target-module@9000 {			/* 0x44e09000, ap 16 04.0 */
 177			compatible = "ti,sysc-omap2", "ti,sysc";
 178			reg = <0x9050 0x4>,
 179			      <0x9054 0x4>,
 180			      <0x9058 0x4>;
 181			reg-names = "rev", "sysc", "syss";
 182			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 183					 SYSC_OMAP2_SOFTRESET)>;
 184			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 185					<SYSC_IDLE_NO>,
 186					<SYSC_IDLE_SMART>,
 187					<SYSC_IDLE_SMART_WKUP>;
 188			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 189			clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_UART1_CLKCTRL 0>;
 190			clock-names = "fck";
 191			#address-cells = <1>;
 192			#size-cells = <1>;
 193			ranges = <0x0 0x9000 0x1000>;
 194
 195			uart0: serial@0 {
 196				compatible = "ti,am4372-uart";
 197				reg = <0x0 0x2000>;
 198				interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 199			};
 200		};
 201
 202		target-module@b000 {			/* 0x44e0b000, ap 18 48.0 */
 203			compatible = "ti,sysc-omap2", "ti,sysc";
 204			reg = <0xb000 0x8>,
 205			      <0xb010 0x8>,
 206			      <0xb090 0x8>;
 207			reg-names = "rev", "sysc", "syss";
 208			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 209					 SYSC_OMAP2_ENAWAKEUP |
 210					 SYSC_OMAP2_SOFTRESET |
 211					 SYSC_OMAP2_AUTOIDLE)>;
 212			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 213					<SYSC_IDLE_NO>,
 214					<SYSC_IDLE_SMART>,
 215					<SYSC_IDLE_SMART_WKUP>;
 216			ti,syss-mask = <1>;
 217			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 218			clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_I2C1_CLKCTRL 0>;
 219			clock-names = "fck";
 220			#address-cells = <1>;
 221			#size-cells = <1>;
 222			ranges = <0x0 0xb000 0x1000>;
 223
 224			i2c0: i2c@0 {
 225				compatible = "ti,am4372-i2c","ti,omap4-i2c";
 226				reg = <0x0 0x1000>;
 227				interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 228				#address-cells = <1>;
 229				#size-cells = <0>;
 230				status = "disabled";
 231			};
 232		};
 233
 234		target-module@d000 {			/* 0x44e0d000, ap 20 38.0 */
 235			compatible = "ti,sysc-omap4", "ti,sysc";
 236			reg = <0xd000 0x4>,
 237			      <0xd010 0x4>;
 238			reg-names = "rev", "sysc";
 239			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 240					<SYSC_IDLE_NO>,
 241					<SYSC_IDLE_SMART>,
 242					<SYSC_IDLE_SMART_WKUP>;
 243			/* Domains (P, C): wkup_pwrdm, l3s_tsc_clkdm */
 244			clocks = <&l3s_tsc_clkctrl AM4_L3S_TSC_ADC_TSC_CLKCTRL 0>;
 245			clock-names = "fck";
 246			#address-cells = <1>;
 247			#size-cells = <1>;
 248			ranges = <0x0 0xd000 0x1000>;
 249
 250			tscadc: tscadc@0 {
 251				compatible = "ti,am3359-tscadc";
 252				reg = <0x0 0x1000>;
 253				interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 254				clocks = <&adc_tsc_fck>;
 255				clock-names = "fck";
 256				status = "disabled";
 257				dmas = <&edma 53 0>, <&edma 57 0>;
 258				dma-names = "fifo0", "fifo1";
 259
 260				tsc {
 261					compatible = "ti,am3359-tsc";
 262				};
 263
 264				adc {
 265					#io-channel-cells = <1>;
 266					compatible = "ti,am3359-adc";
 267				};
 268
 269			};
 270		};
 271
 272		target-module@10000 {			/* 0x44e10000, ap 22 0c.0 */
 273			compatible = "ti,sysc-omap4", "ti,sysc";
 274			reg = <0x10000 0x4>;
 275			reg-names = "rev";
 276			clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_CONTROL_CLKCTRL 0>;
 277			clock-names = "fck";
 278			ti,no-idle;
 279			#address-cells = <1>;
 280			#size-cells = <1>;
 281			ranges = <0x0 0x10000 0x10000>;
 282
 283			scm: scm@0 {
 284				compatible = "ti,am4-scm", "simple-bus";
 285				reg = <0x0 0x4000>;
 286				#address-cells = <1>;
 287				#size-cells = <1>;
 288				ranges = <0 0 0x4000>;
 289
 290				am43xx_pinmux: pinmux@800 {
 291					compatible = "ti,am437-padconf",
 292						     "pinctrl-single";
 293					reg = <0x800 0x31c>;
 294					#address-cells = <1>;
 295					#size-cells = <0>;
 296					#pinctrl-cells = <1>;
 297					#interrupt-cells = <1>;
 298					interrupt-controller;
 299					pinctrl-single,register-width = <32>;
 300					pinctrl-single,function-mask = <0xffffffff>;
 301				};
 302
 303				scm_conf: scm_conf@0 {
 304					compatible = "syscon", "simple-bus";
 305					reg = <0x0 0x800>;
 306					#address-cells = <1>;
 307					#size-cells = <1>;
 308
 309					phy_gmii_sel: phy-gmii-sel {
 310						compatible = "ti,am43xx-phy-gmii-sel";
 311						reg = <0x650 0x4>;
 312						#phy-cells = <2>;
 313					};
 314
 315					scm_clocks: clocks {
 316						#address-cells = <1>;
 317						#size-cells = <0>;
 318					};
 319				};
 320
 321				wkup_m3_ipc: wkup_m3_ipc@1324 {
 322					compatible = "ti,am4372-wkup-m3-ipc";
 323					reg = <0x1324 0x44>;
 324					interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 325					ti,rproc = <&wkup_m3>;
 326					mboxes = <&mailbox &mbox_wkupm3>;
 327				};
 328
 329				edma_xbar: dma-router@f90 {
 330					compatible = "ti,am335x-edma-crossbar";
 331					reg = <0xf90 0x40>;
 332					#dma-cells = <3>;
 333					dma-requests = <64>;
 334					dma-masters = <&edma>;
 335				};
 336
 337				scm_clockdomains: clockdomains {
 338				};
 339			};
 340		};
 341
 342		timer1_target: target-module@31000 {	/* 0x44e31000, ap 24 40.0 */
 343			compatible = "ti,sysc-omap2-timer", "ti,sysc";
 344			reg = <0x31000 0x4>,
 345			      <0x31010 0x4>,
 346			      <0x31014 0x4>;
 347			reg-names = "rev", "sysc", "syss";
 348			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 349					 SYSC_OMAP2_SOFTRESET |
 350					 SYSC_OMAP2_AUTOIDLE)>;
 351			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 352					<SYSC_IDLE_NO>,
 353					<SYSC_IDLE_SMART>;
 354			ti,syss-mask = <1>;
 355			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 356			clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_TIMER1_CLKCTRL 0>;
 357			clock-names = "fck";
 358			#address-cells = <1>;
 359			#size-cells = <1>;
 360			ranges = <0x0 0x31000 0x1000>;
 361
 362			timer1: timer@0 {
 363				compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
 364				reg = <0x0 0x400>;
 365				interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 366				ti,timer-alwon;
 367				clocks = <&timer1_fck>;
 368				clock-names = "fck";
 369			};
 370		};
 371
 372		target-module@33000 {			/* 0x44e33000, ap 26 18.0 */
 373			compatible = "ti,sysc";
 374			status = "disabled";
 375			#address-cells = <1>;
 376			#size-cells = <1>;
 377			ranges = <0x0 0x33000 0x1000>;
 378		};
 379
 380		target-module@35000 {			/* 0x44e35000, ap 28 50.0 */
 381			compatible = "ti,sysc-omap2", "ti,sysc";
 382			reg = <0x35000 0x4>,
 383			      <0x35010 0x4>,
 384			      <0x35014 0x4>;
 385			reg-names = "rev", "sysc", "syss";
 386			ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
 387					 SYSC_OMAP2_SOFTRESET)>;
 388			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 389					<SYSC_IDLE_NO>,
 390					<SYSC_IDLE_SMART>,
 391					<SYSC_IDLE_SMART_WKUP>;
 392			ti,syss-mask = <1>;
 393			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 394			clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_WD_TIMER2_CLKCTRL 0>;
 395			clock-names = "fck";
 396			#address-cells = <1>;
 397			#size-cells = <1>;
 398			ranges = <0x0 0x35000 0x1000>;
 399
 400			wdt: wdt@0 {
 401				compatible = "ti,am4372-wdt","ti,omap3-wdt";
 402				reg = <0x0 0x1000>;
 403				interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
 404			};
 405		};
 406
 407		target-module@37000 {			/* 0x44e37000, ap 30 08.0 */
 408			compatible = "ti,sysc";
 409			status = "disabled";
 410			#address-cells = <1>;
 411			#size-cells = <1>;
 412			ranges = <0x0 0x37000 0x1000>;
 413		};
 414
 415		target-module@39000 {			/* 0x44e39000, ap 32 02.0 */
 416			compatible = "ti,sysc";
 417			status = "disabled";
 418			#address-cells = <1>;
 419			#size-cells = <1>;
 420			ranges = <0x0 0x39000 0x1000>;
 421		};
 422
 423		rtc_target: target-module@3e000 {	/* 0x44e3e000, ap 34 60.0 */
 424			compatible = "ti,sysc-omap4-simple", "ti,sysc";
 425			reg = <0x3e074 0x4>,
 426			      <0x3e078 0x4>;
 427			reg-names = "rev", "sysc";
 428			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 429					<SYSC_IDLE_NO>,
 430					<SYSC_IDLE_SMART>,
 431					<SYSC_IDLE_SMART_WKUP>;
 432			/* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
 433			power-domains = <&prm_rtc>;
 434			clocks = <&l4_rtc_clkctrl AM4_L4_RTC_RTC_CLKCTRL 0>;
 435			clock-names = "fck";
 436			#address-cells = <1>;
 437			#size-cells = <1>;
 438			ranges = <0x0 0x3e000 0x1000>;
 439
 440			rtc: rtc@0 {
 441				compatible = "ti,am4372-rtc", "ti,am3352-rtc",
 442					     "ti,da830-rtc";
 443				reg = <0x0 0x1000>;
 444				interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
 445					     <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 446				clocks = <&clk_32768_ck>;
 447				clock-names = "int-clk";
 448				system-power-controller;
 449				status = "disabled";
 450			};
 451		};
 452
 453		target-module@40000 {			/* 0x44e40000, ap 36 68.0 */
 454			compatible = "ti,sysc";
 455			status = "disabled";
 456			#address-cells = <1>;
 457			#size-cells = <1>;
 458			ranges = <0x0 0x40000 0x40000>;
 459		};
 460
 461		target-module@86000 {			/* 0x44e86000, ap 40 70.0 */
 462			compatible = "ti,sysc-omap2", "ti,sysc";
 463			reg = <0x86000 0x4>,
 464			      <0x86004 0x4>;
 465			reg-names = "rev", "sysc";
 466			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 467					<SYSC_IDLE_NO>;
 468			/* Domains (P, C): wkup_pwrdm, l4_wkup_aon_clkdm */
 469			clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_COUNTER_32K_CLKCTRL 0>;
 470			clock-names = "fck";
 471			#address-cells = <1>;
 472			#size-cells = <1>;
 473			ranges = <0x0 0x86000 0x1000>;
 474
 475			counter32k: counter@0 {
 476				compatible = "ti,am4372-counter32k","ti,omap-counter32k";
 477				reg = <0x0 0x40>;
 478			};
 479		};
 480
 481		target-module@88000 {			/* 0x44e88000, ap 38 12.0 */
 482			compatible = "ti,sysc";
 483			status = "disabled";
 484			#address-cells = <1>;
 485			#size-cells = <1>;
 486			ranges = <0x00000000 0x00088000 0x00008000>,
 487				 <0x00008000 0x00090000 0x00001000>,
 488				 <0x00009000 0x00091000 0x00001000>;
 489		};
 490	};
 491};
 492
 493&l4_fast {					/* 0x4a000000 */
 494	compatible = "ti,am4-l4-fast", "simple-pm-bus";
 495	power-domains = <&prm_per>;
 496	clocks = <&l3_clkctrl AM4_L3_L4_HS_CLKCTRL 0>;
 497	clock-names = "fck";
 498	reg = <0x4a000000 0x800>,
 499	      <0x4a000800 0x800>,
 500	      <0x4a001000 0x400>;
 501	reg-names = "ap", "la", "ia0";
 502	#address-cells = <1>;
 503	#size-cells = <1>;
 504	ranges = <0x00000000 0x4a000000 0x1000000>;	/* segment 0 */
 505
 506	segment@0 {					/* 0x4a000000 */
 507		compatible = "simple-pm-bus";
 508		#address-cells = <1>;
 509		#size-cells = <1>;
 510		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
 511			 <0x00000800 0x00000800 0x000800>,	/* ap 1 */
 512			 <0x00001000 0x00001000 0x000400>,	/* ap 2 */
 513			 <0x00100000 0x00100000 0x008000>,	/* ap 3 */
 514			 <0x00108000 0x00108000 0x001000>,	/* ap 4 */
 515			 <0x00400000 0x00400000 0x002000>,	/* ap 5 */
 516			 <0x00402000 0x00402000 0x001000>,	/* ap 6 */
 517			 <0x00200000 0x00200000 0x080000>,	/* ap 7 */
 518			 <0x00280000 0x00280000 0x001000>;	/* ap 8 */
 519
 520		target-module@100000 {			/* 0x4a100000, ap 3 04.0 */
 521			compatible = "ti,sysc-omap4-simple", "ti,sysc";
 522			reg = <0x101200 0x4>,
 523			      <0x101208 0x4>,
 524			      <0x101204 0x4>;
 525			reg-names = "rev", "sysc", "syss";
 526			ti,sysc-mask = <0>;
 527			ti,sysc-midle = <SYSC_IDLE_FORCE>,
 528					<SYSC_IDLE_NO>;
 529			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 530					<SYSC_IDLE_NO>;
 531			ti,syss-mask = <1>;
 532			clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
 533			clock-names = "fck";
 534			#address-cells = <1>;
 535			#size-cells = <1>;
 536			ranges = <0x0 0x100000 0x8000>;
 537
 538			mac_sw: switch@0 {
 539				compatible = "ti,am4372-cpsw-switch", "ti,cpsw-switch";
 540				reg = <0x0 0x4000>;
 541				ranges = <0 0 0x4000>;
 542				clocks = <&cpsw_125mhz_gclk>, <&dpll_clksel_mac_clk>;
 543				clock-names = "fck", "50mclk";
 544				assigned-clocks = <&dpll_clksel_mac_clk>;
 545				assigned-clock-rates = <50000000>;
 546				#address-cells = <1>;
 547				#size-cells = <1>;
 548				syscon = <&scm_conf>;
 549				status = "disabled";
 550
 551				interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 552					     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 553					     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 554					     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 555				interrupt-names = "rx_thresh", "rx", "tx", "misc";
 556
 557				ethernet-ports {
 558					#address-cells = <1>;
 559					#size-cells = <0>;
 560
 561					cpsw_port1: port@1 {
 562						reg = <1>;
 563						label = "port1";
 564						mac-address = [ 00 00 00 00 00 00 ];
 565						phys = <&phy_gmii_sel 1 0>;
 566					};
 567
 568					cpsw_port2: port@2 {
 569						reg = <2>;
 570						label = "port2";
 571						mac-address = [ 00 00 00 00 00 00 ];
 572						phys = <&phy_gmii_sel 2 0>;
 573					};
 574				};
 575
 576				davinci_mdio_sw: mdio@1000 {
 577					compatible = "ti,am4372-mdio", "ti,cpsw-mdio","ti,davinci_mdio";
 578					clocks = <&cpsw_125mhz_gclk>;
 579					clock-names = "fck";
 580					#address-cells = <1>;
 581					#size-cells = <0>;
 582					bus_freq = <1000000>;
 583					reg = <0x1000 0x100>;
 584				};
 585
 586				cpts {
 587					clocks = <&cpsw_cpts_rft_clk>;
 588					clock-names = "cpts";
 589				};
 590			};
 591		};
 592
 593		target-module@200000 {			/* 0x4a200000, ap 7 02.0 */
 594			compatible = "ti,sysc";
 595			status = "disabled";
 596			#address-cells = <1>;
 597			#size-cells = <1>;
 598			ranges = <0x0 0x200000 0x80000>;
 599		};
 600
 601		target-module@400000 {			/* 0x4a400000, ap 5 08.0 */
 602			compatible = "ti,sysc";
 603			status = "disabled";
 604			#address-cells = <1>;
 605			#size-cells = <1>;
 606			ranges = <0x0 0x400000 0x2000>;
 607		};
 608	};
 609};
 610
 611&l4_per {					/* 0x48000000 */
 612	compatible = "ti,am4-l4-per", "simple-pm-bus";
 613	power-domains = <&prm_per>;
 614	clocks = <&l4ls_clkctrl AM4_L4LS_L4_LS_CLKCTRL 0>;
 615	clock-names = "fck";
 616	reg = <0x48000000 0x800>,
 617	      <0x48000800 0x800>,
 618	      <0x48001000 0x400>,
 619	      <0x48001400 0x400>,
 620	      <0x48001800 0x400>,
 621	      <0x48001c00 0x400>;
 622	reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
 623	#address-cells = <1>;
 624	#size-cells = <1>;
 625	ranges = <0x00000000 0x48000000 0x100000>,	/* segment 0 */
 626		 <0x00100000 0x48100000 0x100000>,	/* segment 1 */
 627		 <0x00200000 0x48200000 0x100000>,	/* segment 2 */
 628		 <0x00300000 0x48300000 0x100000>,	/* segment 3 */
 629		 <0x46000000 0x46000000 0x400000>,	/* l3 data port */
 630		 <0x46400000 0x46400000 0x400000>;	/* l3 data port */
 631
 632	segment@0 {					/* 0x48000000 */
 633		compatible = "simple-pm-bus";
 634		#address-cells = <1>;
 635		#size-cells = <1>;
 636		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
 637			 <0x00000800 0x00000800 0x000800>,	/* ap 1 */
 638			 <0x00001000 0x00001000 0x000400>,	/* ap 2 */
 639			 <0x00001400 0x00001400 0x000400>,	/* ap 3 */
 640			 <0x00001800 0x00001800 0x000400>,	/* ap 4 */
 641			 <0x00001c00 0x00001c00 0x000400>,	/* ap 5 */
 642			 <0x00008000 0x00008000 0x001000>,	/* ap 6 */
 643			 <0x00009000 0x00009000 0x001000>,	/* ap 7 */
 644			 <0x00022000 0x00022000 0x001000>,	/* ap 8 */
 645			 <0x00023000 0x00023000 0x001000>,	/* ap 9 */
 646			 <0x00024000 0x00024000 0x001000>,	/* ap 10 */
 647			 <0x00025000 0x00025000 0x001000>,	/* ap 11 */
 648			 <0x0002a000 0x0002a000 0x001000>,	/* ap 12 */
 649			 <0x0002b000 0x0002b000 0x001000>,	/* ap 13 */
 650			 <0x00038000 0x00038000 0x002000>,	/* ap 14 */
 651			 <0x0003a000 0x0003a000 0x001000>,	/* ap 15 */
 652			 <0x0003c000 0x0003c000 0x002000>,	/* ap 16 */
 653			 <0x0003e000 0x0003e000 0x001000>,	/* ap 17 */
 654			 <0x00040000 0x00040000 0x001000>,	/* ap 18 */
 655			 <0x00041000 0x00041000 0x001000>,	/* ap 19 */
 656			 <0x00042000 0x00042000 0x001000>,	/* ap 20 */
 657			 <0x00043000 0x00043000 0x001000>,	/* ap 21 */
 658			 <0x00044000 0x00044000 0x001000>,	/* ap 22 */
 659			 <0x00045000 0x00045000 0x001000>,	/* ap 23 */
 660			 <0x00046000 0x00046000 0x001000>,	/* ap 24 */
 661			 <0x00047000 0x00047000 0x001000>,	/* ap 25 */
 662			 <0x00048000 0x00048000 0x001000>,	/* ap 26 */
 663			 <0x00049000 0x00049000 0x001000>,	/* ap 27 */
 664			 <0x0004c000 0x0004c000 0x001000>,	/* ap 28 */
 665			 <0x0004d000 0x0004d000 0x001000>,	/* ap 29 */
 666			 <0x00060000 0x00060000 0x001000>,	/* ap 30 */
 667			 <0x00061000 0x00061000 0x001000>,	/* ap 31 */
 668			 <0x00080000 0x00080000 0x010000>,	/* ap 32 */
 669			 <0x00090000 0x00090000 0x001000>,	/* ap 33 */
 670			 <0x00030000 0x00030000 0x001000>,	/* ap 65 */
 671			 <0x00031000 0x00031000 0x001000>,	/* ap 66 */
 672			 <0x0004a000 0x0004a000 0x001000>,	/* ap 71 */
 673			 <0x0004b000 0x0004b000 0x001000>,	/* ap 72 */
 674			 <0x000c8000 0x000c8000 0x001000>,	/* ap 73 */
 675			 <0x000c9000 0x000c9000 0x001000>,	/* ap 74 */
 676			 <0x000ca000 0x000ca000 0x001000>,	/* ap 77 */
 677			 <0x000cb000 0x000cb000 0x001000>,	/* ap 78 */
 678			 <0x00034000 0x00034000 0x001000>,	/* ap 80 */
 679			 <0x00035000 0x00035000 0x001000>,	/* ap 81 */
 680			 <0x00036000 0x00036000 0x001000>,	/* ap 84 */
 681			 <0x00037000 0x00037000 0x001000>,	/* ap 85 */
 682			 <0x46000000 0x46000000 0x400000>,	/* l3 data port */
 683			 <0x46400000 0x46400000 0x400000>;	/* l3 data port */
 684
 685		target-module@8000 {			/* 0x48008000, ap 6 10.0 */
 686			compatible = "ti,sysc";
 687			status = "disabled";
 688			#address-cells = <1>;
 689			#size-cells = <1>;
 690			ranges = <0x0 0x8000 0x1000>;
 691		};
 692
 693		target-module@22000 {			/* 0x48022000, ap 8 0a.0 */
 694			compatible = "ti,sysc-omap2", "ti,sysc";
 695			reg = <0x22050 0x4>,
 696			      <0x22054 0x4>,
 697			      <0x22058 0x4>;
 698			reg-names = "rev", "sysc", "syss";
 699			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 700					 SYSC_OMAP2_SOFTRESET)>;
 701			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 702					<SYSC_IDLE_NO>,
 703					<SYSC_IDLE_SMART>,
 704					<SYSC_IDLE_SMART_WKUP>;
 705			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
 706			clocks = <&l4ls_clkctrl AM4_L4LS_UART2_CLKCTRL 0>;
 707			clock-names = "fck";
 708			#address-cells = <1>;
 709			#size-cells = <1>;
 710			ranges = <0x0 0x22000 0x1000>;
 711
 712			uart1: serial@0 {
 713				compatible = "ti,am4372-uart";
 714				reg = <0x0 0x2000>;
 715				interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 716				status = "disabled";
 717			};
 718		};
 719
 720		target-module@24000 {			/* 0x48024000, ap 10 1c.0 */
 721			compatible = "ti,sysc-omap2", "ti,sysc";
 722			reg = <0x24050 0x4>,
 723			      <0x24054 0x4>,
 724			      <0x24058 0x4>;
 725			reg-names = "rev", "sysc", "syss";
 726			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 727					 SYSC_OMAP2_SOFTRESET)>;
 728			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 729					<SYSC_IDLE_NO>,
 730					<SYSC_IDLE_SMART>,
 731					<SYSC_IDLE_SMART_WKUP>;
 732			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
 733			clocks = <&l4ls_clkctrl AM4_L4LS_UART3_CLKCTRL 0>;
 734			clock-names = "fck";
 735			#address-cells = <1>;
 736			#size-cells = <1>;
 737			ranges = <0x0 0x24000 0x1000>;
 738
 739			uart2: serial@0 {
 740				compatible = "ti,am4372-uart";
 741				reg = <0x0 0x2000>;
 742				interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 743				status = "disabled";
 744			};
 745		};
 746
 747		target-module@2a000 {			/* 0x4802a000, ap 12 22.0 */
 748			compatible = "ti,sysc-omap2", "ti,sysc";
 749			reg = <0x2a000 0x8>,
 750			      <0x2a010 0x8>,
 751			      <0x2a090 0x8>;
 752			reg-names = "rev", "sysc", "syss";
 753			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 754					 SYSC_OMAP2_ENAWAKEUP |
 755					 SYSC_OMAP2_SOFTRESET |
 756					 SYSC_OMAP2_AUTOIDLE)>;
 757			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 758					<SYSC_IDLE_NO>,
 759					<SYSC_IDLE_SMART>,
 760					<SYSC_IDLE_SMART_WKUP>;
 761			ti,syss-mask = <1>;
 762			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
 763			clocks = <&l4ls_clkctrl AM4_L4LS_I2C2_CLKCTRL 0>;
 764			clock-names = "fck";
 765			#address-cells = <1>;
 766			#size-cells = <1>;
 767			ranges = <0x0 0x2a000 0x1000>;
 768
 769			i2c1: i2c@0 {
 770				compatible = "ti,am4372-i2c","ti,omap4-i2c";
 771				reg = <0x0 0x1000>;
 772				interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 773				#address-cells = <1>;
 774				#size-cells = <0>;
 775				status = "disabled";
 776			};
 777		};
 778
 779		target-module@30000 {			/* 0x48030000, ap 65 08.0 */
 780			compatible = "ti,sysc-omap2", "ti,sysc";
 781			reg = <0x30000 0x4>,
 782			      <0x30110 0x4>,
 783			      <0x30114 0x4>;
 784			reg-names = "rev", "sysc", "syss";
 785			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 786					 SYSC_OMAP2_SOFTRESET |
 787					 SYSC_OMAP2_AUTOIDLE)>;
 788			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 789					<SYSC_IDLE_NO>,
 790					<SYSC_IDLE_SMART>;
 791			ti,syss-mask = <1>;
 792			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
 793			clocks = <&l4ls_clkctrl AM4_L4LS_SPI0_CLKCTRL 0>;
 794			clock-names = "fck";
 795			#address-cells = <1>;
 796			#size-cells = <1>;
 797			ranges = <0x0 0x30000 0x1000>;
 798
 799			spi0: spi@0 {
 800				compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 801				reg = <0x0 0x400>;
 802				interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 803				#address-cells = <1>;
 804				#size-cells = <0>;
 805				status = "disabled";
 806			};
 807		};
 808
 809		target-module@34000 {			/* 0x48034000, ap 80 56.0 */
 810			compatible = "ti,sysc";
 811			status = "disabled";
 812			#address-cells = <1>;
 813			#size-cells = <1>;
 814			ranges = <0x0 0x34000 0x1000>;
 815		};
 816
 817		target-module@36000 {			/* 0x48036000, ap 84 3e.0 */
 818			compatible = "ti,sysc";
 819			status = "disabled";
 820			#address-cells = <1>;
 821			#size-cells = <1>;
 822			ranges = <0x0 0x36000 0x1000>;
 823		};
 824
 825		target-module@38000 {			/* 0x48038000, ap 14 04.0 */
 826			compatible = "ti,sysc-omap4-simple", "ti,sysc";
 827			reg = <0x38000 0x4>,
 828			      <0x38004 0x4>;
 829			reg-names = "rev", "sysc";
 830			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 831					<SYSC_IDLE_NO>,
 832					<SYSC_IDLE_SMART>;
 833			/* Domains (P, C): per_pwrdm, l3s_clkdm */
 834			clocks = <&l3s_clkctrl AM4_L3S_MCASP0_CLKCTRL 0>;
 835			clock-names = "fck";
 836			#address-cells = <1>;
 837			#size-cells = <1>;
 838			ranges = <0x0 0x38000 0x2000>,
 839				 <0x46000000 0x46000000 0x400000>;
 840
 841			mcasp0: mcasp@0 {
 842				compatible = "ti,am33xx-mcasp-audio";
 843				reg = <0x0 0x2000>,
 844				      <0x46000000 0x400000>;
 845				reg-names = "mpu", "dat";
 846				interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
 847					     <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 848				interrupt-names = "tx", "rx";
 849				status = "disabled";
 850				dmas = <&edma 8 2>,
 851				       <&edma 9 2>;
 852				dma-names = "tx", "rx";
 853			};
 854		};
 855
 856		target-module@3c000 {			/* 0x4803c000, ap 16 2a.0 */
 857			compatible = "ti,sysc-omap4-simple", "ti,sysc";
 858			reg = <0x3c000 0x4>,
 859			      <0x3c004 0x4>;
 860			reg-names = "rev", "sysc";
 861			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 862					<SYSC_IDLE_NO>,
 863					<SYSC_IDLE_SMART>;
 864			/* Domains (P, C): per_pwrdm, l3s_clkdm */
 865			clocks = <&l3s_clkctrl AM4_L3S_MCASP1_CLKCTRL 0>;
 866			clock-names = "fck";
 867			#address-cells = <1>;
 868			#size-cells = <1>;
 869			ranges = <0x0 0x3c000 0x2000>,
 870				 <0x46400000 0x46400000 0x400000>;
 871
 872			mcasp1: mcasp@0 {
 873				compatible = "ti,am33xx-mcasp-audio";
 874				reg = <0x0 0x2000>,
 875				      <0x46400000 0x400000>;
 876				reg-names = "mpu", "dat";
 877				interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
 878					     <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 879				interrupt-names = "tx", "rx";
 880				status = "disabled";
 881				dmas = <&edma 10 2>,
 882				       <&edma 11 2>;
 883				dma-names = "tx", "rx";
 884			};
 885		};
 886
 887		timer2_target: target-module@40000 {	/* 0x48040000, ap 18 1e.0 */
 888			compatible = "ti,sysc-omap4-timer", "ti,sysc";
 889			reg = <0x40000 0x4>,
 890			      <0x40010 0x4>,
 891			      <0x40014 0x4>;
 892			reg-names = "rev", "sysc", "syss";
 893			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 894			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 895					<SYSC_IDLE_NO>,
 896					<SYSC_IDLE_SMART>,
 897					<SYSC_IDLE_SMART_WKUP>;
 898			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
 899			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER2_CLKCTRL 0>;
 900			clock-names = "fck";
 901			#address-cells = <1>;
 902			#size-cells = <1>;
 903			ranges = <0x0 0x40000 0x1000>;
 904
 905			timer2: timer@0  {
 906				compatible = "ti,am4372-timer","ti,am335x-timer";
 907				reg = <0x0 0x400>;
 908				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 909				clocks = <&timer2_fck>;
 910				clock-names = "fck";
 911			};
 912		};
 913
 914		target-module@42000 {			/* 0x48042000, ap 20 24.0 */
 915			compatible = "ti,sysc-omap4-timer", "ti,sysc";
 916			reg = <0x42000 0x4>,
 917			      <0x42010 0x4>,
 918			      <0x42014 0x4>;
 919			reg-names = "rev", "sysc", "syss";
 920			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 921			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 922					<SYSC_IDLE_NO>,
 923					<SYSC_IDLE_SMART>,
 924					<SYSC_IDLE_SMART_WKUP>;
 925			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
 926			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER3_CLKCTRL 0>;
 927			clock-names = "fck";
 928			#address-cells = <1>;
 929			#size-cells = <1>;
 930			ranges = <0x0 0x42000 0x1000>;
 931
 932			timer3: timer@0 {
 933				compatible = "ti,am4372-timer","ti,am335x-timer";
 934				reg = <0x0 0x400>;
 935				interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 936				status = "disabled";
 937			};
 938		};
 939
 940		target-module@44000 {			/* 0x48044000, ap 22 26.0 */
 941			compatible = "ti,sysc-omap4-timer", "ti,sysc";
 942			reg = <0x44000 0x4>,
 943			      <0x44010 0x4>,
 944			      <0x44014 0x4>;
 945			reg-names = "rev", "sysc", "syss";
 946			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 947			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 948					<SYSC_IDLE_NO>,
 949					<SYSC_IDLE_SMART>,
 950					<SYSC_IDLE_SMART_WKUP>;
 951			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
 952			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER4_CLKCTRL 0>;
 953			clock-names = "fck";
 954			#address-cells = <1>;
 955			#size-cells = <1>;
 956			ranges = <0x0 0x44000 0x1000>;
 957
 958			timer4: timer@0 {
 959				compatible = "ti,am4372-timer","ti,am335x-timer";
 960				reg = <0x0 0x400>;
 961				interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
 962				ti,timer-pwm;
 963				status = "disabled";
 964			};
 965		};
 966
 967		target-module@46000 {			/* 0x48046000, ap 24 28.0 */
 968			compatible = "ti,sysc-omap4-timer", "ti,sysc";
 969			reg = <0x46000 0x4>,
 970			      <0x46010 0x4>,
 971			      <0x46014 0x4>;
 972			reg-names = "rev", "sysc", "syss";
 973			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 974			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 975					<SYSC_IDLE_NO>,
 976					<SYSC_IDLE_SMART>,
 977					<SYSC_IDLE_SMART_WKUP>;
 978			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
 979			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER5_CLKCTRL 0>;
 980			clock-names = "fck";
 981			#address-cells = <1>;
 982			#size-cells = <1>;
 983			ranges = <0x0 0x46000 0x1000>;
 984
 985			timer5: timer@0 {
 986				compatible = "ti,am4372-timer","ti,am335x-timer";
 987				reg = <0x0 0x400>;
 988				interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 989				ti,timer-pwm;
 990				status = "disabled";
 991			};
 992		};
 993
 994		target-module@48000 {			/* 0x48048000, ap 26 1a.0 */
 995			compatible = "ti,sysc-omap4-timer", "ti,sysc";
 996			reg = <0x48000 0x4>,
 997			      <0x48010 0x4>,
 998			      <0x48014 0x4>;
 999			reg-names = "rev", "sysc", "syss";
1000			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1001			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1002					<SYSC_IDLE_NO>,
1003					<SYSC_IDLE_SMART>,
1004					<SYSC_IDLE_SMART_WKUP>;
1005			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1006			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER6_CLKCTRL 0>;
1007			clock-names = "fck";
1008			#address-cells = <1>;
1009			#size-cells = <1>;
1010			ranges = <0x0 0x48000 0x1000>;
1011
1012			timer6: timer@0 {
1013				compatible = "ti,am4372-timer","ti,am335x-timer";
1014				reg = <0x0 0x400>;
1015				interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
1016				ti,timer-pwm;
1017				status = "disabled";
1018			};
1019		};
1020
1021		target-module@4a000 {			/* 0x4804a000, ap 71 48.0 */
1022			compatible = "ti,sysc-omap4-timer", "ti,sysc";
1023			reg = <0x4a000 0x4>,
1024			      <0x4a010 0x4>,
1025			      <0x4a014 0x4>;
1026			reg-names = "rev", "sysc", "syss";
1027			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1028			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1029					<SYSC_IDLE_NO>,
1030					<SYSC_IDLE_SMART>,
1031					<SYSC_IDLE_SMART_WKUP>;
1032			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1033			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER7_CLKCTRL 0>;
1034			clock-names = "fck";
1035			#address-cells = <1>;
1036			#size-cells = <1>;
1037			ranges = <0x0 0x4a000 0x1000>;
1038
1039			timer7: timer@0 {
1040				compatible = "ti,am4372-timer","ti,am335x-timer";
1041				reg = <0x0 0x400>;
1042				interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
1043				ti,timer-pwm;
1044				status = "disabled";
1045			};
1046		};
1047
1048		target-module@4c000 {			/* 0x4804c000, ap 28 36.0 */
1049			compatible = "ti,sysc-omap2", "ti,sysc";
1050			reg = <0x4c000 0x4>,
1051			      <0x4c010 0x4>,
1052			      <0x4c114 0x4>;
1053			reg-names = "rev", "sysc", "syss";
1054			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1055					 SYSC_OMAP2_SOFTRESET |
1056					 SYSC_OMAP2_AUTOIDLE)>;
1057			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1058					<SYSC_IDLE_NO>,
1059					<SYSC_IDLE_SMART>,
1060					<SYSC_IDLE_SMART_WKUP>;
1061			ti,syss-mask = <1>;
1062			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1063			clocks = <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 0>,
1064				 <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 8>;
1065			clock-names = "fck", "dbclk";
1066			#address-cells = <1>;
1067			#size-cells = <1>;
1068			ranges = <0x0 0x4c000 0x1000>;
1069
1070			gpio1: gpio@0 {
1071				compatible = "ti,am4372-gpio","ti,omap4-gpio";
1072				reg = <0x0 0x1000>;
1073				interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1074				gpio-controller;
1075				#gpio-cells = <2>;
1076				interrupt-controller;
1077				#interrupt-cells = <2>;
1078				status = "disabled";
1079			};
1080		};
1081
1082		target-module@60000 {			/* 0x48060000, ap 30 14.0 */
1083			compatible = "ti,sysc-omap2", "ti,sysc";
1084			reg = <0x602fc 0x4>,
1085			      <0x60110 0x4>,
1086			      <0x60114 0x4>;
1087			reg-names = "rev", "sysc", "syss";
1088			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1089					 SYSC_OMAP2_ENAWAKEUP |
1090					 SYSC_OMAP2_SOFTRESET |
1091					 SYSC_OMAP2_AUTOIDLE)>;
1092			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1093					<SYSC_IDLE_NO>,
1094					<SYSC_IDLE_SMART>;
1095			ti,syss-mask = <1>;
1096			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1097			clocks = <&l4ls_clkctrl AM4_L4LS_MMC1_CLKCTRL 0>;
1098			clock-names = "fck";
1099			#address-cells = <1>;
1100			#size-cells = <1>;
1101			ranges = <0x0 0x60000 0x1000>;
1102
1103			mmc1: mmc@0 {
1104				compatible = "ti,am437-sdhci";
1105				reg = <0x0 0x1000>;
1106				dmas = <&edma 24 0>,
1107					<&edma 25 0>;
1108				dma-names = "tx", "rx";
1109				interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
1110				status = "disabled";
1111			};
1112		};
1113
1114		target-module@80000 {			/* 0x48080000, ap 32 18.0 */
1115			compatible = "ti,sysc-omap2", "ti,sysc";
1116			reg = <0x80000 0x4>,
1117			      <0x80010 0x4>,
1118			      <0x80014 0x4>;
1119			reg-names = "rev", "sysc", "syss";
1120			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1121					 SYSC_OMAP2_SOFTRESET |
1122					 SYSC_OMAP2_AUTOIDLE)>;
1123			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1124					<SYSC_IDLE_NO>,
1125					<SYSC_IDLE_SMART>;
1126			ti,syss-mask = <1>;
1127			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1128			clocks = <&l4ls_clkctrl AM4_L4LS_ELM_CLKCTRL 0>;
1129			clock-names = "fck";
1130			#address-cells = <1>;
1131			#size-cells = <1>;
1132			ranges = <0x0 0x80000 0x10000>;
1133
1134			elm: elm@0 {
1135				compatible = "ti,am3352-elm";
1136				reg = <0x0 0x2000>;
1137				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1138				clocks = <&l4ls_gclk>;
1139				clock-names = "fck";
1140				status = "disabled";
1141			};
1142		};
1143
1144		target-module@c8000 {			/* 0x480c8000, ap 73 06.0 */
1145			compatible = "ti,sysc-omap4", "ti,sysc";
1146			reg = <0xc8000 0x4>,
1147			      <0xc8010 0x4>;
1148			reg-names = "rev", "sysc";
1149			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1150			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1151					<SYSC_IDLE_NO>,
1152					<SYSC_IDLE_SMART>;
1153			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1154			clocks = <&l4ls_clkctrl AM4_L4LS_MAILBOX_CLKCTRL 0>;
1155			clock-names = "fck";
1156			#address-cells = <1>;
1157			#size-cells = <1>;
1158			ranges = <0x0 0xc8000 0x1000>;
1159
1160			mailbox: mailbox@0 {
1161				compatible = "ti,omap4-mailbox";
1162				reg = <0x0 0x200>;
1163				interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
1164				#mbox-cells = <1>;
1165				ti,mbox-num-users = <4>;
1166				ti,mbox-num-fifos = <8>;
1167				mbox_wkupm3: mbox-wkup-m3 {
1168					ti,mbox-send-noirq;
1169					ti,mbox-tx = <0 0 0>;
1170					ti,mbox-rx = <0 0 3>;
1171				};
1172			};
1173		};
1174
1175		target-module@ca000 {			/* 0x480ca000, ap 77 38.0 */
1176			compatible = "ti,sysc-omap2", "ti,sysc";
1177			reg = <0xca000 0x4>,
1178			      <0xca010 0x4>,
1179			      <0xca014 0x4>;
1180			reg-names = "rev", "sysc", "syss";
1181			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1182					 SYSC_OMAP2_ENAWAKEUP |
1183					 SYSC_OMAP2_SOFTRESET |
1184					 SYSC_OMAP2_AUTOIDLE)>;
1185			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1186					<SYSC_IDLE_NO>,
1187					<SYSC_IDLE_SMART>;
1188			ti,syss-mask = <1>;
1189			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1190			clocks = <&l4ls_clkctrl AM4_L4LS_SPINLOCK_CLKCTRL 0>;
1191			clock-names = "fck";
1192			#address-cells = <1>;
1193			#size-cells = <1>;
1194			ranges = <0x0 0xca000 0x1000>;
1195
1196			hwspinlock: spinlock@0 {
1197				compatible = "ti,omap4-hwspinlock";
1198				reg = <0x0 0x1000>;
1199				#hwlock-cells = <1>;
1200			};
1201		};
1202	};
1203
1204	segment@100000 {					/* 0x48100000 */
1205		compatible = "simple-pm-bus";
1206		#address-cells = <1>;
1207		#size-cells = <1>;
1208		ranges = <0x0008c000 0x0018c000 0x001000>,	/* ap 34 */
1209			 <0x0008d000 0x0018d000 0x001000>,	/* ap 35 */
1210			 <0x0008e000 0x0018e000 0x001000>,	/* ap 36 */
1211			 <0x0008f000 0x0018f000 0x001000>,	/* ap 37 */
1212			 <0x0009c000 0x0019c000 0x001000>,	/* ap 38 */
1213			 <0x0009d000 0x0019d000 0x001000>,	/* ap 39 */
1214			 <0x000a6000 0x001a6000 0x001000>,	/* ap 40 */
1215			 <0x000a7000 0x001a7000 0x001000>,	/* ap 41 */
1216			 <0x000a8000 0x001a8000 0x001000>,	/* ap 42 */
1217			 <0x000a9000 0x001a9000 0x001000>,	/* ap 43 */
1218			 <0x000aa000 0x001aa000 0x001000>,	/* ap 44 */
1219			 <0x000ab000 0x001ab000 0x001000>,	/* ap 45 */
1220			 <0x000ac000 0x001ac000 0x001000>,	/* ap 46 */
1221			 <0x000ad000 0x001ad000 0x001000>,	/* ap 47 */
1222			 <0x000ae000 0x001ae000 0x001000>,	/* ap 48 */
1223			 <0x000af000 0x001af000 0x001000>,	/* ap 49 */
1224			 <0x000cc000 0x001cc000 0x002000>,	/* ap 50 */
1225			 <0x000ce000 0x001ce000 0x002000>,	/* ap 51 */
1226			 <0x000d0000 0x001d0000 0x002000>,	/* ap 52 */
1227			 <0x000d2000 0x001d2000 0x002000>,	/* ap 53 */
1228			 <0x000d8000 0x001d8000 0x001000>,	/* ap 54 */
1229			 <0x000d9000 0x001d9000 0x001000>,	/* ap 55 */
1230			 <0x000a0000 0x001a0000 0x001000>,	/* ap 67 */
1231			 <0x000a1000 0x001a1000 0x001000>,	/* ap 68 */
1232			 <0x000a2000 0x001a2000 0x001000>,	/* ap 69 */
1233			 <0x000a3000 0x001a3000 0x001000>,	/* ap 70 */
1234			 <0x000a4000 0x001a4000 0x001000>,	/* ap 92 */
1235			 <0x000a5000 0x001a5000 0x001000>,	/* ap 93 */
1236			 <0x000c1000 0x001c1000 0x001000>,	/* ap 94 */
1237			 <0x000c2000 0x001c2000 0x001000>;	/* ap 95 */
1238
1239		target-module@8c000 {			/* 0x4818c000, ap 34 0c.0 */
1240			compatible = "ti,sysc";
1241			status = "disabled";
1242			#address-cells = <1>;
1243			#size-cells = <1>;
1244			ranges = <0x0 0x8c000 0x1000>;
1245		};
1246
1247		target-module@8e000 {			/* 0x4818e000, ap 36 02.0 */
1248			compatible = "ti,sysc";
1249			status = "disabled";
1250			#address-cells = <1>;
1251			#size-cells = <1>;
1252			ranges = <0x0 0x8e000 0x1000>;
1253		};
1254
1255		target-module@9c000 {			/* 0x4819c000, ap 38 52.0 */
1256			compatible = "ti,sysc-omap2", "ti,sysc";
1257			reg = <0x9c000 0x8>,
1258			      <0x9c010 0x8>,
1259			      <0x9c090 0x8>;
1260			reg-names = "rev", "sysc", "syss";
1261			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1262					 SYSC_OMAP2_ENAWAKEUP |
1263					 SYSC_OMAP2_SOFTRESET |
1264					 SYSC_OMAP2_AUTOIDLE)>;
1265			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1266					<SYSC_IDLE_NO>,
1267					<SYSC_IDLE_SMART>,
1268					<SYSC_IDLE_SMART_WKUP>;
1269			ti,syss-mask = <1>;
1270			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1271			clocks = <&l4ls_clkctrl AM4_L4LS_I2C3_CLKCTRL 0>;
1272			clock-names = "fck";
1273			#address-cells = <1>;
1274			#size-cells = <1>;
1275			ranges = <0x0 0x9c000 0x1000>;
1276
1277			i2c2: i2c@0 {
1278				compatible = "ti,am4372-i2c","ti,omap4-i2c";
1279				reg = <0x0 0x1000>;
1280				interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1281				#address-cells = <1>;
1282				#size-cells = <0>;
1283				status = "disabled";
1284			};
1285		};
1286
1287		target-module@a0000 {			/* 0x481a0000, ap 67 2c.0 */
1288			compatible = "ti,sysc-omap2", "ti,sysc";
1289			reg = <0xa0000 0x4>,
1290			      <0xa0110 0x4>,
1291			      <0xa0114 0x4>;
1292			reg-names = "rev", "sysc", "syss";
1293			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1294					 SYSC_OMAP2_SOFTRESET |
1295					 SYSC_OMAP2_AUTOIDLE)>;
1296			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1297					<SYSC_IDLE_NO>,
1298					<SYSC_IDLE_SMART>;
1299			ti,syss-mask = <1>;
1300			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1301			clocks = <&l4ls_clkctrl AM4_L4LS_SPI1_CLKCTRL 0>;
1302			clock-names = "fck";
1303			#address-cells = <1>;
1304			#size-cells = <1>;
1305			ranges = <0x0 0xa0000 0x1000>;
1306
1307			spi1: spi@0 {
1308				compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1309				reg = <0x0 0x400>;
1310				interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
1311				#address-cells = <1>;
1312				#size-cells = <0>;
1313				status = "disabled";
1314			};
1315		};
1316
1317		target-module@a2000 {			/* 0x481a2000, ap 69 2e.0 */
1318			compatible = "ti,sysc-omap2", "ti,sysc";
1319			reg = <0xa2000 0x4>,
1320			      <0xa2110 0x4>,
1321			      <0xa2114 0x4>;
1322			reg-names = "rev", "sysc", "syss";
1323			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1324					 SYSC_OMAP2_SOFTRESET |
1325					 SYSC_OMAP2_AUTOIDLE)>;
1326			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1327					<SYSC_IDLE_NO>,
1328					<SYSC_IDLE_SMART>;
1329			ti,syss-mask = <1>;
1330			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1331			clocks = <&l4ls_clkctrl AM4_L4LS_SPI2_CLKCTRL 0>;
1332			clock-names = "fck";
1333			#address-cells = <1>;
1334			#size-cells = <1>;
1335			ranges = <0x0 0xa2000 0x1000>;
1336
1337			spi2: spi@0 {
1338				compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1339				reg = <0x0 0x400>;
1340				interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
1341				#address-cells = <1>;
1342				#size-cells = <0>;
1343				status = "disabled";
1344			};
1345		};
1346
1347		target-module@a4000 {			/* 0x481a4000, ap 92 62.0 */
1348			compatible = "ti,sysc-omap2", "ti,sysc";
1349			reg = <0xa4000 0x4>,
1350			      <0xa4110 0x4>,
1351			      <0xa4114 0x4>;
1352			reg-names = "rev", "sysc", "syss";
1353			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1354					 SYSC_OMAP2_SOFTRESET |
1355					 SYSC_OMAP2_AUTOIDLE)>;
1356			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1357					<SYSC_IDLE_NO>,
1358					<SYSC_IDLE_SMART>;
1359			ti,syss-mask = <1>;
1360			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1361			clocks = <&l4ls_clkctrl AM4_L4LS_SPI3_CLKCTRL 0>;
1362			clock-names = "fck";
1363			#address-cells = <1>;
1364			#size-cells = <1>;
1365			ranges = <0x0 0xa4000 0x1000>;
1366
1367			spi3: spi@0 {
1368				compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1369				reg = <0x0 0x400>;
1370				interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
1371				#address-cells = <1>;
1372				#size-cells = <0>;
1373				status = "disabled";
1374			};
1375		};
1376
1377		target-module@a6000 {			/* 0x481a6000, ap 40 16.0 */
1378			compatible = "ti,sysc-omap2", "ti,sysc";
1379			reg = <0xa6050 0x4>,
1380			      <0xa6054 0x4>,
1381			      <0xa6058 0x4>;
1382			reg-names = "rev", "sysc", "syss";
1383			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1384					 SYSC_OMAP2_SOFTRESET)>;
1385			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1386					<SYSC_IDLE_NO>,
1387					<SYSC_IDLE_SMART>,
1388					<SYSC_IDLE_SMART_WKUP>;
1389			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1390			clocks = <&l4ls_clkctrl AM4_L4LS_UART4_CLKCTRL 0>;
1391			clock-names = "fck";
1392			#address-cells = <1>;
1393			#size-cells = <1>;
1394			ranges = <0x0 0xa6000 0x1000>;
1395
1396			uart3: serial@0 {
1397				compatible = "ti,am4372-uart";
1398				reg = <0x0 0x2000>;
1399				interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
1400				status = "disabled";
1401			};
1402		};
1403
1404		target-module@a8000 {			/* 0x481a8000, ap 42 20.0 */
1405			compatible = "ti,sysc-omap2", "ti,sysc";
1406			reg = <0xa8050 0x4>,
1407			      <0xa8054 0x4>,
1408			      <0xa8058 0x4>;
1409			reg-names = "rev", "sysc", "syss";
1410			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1411					 SYSC_OMAP2_SOFTRESET)>;
1412			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1413					<SYSC_IDLE_NO>,
1414					<SYSC_IDLE_SMART>,
1415					<SYSC_IDLE_SMART_WKUP>;
1416			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1417			clocks = <&l4ls_clkctrl AM4_L4LS_UART5_CLKCTRL 0>;
1418			clock-names = "fck";
1419			#address-cells = <1>;
1420			#size-cells = <1>;
1421			ranges = <0x0 0xa8000 0x1000>;
1422
1423			uart4: serial@0 {
1424				compatible = "ti,am4372-uart";
1425				reg = <0x0 0x2000>;
1426				interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1427				status = "disabled";
1428			};
1429		};
1430
1431		target-module@aa000 {			/* 0x481aa000, ap 44 12.0 */
1432			compatible = "ti,sysc-omap2", "ti,sysc";
1433			reg = <0xaa050 0x4>,
1434			      <0xaa054 0x4>,
1435			      <0xaa058 0x4>;
1436			reg-names = "rev", "sysc", "syss";
1437			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1438					 SYSC_OMAP2_SOFTRESET)>;
1439			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1440					<SYSC_IDLE_NO>,
1441					<SYSC_IDLE_SMART>,
1442					<SYSC_IDLE_SMART_WKUP>;
1443			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1444			clocks = <&l4ls_clkctrl AM4_L4LS_UART6_CLKCTRL 0>;
1445			clock-names = "fck";
1446			#address-cells = <1>;
1447			#size-cells = <1>;
1448			ranges = <0x0 0xaa000 0x1000>;
1449
1450			uart5: serial@0 {
1451				compatible = "ti,am4372-uart";
1452				reg = <0x0 0x2000>;
1453				interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1454				status = "disabled";
1455			};
1456		};
1457
1458		target-module@ac000 {			/* 0x481ac000, ap 46 30.0 */
1459			compatible = "ti,sysc-omap2", "ti,sysc";
1460			reg = <0xac000 0x4>,
1461			      <0xac010 0x4>,
1462			      <0xac114 0x4>;
1463			reg-names = "rev", "sysc", "syss";
1464			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1465					 SYSC_OMAP2_SOFTRESET |
1466					 SYSC_OMAP2_AUTOIDLE)>;
1467			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1468					<SYSC_IDLE_NO>,
1469					<SYSC_IDLE_SMART>,
1470					<SYSC_IDLE_SMART_WKUP>;
1471			ti,syss-mask = <1>;
1472			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1473			clocks = <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 0>,
1474				 <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 8>;
1475			clock-names = "fck", "dbclk";
1476			#address-cells = <1>;
1477			#size-cells = <1>;
1478			ranges = <0x0 0xac000 0x1000>;
1479
1480			gpio2: gpio@0 {
1481				compatible = "ti,am4372-gpio","ti,omap4-gpio";
1482				reg = <0x0 0x1000>;
1483				interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1484				gpio-controller;
1485				#gpio-cells = <2>;
1486				interrupt-controller;
1487				#interrupt-cells = <2>;
1488				status = "disabled";
1489			};
1490		};
1491
1492		target-module@ae000 {			/* 0x481ae000, ap 48 32.0 */
1493			compatible = "ti,sysc-omap2", "ti,sysc";
1494			reg = <0xae000 0x4>,
1495			      <0xae010 0x4>,
1496			      <0xae114 0x4>;
1497			reg-names = "rev", "sysc", "syss";
1498			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1499					 SYSC_OMAP2_SOFTRESET |
1500					 SYSC_OMAP2_AUTOIDLE)>;
1501			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1502					<SYSC_IDLE_NO>,
1503					<SYSC_IDLE_SMART>,
1504					<SYSC_IDLE_SMART_WKUP>;
1505			ti,syss-mask = <1>;
1506			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1507			clocks = <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 0>,
1508				 <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 8>;
1509			clock-names = "fck", "dbclk";
1510			#address-cells = <1>;
1511			#size-cells = <1>;
1512			ranges = <0x0 0xae000 0x1000>;
1513
1514			gpio3: gpio@0 {
1515				compatible = "ti,am4372-gpio","ti,omap4-gpio";
1516				reg = <0x0 0x1000>;
1517				interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
1518				gpio-controller;
1519				#gpio-cells = <2>;
1520				interrupt-controller;
1521				#interrupt-cells = <2>;
1522				status = "disabled";
1523			};
1524		};
1525
1526		target-module@c1000 {			/* 0x481c1000, ap 94 68.0 */
1527			compatible = "ti,sysc-omap4-timer", "ti,sysc";
1528			reg = <0xc1000 0x4>,
1529			      <0xc1010 0x4>,
1530			      <0xc1014 0x4>;
1531			reg-names = "rev", "sysc", "syss";
1532			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1533			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1534					<SYSC_IDLE_NO>,
1535					<SYSC_IDLE_SMART>,
1536					<SYSC_IDLE_SMART_WKUP>;
1537			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1538			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER8_CLKCTRL 0>;
1539			clock-names = "fck";
1540			#address-cells = <1>;
1541			#size-cells = <1>;
1542			ranges = <0x0 0xc1000 0x1000>;
1543
1544			timer8: timer@0 {
1545				compatible = "ti,am4372-timer","ti,am335x-timer";
1546				reg = <0x0 0x400>;
1547				interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
1548				status = "disabled";
1549			};
1550		};
1551
1552		target-module@cc000 {			/* 0x481cc000, ap 50 46.0 */
1553			compatible = "ti,sysc-omap4", "ti,sysc";
1554			reg = <0xcc020 0x4>;
1555			reg-names = "rev";
1556			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1557			clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>,
1558			<&dcan0_fck>;
1559			clock-names = "fck", "osc";
1560			#address-cells = <1>;
1561			#size-cells = <1>;
1562			ranges = <0x0 0xcc000 0x2000>;
1563
1564			dcan0: can@0 {
1565				compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1566				reg = <0x0 0x2000>;
1567				clocks = <&dcan0_fck>;
1568				clock-names = "fck";
1569				syscon-raminit = <&scm_conf 0x644 0>;
1570				interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1571				status = "disabled";
1572			};
1573		};
1574
1575		target-module@d0000 {			/* 0x481d0000, ap 52 3a.0 */
1576			compatible = "ti,sysc-omap4", "ti,sysc";
1577			reg = <0xd0020 0x4>;
1578			reg-names = "rev";
1579			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1580			clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>,
1581			<&dcan1_fck>;
1582			clock-names = "fck", "osc";
1583			#address-cells = <1>;
1584			#size-cells = <1>;
1585			ranges = <0x0 0xd0000 0x2000>;
1586
1587			dcan1: can@0 {
1588				compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1589				reg = <0x0 0x2000>;
1590				clocks = <&dcan1_fck>;
1591				clock-names = "fck";
1592				syscon-raminit = <&scm_conf 0x644 1>;
1593				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1594				status = "disabled";
1595			};
1596		};
1597
1598		target-module@d8000 {			/* 0x481d8000, ap 54 5e.0 */
1599			compatible = "ti,sysc-omap2", "ti,sysc";
1600			reg = <0xd82fc 0x4>,
1601			      <0xd8110 0x4>,
1602			      <0xd8114 0x4>;
1603			reg-names = "rev", "sysc", "syss";
1604			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1605					 SYSC_OMAP2_ENAWAKEUP |
1606					 SYSC_OMAP2_SOFTRESET |
1607					 SYSC_OMAP2_AUTOIDLE)>;
1608			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1609					<SYSC_IDLE_NO>,
1610					<SYSC_IDLE_SMART>;
1611			ti,syss-mask = <1>;
1612			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1613			clocks = <&l4ls_clkctrl AM4_L4LS_MMC2_CLKCTRL 0>;
1614			clock-names = "fck";
1615			#address-cells = <1>;
1616			#size-cells = <1>;
1617			ranges = <0x0 0xd8000 0x1000>;
1618
1619			mmc2: mmc@0 {
1620				compatible = "ti,am437-sdhci";
1621				reg = <0x0 0x1000>;
1622				dmas = <&edma 2 0>,
1623					<&edma 3 0>;
1624				dma-names = "tx", "rx";
1625				interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
1626				status = "disabled";
1627			};
1628		};
1629	};
1630
1631	segment@200000 {					/* 0x48200000 */
1632		compatible = "simple-pm-bus";
1633		#address-cells = <1>;
1634		#size-cells = <1>;
1635		ranges = <0x00000000 0x00200000 0x010000>;
1636
1637		target-module@0 {
1638			compatible = "ti,sysc-omap4-simple", "ti,sysc";
1639			power-domains = <&prm_mpu>;
1640			clocks = <&mpu_clkctrl AM4_MPU_MPU_CLKCTRL 0>;
1641			clock-names = "fck";
1642			ti,no-idle;
1643			#address-cells = <1>;
1644			#size-cells = <1>;
1645			ranges = <0 0 0x10000>;
1646
1647			mpu@0 {
1648				compatible = "ti,omap4-mpu";
1649				pm-sram = <&pm_sram_code
1650					   &pm_sram_data>;
1651			};
1652		};
1653	};
1654
1655	segment@300000 {					/* 0x48300000 */
1656		compatible = "simple-pm-bus";
1657		#address-cells = <1>;
1658		#size-cells = <1>;
1659		ranges = <0x00000000 0x00300000 0x001000>,	/* ap 56 */
1660			 <0x00001000 0x00301000 0x001000>,	/* ap 57 */
1661			 <0x00002000 0x00302000 0x001000>,	/* ap 58 */
1662			 <0x00003000 0x00303000 0x001000>,	/* ap 59 */
1663			 <0x00004000 0x00304000 0x001000>,	/* ap 60 */
1664			 <0x00005000 0x00305000 0x001000>,	/* ap 61 */
1665			 <0x00018000 0x00318000 0x004000>,	/* ap 62 */
1666			 <0x0001c000 0x0031c000 0x001000>,	/* ap 63 */
1667			 <0x00010000 0x00310000 0x002000>,	/* ap 64 */
1668			 <0x00028000 0x00328000 0x001000>,	/* ap 75 */
1669			 <0x00029000 0x00329000 0x001000>,	/* ap 76 */
1670			 <0x00012000 0x00312000 0x001000>,	/* ap 79 */
1671			 <0x00020000 0x00320000 0x001000>,	/* ap 82 */
1672			 <0x00021000 0x00321000 0x001000>,	/* ap 83 */
1673			 <0x00026000 0x00326000 0x001000>,	/* ap 86 */
1674			 <0x00027000 0x00327000 0x001000>,	/* ap 87 */
1675			 <0x0002a000 0x0032a000 0x000400>,	/* ap 88 */
1676			 <0x0002c000 0x0032c000 0x001000>,	/* ap 89 */
1677			 <0x00013000 0x00313000 0x001000>,	/* ap 90 */
1678			 <0x00014000 0x00314000 0x001000>,	/* ap 91 */
1679			 <0x00006000 0x00306000 0x001000>,	/* ap 96 */
1680			 <0x00007000 0x00307000 0x001000>,	/* ap 97 */
1681			 <0x00008000 0x00308000 0x001000>,	/* ap 98 */
1682			 <0x00009000 0x00309000 0x001000>,	/* ap 99 */
1683			 <0x0000a000 0x0030a000 0x001000>,	/* ap 100 */
1684			 <0x0000b000 0x0030b000 0x001000>,	/* ap 101 */
1685			 <0x0003d000 0x0033d000 0x001000>,	/* ap 102 */
1686			 <0x0003e000 0x0033e000 0x001000>,	/* ap 103 */
1687			 <0x0003f000 0x0033f000 0x001000>,	/* ap 104 */
1688			 <0x00040000 0x00340000 0x001000>,	/* ap 105 */
1689			 <0x00041000 0x00341000 0x001000>,	/* ap 106 */
1690			 <0x00042000 0x00342000 0x001000>,	/* ap 107 */
1691			 <0x00045000 0x00345000 0x001000>,	/* ap 108 */
1692			 <0x00046000 0x00346000 0x001000>,	/* ap 109 */
1693			 <0x00047000 0x00347000 0x001000>,	/* ap 110 */
1694			 <0x00048000 0x00348000 0x001000>,	/* ap 111 */
1695			 <0x000f2000 0x003f2000 0x002000>,	/* ap 112 */
1696			 <0x000f4000 0x003f4000 0x001000>,	/* ap 113 */
1697			 <0x0004c000 0x0034c000 0x002000>,	/* ap 114 */
1698			 <0x0004e000 0x0034e000 0x001000>,	/* ap 115 */
1699			 <0x00022000 0x00322000 0x001000>,	/* ap 116 */
1700			 <0x00023000 0x00323000 0x001000>,	/* ap 117 */
1701			 <0x000f0000 0x003f0000 0x001000>,	/* ap 118 */
1702			 <0x0002a400 0x0032a400 0x000400>,	/* ap 119 */
1703			 <0x0002a800 0x0032a800 0x000400>,	/* ap 120 */
1704			 <0x0002ac00 0x0032ac00 0x000400>,	/* ap 121 */
1705			 <0x0002b000 0x0032b000 0x001000>,	/* ap 122 */
1706			 <0x00080000 0x00380000 0x020000>,	/* ap 123 */
1707			 <0x000a0000 0x003a0000 0x001000>,	/* ap 124 */
1708			 <0x000a8000 0x003a8000 0x008000>,	/* ap 125 */
1709			 <0x000b0000 0x003b0000 0x001000>,	/* ap 126 */
1710			 <0x000c0000 0x003c0000 0x020000>,	/* ap 127 */
1711			 <0x000e0000 0x003e0000 0x001000>,	/* ap 128 */
1712			 <0x000e8000 0x003e8000 0x008000>;	/* ap 129 */
1713
1714		target-module@0 {			/* 0x48300000, ap 56 40.0 */
1715			compatible = "ti,sysc-omap4", "ti,sysc";
1716			reg = <0x0 0x4>,
1717			      <0x4 0x4>;
1718			reg-names = "rev", "sysc";
1719			ti,sysc-midle = <SYSC_IDLE_FORCE>,
1720					<SYSC_IDLE_NO>,
1721					<SYSC_IDLE_SMART>,
1722					<SYSC_IDLE_SMART_WKUP>;
1723			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1724					<SYSC_IDLE_NO>,
1725					<SYSC_IDLE_SMART>,
1726					<SYSC_IDLE_SMART_WKUP>;
1727			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1728			clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS0_CLKCTRL 0>;
1729			clock-names = "fck";
1730			#address-cells = <1>;
1731			#size-cells = <1>;
1732			ranges = <0x0 0x0 0x1000>;
1733
1734			epwmss0: epwmss@0 {
1735				compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1736				reg = <0x0 0x10>;
1737				#address-cells = <1>;
1738				#size-cells = <1>;
1739				ranges = <0 0 0x1000>;
1740				status = "disabled";
1741
1742				ecap0: pwm@100 {
1743					compatible = "ti,am4372-ecap",
1744						     "ti,am3352-ecap";
1745					#pwm-cells = <3>;
1746					reg = <0x100 0x80>;
1747					clocks = <&l4ls_gclk>;
1748					clock-names = "fck";
1749					status = "disabled";
1750				};
1751
1752				ehrpwm0: pwm@200 {
1753					compatible = "ti,am4372-ehrpwm",
1754						     "ti,am3352-ehrpwm";
1755					#pwm-cells = <3>;
1756					reg = <0x200 0x80>;
1757					clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
1758					clock-names = "tbclk", "fck";
1759					status = "disabled";
1760				};
1761			};
1762		};
1763
1764		target-module@2000 {			/* 0x48302000, ap 58 4a.0 */
1765			compatible = "ti,sysc-omap4", "ti,sysc";
1766			reg = <0x2000 0x4>,
1767			      <0x2004 0x4>;
1768			reg-names = "rev", "sysc";
1769			ti,sysc-midle = <SYSC_IDLE_FORCE>,
1770					<SYSC_IDLE_NO>,
1771					<SYSC_IDLE_SMART>,
1772					<SYSC_IDLE_SMART_WKUP>;
1773			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1774					<SYSC_IDLE_NO>,
1775					<SYSC_IDLE_SMART>,
1776					<SYSC_IDLE_SMART_WKUP>;
1777			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1778			clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS1_CLKCTRL 0>;
1779			clock-names = "fck";
1780			#address-cells = <1>;
1781			#size-cells = <1>;
1782			ranges = <0x0 0x2000 0x1000>;
1783
1784			epwmss1: epwmss@0 {
1785				compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1786				reg = <0x0 0x10>;
1787				#address-cells = <1>;
1788				#size-cells = <1>;
1789				ranges = <0 0 0x1000>;
1790				status = "disabled";
1791
1792				ecap1: pwm@100 {
1793					compatible = "ti,am4372-ecap",
1794						     "ti,am3352-ecap";
1795					#pwm-cells = <3>;
1796					reg = <0x100 0x80>;
1797					clocks = <&l4ls_gclk>;
1798					clock-names = "fck";
1799					status = "disabled";
1800				};
1801
1802				ehrpwm1: pwm@200 {
1803					compatible = "ti,am4372-ehrpwm",
1804						     "ti,am3352-ehrpwm";
1805					#pwm-cells = <3>;
1806					reg = <0x200 0x80>;
1807					clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
1808					clock-names = "tbclk", "fck";
1809					status = "disabled";
1810				};
1811			};
1812		};
1813
1814		target-module@4000 {			/* 0x48304000, ap 60 44.0 */
1815			compatible = "ti,sysc-omap4", "ti,sysc";
1816			reg = <0x4000 0x4>,
1817			      <0x4004 0x4>;
1818			reg-names = "rev", "sysc";
1819			ti,sysc-midle = <SYSC_IDLE_FORCE>,
1820					<SYSC_IDLE_NO>,
1821					<SYSC_IDLE_SMART>,
1822					<SYSC_IDLE_SMART_WKUP>;
1823			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1824					<SYSC_IDLE_NO>,
1825					<SYSC_IDLE_SMART>,
1826					<SYSC_IDLE_SMART_WKUP>;
1827			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1828			clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS2_CLKCTRL 0>;
1829			clock-names = "fck";
1830			#address-cells = <1>;
1831			#size-cells = <1>;
1832			ranges = <0x0 0x4000 0x1000>;
1833
1834			epwmss2: epwmss@0 {
1835				compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1836				reg = <0x0 0x10>;
1837				#address-cells = <1>;
1838				#size-cells = <1>;
1839				ranges = <0 0 0x1000>;
1840				status = "disabled";
1841
1842				ecap2: pwm@100 {
1843					compatible = "ti,am4372-ecap",
1844						     "ti,am3352-ecap";
1845					#pwm-cells = <3>;
1846					reg = <0x100 0x80>;
1847					clocks = <&l4ls_gclk>;
1848					clock-names = "fck";
1849					status = "disabled";
1850				};
1851
1852				ehrpwm2: pwm@200 {
1853					compatible = "ti,am4372-ehrpwm",
1854						     "ti,am3352-ehrpwm";
1855					#pwm-cells = <3>;
1856					reg = <0x200 0x80>;
1857					clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
1858					clock-names = "tbclk", "fck";
1859					status = "disabled";
1860				};
1861			};
1862		};
1863
1864		target-module@6000 {			/* 0x48306000, ap 96 58.0 */
1865			compatible = "ti,sysc-omap4", "ti,sysc";
1866			reg = <0x6000 0x4>,
1867			      <0x6004 0x4>;
1868			reg-names = "rev", "sysc";
1869			ti,sysc-midle = <SYSC_IDLE_FORCE>,
1870					<SYSC_IDLE_NO>,
1871					<SYSC_IDLE_SMART>,
1872					<SYSC_IDLE_SMART_WKUP>;
1873			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1874					<SYSC_IDLE_NO>,
1875					<SYSC_IDLE_SMART>,
1876					<SYSC_IDLE_SMART_WKUP>;
1877			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1878			clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS3_CLKCTRL 0>;
1879			clock-names = "fck";
1880			#address-cells = <1>;
1881			#size-cells = <1>;
1882			ranges = <0x0 0x6000 0x1000>;
1883
1884			epwmss3: epwmss@0 {
1885				compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1886				reg = <0x0 0x10>;
1887				#address-cells = <1>;
1888				#size-cells = <1>;
1889				ranges = <0 0 0x1000>;
1890				status = "disabled";
1891
1892				ehrpwm3: pwm@200 {
1893					compatible = "ti,am4372-ehrpwm",
1894						     "ti,am3352-ehrpwm";
1895					#pwm-cells = <3>;
1896					reg = <0x200 0x80>;
1897					clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>;
1898					clock-names = "tbclk", "fck";
1899					status = "disabled";
1900				};
1901			};
1902		};
1903
1904		target-module@8000 {			/* 0x48308000, ap 98 54.0 */
1905			compatible = "ti,sysc-omap4", "ti,sysc";
1906			reg = <0x8000 0x4>,
1907			      <0x8004 0x4>;
1908			reg-names = "rev", "sysc";
1909			ti,sysc-midle = <SYSC_IDLE_FORCE>,
1910					<SYSC_IDLE_NO>,
1911					<SYSC_IDLE_SMART>,
1912					<SYSC_IDLE_SMART_WKUP>;
1913			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1914					<SYSC_IDLE_NO>,
1915					<SYSC_IDLE_SMART>,
1916					<SYSC_IDLE_SMART_WKUP>;
1917			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1918			clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS4_CLKCTRL 0>;
1919			clock-names = "fck";
1920			#address-cells = <1>;
1921			#size-cells = <1>;
1922			ranges = <0x0 0x8000 0x1000>;
1923
1924			epwmss4: epwmss@0 {
1925				compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1926				reg = <0x0 0x10>;
1927				#address-cells = <1>;
1928				#size-cells = <1>;
1929				ranges = <0 0 0x1000>;
1930				status = "disabled";
1931
1932				ehrpwm4: pwm@48308200 {
1933					compatible = "ti,am4372-ehrpwm",
1934						     "ti,am3352-ehrpwm";
1935					#pwm-cells = <3>;
1936					reg = <0x200 0x80>;
1937					clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>;
1938					clock-names = "tbclk", "fck";
1939					status = "disabled";
1940				};
1941			};
1942		};
1943
1944		target-module@a000 {			/* 0x4830a000, ap 100 60.0 */
1945			compatible = "ti,sysc-omap4", "ti,sysc";
1946			reg = <0xa000 0x4>,
1947			      <0xa004 0x4>;
1948			reg-names = "rev", "sysc";
1949			ti,sysc-midle = <SYSC_IDLE_FORCE>,
1950					<SYSC_IDLE_NO>,
1951					<SYSC_IDLE_SMART>,
1952					<SYSC_IDLE_SMART_WKUP>;
1953			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1954					<SYSC_IDLE_NO>,
1955					<SYSC_IDLE_SMART>,
1956					<SYSC_IDLE_SMART_WKUP>;
1957			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1958			clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS5_CLKCTRL 0>;
1959			clock-names = "fck";
1960			#address-cells = <1>;
1961			#size-cells = <1>;
1962			ranges = <0x0 0xa000 0x1000>;
1963
1964			epwmss5: epwmss@0 {
1965				compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1966				reg = <0x0 0x10>;
1967				#address-cells = <1>;
1968				#size-cells = <1>;
1969				ranges = <0 0 0x1000>;
1970				status = "disabled";
1971
1972				ehrpwm5: pwm@200 {
1973					compatible = "ti,am4372-ehrpwm",
1974						     "ti,am3352-ehrpwm";
1975					#pwm-cells = <3>;
1976					reg = <0x200 0x80>;
1977					clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>;
1978					clock-names = "tbclk", "fck";
1979					status = "disabled";
1980				};
1981			};
1982		};
1983
1984		target-module@10000 {			/* 0x48310000, ap 64 4e.1 */
1985			compatible = "ti,sysc-omap2", "ti,sysc";
1986			reg = <0x11fe0 0x4>,
1987			      <0x11fe4 0x4>;
1988			reg-names = "rev", "sysc";
1989			ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>;
1990			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1991					<SYSC_IDLE_NO>;
1992			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1993			clocks = <&l4ls_clkctrl AM4_L4LS_RNG_CLKCTRL 0>;
1994			clock-names = "fck";
1995			#address-cells = <1>;
1996			#size-cells = <1>;
1997			ranges = <0x0 0x10000 0x2000>;
1998
1999			rng: rng@0 {
2000				compatible = "ti,omap4-rng";
2001				reg = <0x0 0x2000>;
2002				interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
2003			};
2004		};
2005
2006		target-module@13000 {			/* 0x48313000, ap 90 50.0 */
2007			compatible = "ti,sysc";
2008			status = "disabled";
2009			#address-cells = <1>;
2010			#size-cells = <1>;
2011			ranges = <0x0 0x13000 0x1000>;
2012		};
2013
2014		target-module@18000 {			/* 0x48318000, ap 62 4c.0 */
2015			compatible = "ti,sysc";
2016			status = "disabled";
2017			#address-cells = <1>;
2018			#size-cells = <1>;
2019			ranges = <0x0 0x18000 0x4000>;
2020		};
2021
2022		target-module@20000 {			/* 0x48320000, ap 82 34.0 */
2023			compatible = "ti,sysc-omap2", "ti,sysc";
2024			reg = <0x20000 0x4>,
2025			      <0x20010 0x4>,
2026			      <0x20114 0x4>;
2027			reg-names = "rev", "sysc", "syss";
2028			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2029					 SYSC_OMAP2_SOFTRESET |
2030					 SYSC_OMAP2_AUTOIDLE)>;
2031			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2032					<SYSC_IDLE_NO>,
2033					<SYSC_IDLE_SMART>,
2034					<SYSC_IDLE_SMART_WKUP>;
2035			ti,syss-mask = <1>;
2036			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2037			clocks = <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 0>,
2038				 <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 8>;
2039			clock-names = "fck", "dbclk";
2040			#address-cells = <1>;
2041			#size-cells = <1>;
2042			ranges = <0x0 0x20000 0x1000>;
2043
2044			gpio4: gpio@0 {
2045				compatible = "ti,am4372-gpio","ti,omap4-gpio";
2046				reg = <0x0 0x1000>;
2047				interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
2048				gpio-controller;
2049				#gpio-cells = <2>;
2050				interrupt-controller;
2051				#interrupt-cells = <2>;
2052				status = "disabled";
2053			};
2054		};
2055
2056		gpio5_target: target-module@22000 {		/* 0x48322000, ap 116 64.0 */
2057			compatible = "ti,sysc-omap2", "ti,sysc";
2058			reg = <0x22000 0x4>,
2059			      <0x22010 0x4>,
2060			      <0x22114 0x4>;
2061			reg-names = "rev", "sysc", "syss";
2062			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2063					 SYSC_OMAP2_SOFTRESET |
2064					 SYSC_OMAP2_AUTOIDLE)>;
2065			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2066					<SYSC_IDLE_NO>,
2067					<SYSC_IDLE_SMART>,
2068					<SYSC_IDLE_SMART_WKUP>;
2069			ti,syss-mask = <1>;
2070			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2071			clocks = <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 0>,
2072				 <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 8>;
2073			clock-names = "fck", "dbclk";
2074			#address-cells = <1>;
2075			#size-cells = <1>;
2076			ranges = <0x0 0x22000 0x1000>;
2077
2078			gpio5: gpio@0 {
2079				compatible = "ti,am4372-gpio","ti,omap4-gpio";
2080				reg = <0x0 0x1000>;
2081				interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2082				gpio-controller;
2083				#gpio-cells = <2>;
2084				interrupt-controller;
2085				#interrupt-cells = <2>;
2086				status = "disabled";
2087			};
2088		};
2089
2090		target-module@26000 {			/* 0x48326000, ap 86 66.0 */
2091			compatible = "ti,sysc-omap4", "ti,sysc";
2092			reg = <0x26000 0x4>,
2093			      <0x26104 0x4>;
2094			reg-names = "rev", "sysc";
2095			ti,sysc-midle = <SYSC_IDLE_FORCE>,
2096					<SYSC_IDLE_NO>,
2097					<SYSC_IDLE_SMART>;
2098			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2099					<SYSC_IDLE_NO>,
2100					<SYSC_IDLE_SMART>;
2101			/* Domains (P, C): per_pwrdm, l3s_clkdm */
2102			clocks = <&l3s_clkctrl AM4_L3S_VPFE0_CLKCTRL 0>;
2103			clock-names = "fck";
2104			#address-cells = <1>;
2105			#size-cells = <1>;
2106			ranges = <0x0 0x26000 0x1000>;
2107
2108			vpfe0: vpfe@0 {
2109				compatible = "ti,am437x-vpfe";
2110				reg = <0x0 0x2000>;
2111				interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2112				status = "disabled";
2113			};
2114		};
2115
2116		target-module@28000 {			/* 0x48328000, ap 75 0e.0 */
2117			compatible = "ti,sysc-omap4", "ti,sysc";
2118			reg = <0x28000 0x4>,
2119			      <0x28104 0x4>;
2120			reg-names = "rev", "sysc";
2121			ti,sysc-midle = <SYSC_IDLE_FORCE>,
2122					<SYSC_IDLE_NO>,
2123					<SYSC_IDLE_SMART>;
2124			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2125					<SYSC_IDLE_NO>,
2126					<SYSC_IDLE_SMART>;
2127			/* Domains (P, C): per_pwrdm, l3s_clkdm */
2128			clocks = <&l3s_clkctrl AM4_L3S_VPFE1_CLKCTRL 0>;
2129			clock-names = "fck";
2130			#address-cells = <1>;
2131			#size-cells = <1>;
2132			ranges = <0x0 0x28000 0x1000>;
2133
2134			vpfe1: vpfe@0 {
2135				compatible = "ti,am437x-vpfe";
2136				reg = <0x0 0x2000>;
2137				interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
2138				status = "disabled";
2139			};
2140		};
2141
2142		target-module@2a000 {			/* 0x4832a000, ap 88 3c.0 */
2143			compatible = "ti,sysc-omap2", "ti,sysc";
2144			reg = <0x2a000 0x4>,
2145			      <0x2a010 0x4>,
2146			      <0x2a014 0x4>;
2147			reg-names = "rev", "sysc", "syss";
2148			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2149					 SYSC_OMAP2_AUTOIDLE)>;
2150			ti,syss-mask = <1>;
2151			/* Domains (P, C): per_pwrdm, dss_clkdm */
2152			clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2153			clock-names = "fck";
2154			#address-cells = <1>;
2155			#size-cells = <1>;
2156			ranges = <0x00000000 0x0002a000 0x00000400>,
2157				 <0x00000400 0x0002a400 0x00000400>,
2158				 <0x00000800 0x0002a800 0x00000400>,
2159				 <0x00000c00 0x0002ac00 0x00000400>,
2160				 <0x00001000 0x0002b000 0x00001000>;
2161
2162			dss: dss@0 {
2163				compatible = "ti,omap3-dss";
2164				reg = <0 0x200>;
2165				status = "disabled";
2166				clocks = <&disp_clk>;
2167				clock-names = "fck";
2168				#address-cells = <1>;
2169				#size-cells = <1>;
2170				ranges = <0x00000000 0x00000000 0x00000400>,
2171					 <0x00000400 0x00000400 0x00000400>,
2172					 <0x00000800 0x00000800 0x00000400>,
2173					 <0x00000c00 0x00000c00 0x00000400>,
2174					 <0x00001000 0x00001000 0x00001000>;
2175
2176				target-module@400 {
2177					compatible = "ti,sysc-omap2", "ti,sysc";
2178					reg = <0x400 0x4>,
2179					      <0x410 0x4>,
2180					      <0x414 0x4>;
2181					reg-names = "rev", "sysc", "syss";
2182					ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2183							<SYSC_IDLE_NO>,
2184							<SYSC_IDLE_SMART>;
2185					ti,sysc-midle = <SYSC_IDLE_FORCE>,
2186							<SYSC_IDLE_NO>,
2187							<SYSC_IDLE_SMART>;
2188					ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2189							 SYSC_OMAP2_ENAWAKEUP |
2190							 SYSC_OMAP2_SOFTRESET |
2191							 SYSC_OMAP2_AUTOIDLE)>;
2192					ti,syss-mask = <1>;
2193					clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2194					clock-names = "fck";
2195					#address-cells = <1>;
2196					#size-cells = <1>;
2197					ranges = <0 0x400 0x400>;
2198
2199					dispc: dispc@0 {
2200						compatible = "ti,omap3-dispc";
2201						reg = <0 0x400>;
2202						interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
2203						clocks = <&disp_clk>;
2204						clock-names = "fck";
2205
2206						max-memory-bandwidth = <230000000>;
2207					};
2208				};
2209
2210				target-module@800 {
2211					compatible = "ti,sysc-omap2", "ti,sysc";
2212					reg = <0x800 0x4>,
2213					      <0x810 0x4>,
2214					      <0x814 0x4>;
2215					reg-names = "rev", "sysc", "syss";
2216					ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2217							<SYSC_IDLE_NO>,
2218							<SYSC_IDLE_SMART>;
2219					ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2220							 SYSC_OMAP2_AUTOIDLE)>;
2221					ti,syss-mask = <1>;
2222					clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2223					clock-names = "fck";
2224					#address-cells = <1>;
2225					#size-cells = <1>;
2226					ranges = <0 0x800 0x400>;
2227
2228					rfbi: rfbi@0 {
2229						compatible = "ti,omap3-rfbi";
2230						reg = <0 0x100>;
2231						clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2232						clock-names = "fck";
2233						status = "disabled";
2234					};
2235				};
2236			};
2237		};
2238
2239		target-module@3d000 {			/* 0x4833d000, ap 102 6e.0 */
2240			compatible = "ti,sysc-omap4-timer", "ti,sysc";
2241			reg = <0x3d000 0x4>,
2242			      <0x3d010 0x4>,
2243			      <0x3d014 0x4>;
2244			reg-names = "rev", "sysc", "syss";
2245			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2246			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2247					<SYSC_IDLE_NO>,
2248					<SYSC_IDLE_SMART>,
2249					<SYSC_IDLE_SMART_WKUP>;
2250			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2251			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER9_CLKCTRL 0>;
2252			clock-names = "fck";
2253			#address-cells = <1>;
2254			#size-cells = <1>;
2255			ranges = <0x0 0x3d000 0x1000>;
2256
2257			timer9: timer@0 {
2258				compatible = "ti,am4372-timer","ti,am335x-timer";
2259				reg = <0x0 0x400>;
2260				interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
2261				status = "disabled";
2262			};
2263		};
2264
2265		target-module@3f000 {			/* 0x4833f000, ap 104 5c.0 */
2266			compatible = "ti,sysc-omap4-timer", "ti,sysc";
2267			reg = <0x3f000 0x4>,
2268			      <0x3f010 0x4>,
2269			      <0x3f014 0x4>;
2270			reg-names = "rev", "sysc", "syss";
2271			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2272			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2273					<SYSC_IDLE_NO>,
2274					<SYSC_IDLE_SMART>,
2275					<SYSC_IDLE_SMART_WKUP>;
2276			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2277			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER10_CLKCTRL 0>;
2278			clock-names = "fck";
2279			#address-cells = <1>;
2280			#size-cells = <1>;
2281			ranges = <0x0 0x3f000 0x1000>;
2282
2283			timer10: timer@0 {
2284				compatible = "ti,am4372-timer","ti,am335x-timer";
2285				reg = <0x0 0x400>;
2286				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
2287				status = "disabled";
2288			};
2289		};
2290
2291		target-module@41000 {			/* 0x48341000, ap 106 76.0 */
2292			compatible = "ti,sysc-omap4-timer", "ti,sysc";
2293			reg = <0x41000 0x4>,
2294			      <0x41010 0x4>,
2295			      <0x41014 0x4>;
2296			reg-names = "rev", "sysc", "syss";
2297			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2298			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2299					<SYSC_IDLE_NO>,
2300					<SYSC_IDLE_SMART>,
2301					<SYSC_IDLE_SMART_WKUP>;
2302			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2303			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER11_CLKCTRL 0>;
2304			clock-names = "fck";
2305			#address-cells = <1>;
2306			#size-cells = <1>;
2307			ranges = <0x0 0x41000 0x1000>;
2308
2309			timer11: timer@0 {
2310				compatible = "ti,am4372-timer","ti,am335x-timer";
2311				reg = <0x0 0x400>;
2312				interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
2313				status = "disabled";
2314			};
2315		};
2316
2317		target-module@45000 {			/* 0x48345000, ap 108 6a.0 */
2318			compatible = "ti,sysc-omap2", "ti,sysc";
2319			reg = <0x45000 0x4>,
2320			      <0x45110 0x4>,
2321			      <0x45114 0x4>;
2322			reg-names = "rev", "sysc", "syss";
2323			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2324					 SYSC_OMAP2_SOFTRESET |
2325					 SYSC_OMAP2_AUTOIDLE)>;
2326			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2327					<SYSC_IDLE_NO>,
2328					<SYSC_IDLE_SMART>;
2329			ti,syss-mask = <1>;
2330			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2331			clocks = <&l4ls_clkctrl AM4_L4LS_SPI4_CLKCTRL 0>;
2332			clock-names = "fck";
2333			#address-cells = <1>;
2334			#size-cells = <1>;
2335			ranges = <0x0 0x45000 0x1000>;
2336
2337			spi4: spi@0 {
2338				compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
2339				reg = <0x0 0x400>;
2340				interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
2341				#address-cells = <1>;
2342				#size-cells = <0>;
2343				status = "disabled";
2344			};
2345		};
2346
2347		target-module@47000 {			/* 0x48347000, ap 110 70.0 */
2348			compatible = "ti,sysc-omap2", "ti,sysc";
2349			reg = <0x47000 0x4>,
2350			      <0x47014 0x4>,
2351			      <0x47018 0x4>;
2352			reg-names = "rev", "sysc", "syss";
2353			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2354					 SYSC_OMAP2_AUTOIDLE)>;
2355			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2356			clocks = <&l4ls_clkctrl AM4_L4LS_HDQ1W_CLKCTRL 0>;
2357			clock-names = "fck";
2358			#address-cells = <1>;
2359			#size-cells = <1>;
2360			ranges = <0x0 0x47000 0x1000>;
2361
2362			hdq: hdq@0 {
2363				compatible = "ti,am4372-hdq";
2364				reg = <0x0 0x1000>;
2365				interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
2366				clocks = <&func_12m_clk>;
2367				clock-names = "fck";
2368				status = "disabled";
2369			};
2370		};
2371
2372		target-module@4c000 {			/* 0x4834c000, ap 114 72.0 */
2373			compatible = "ti,sysc-omap4", "ti,sysc";
2374			reg = <0x4c000 0x4>,
2375			      <0x4c010 0x4>;
2376			reg-names = "rev", "sysc";
2377			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2378					<SYSC_IDLE_NO>,
2379					<SYSC_IDLE_SMART>;
2380			clocks = <&l3s_clkctrl AM4_L3S_ADC1_CLKCTRL 0>;
2381			clock-names = "fck";
2382			#address-cells = <1>;
2383			#size-cells = <1>;
2384			ranges = <0x0 0x4c000 0x2000>;
2385
2386			magadc: magadc@0 {
2387				compatible = "ti,am4372-magadc";
2388				reg = <0x0 0x2000>;
2389				interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
2390				clocks = <&adc_mag_fck>;
2391				clock-names = "fck";
2392				dmas = <&edma 54 0>, <&edma 55 0>;
2393				dma-names = "fifo0", "fifo1";
2394				status = "disabled";
2395
2396				mag {
2397					compatible = "ti,am4372-mag";
2398				};
2399
2400				adc {
2401					#io-channel-cells = <1>;
2402					compatible = "ti,am4372-adc";
2403				};
2404			};
2405		};
2406
2407		target-module@80000 {			/* 0x48380000, ap 123 42.0 */
2408			compatible = "ti,sysc-omap4", "ti,sysc";
2409			reg = <0x80000 0x4>,
2410			      <0x80010 0x4>;
2411			reg-names = "rev", "sysc";
2412			ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2413			ti,sysc-midle = <SYSC_IDLE_FORCE>,
2414					<SYSC_IDLE_NO>,
2415					<SYSC_IDLE_SMART>,
2416					<SYSC_IDLE_SMART_WKUP>;
2417			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2418					<SYSC_IDLE_NO>,
2419					<SYSC_IDLE_SMART>,
2420					<SYSC_IDLE_SMART_WKUP>;
2421			/* Domains (P, C): per_pwrdm, l3s_clkdm */
2422			clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 0>;
2423			clock-names = "fck";
2424			#address-cells = <1>;
2425			#size-cells = <1>;
2426			ranges = <0x0 0x80000 0x20000>;
2427
2428			dwc3_1: omap_dwc3@0 {
2429				compatible = "ti,am437x-dwc3";
2430				reg = <0x0 0x10000>;
2431				interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2432				#address-cells = <1>;
2433				#size-cells = <1>;
2434				utmi-mode = <1>;
2435				ranges = <0 0 0x20000>;
2436
2437				usb1: usb@10000 {
2438					compatible = "snps,dwc3";
2439					reg = <0x10000 0x10000>;
2440					interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2441						     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2442						     <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2443					interrupt-names = "peripheral",
2444							  "host",
2445							  "otg";
2446					phys = <&usb2_phy1>;
2447					phy-names = "usb2-phy";
2448					maximum-speed = "high-speed";
2449					dr_mode = "otg";
2450					status = "disabled";
2451					snps,dis_u3_susphy_quirk;
2452					snps,dis_u2_susphy_quirk;
2453				};
2454			};
2455		};
2456
2457		target-module@a8000 {			/* 0x483a8000, ap 125 6c.0 */
2458			compatible = "ti,sysc-omap4", "ti,sysc";
2459			reg = <0xa8000 0x4>;
2460			reg-names = "rev";
2461			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2462			clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP0_CLKCTRL 0>;
2463			clock-names = "fck";
2464			#address-cells = <1>;
2465			#size-cells = <1>;
2466			ranges = <0x0 0xa8000 0x8000>;
2467
2468			ocp2scp0: ocp2scp@0 {
2469				compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2470				#address-cells = <1>;
2471				#size-cells = <1>;
2472				ranges = <0 0 0x8000>;
2473
2474				usb2_phy1: phy@8000 {
2475					compatible = "ti,am437x-usb2";
2476					reg = <0x0 0x8000>;
2477					syscon-phy-power = <&scm_conf 0x620>;
2478					clocks = <&usb_phy0_always_on_clk32k>,
2479						 <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 8>;
2480					clock-names = "wkupclk", "refclk";
2481					#phy-cells = <0>;
2482					status = "disabled";
2483				};
2484			};
2485		};
2486
2487		target-module@c0000 {			/* 0x483c0000, ap 127 7a.0 */
2488			compatible = "ti,sysc-omap4", "ti,sysc";
2489			reg = <0xc0000 0x4>,
2490			      <0xc0010 0x4>;
2491			reg-names = "rev", "sysc";
2492			ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2493			ti,sysc-midle = <SYSC_IDLE_FORCE>,
2494					<SYSC_IDLE_NO>,
2495					<SYSC_IDLE_SMART>,
2496					<SYSC_IDLE_SMART_WKUP>;
2497			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2498					<SYSC_IDLE_NO>,
2499					<SYSC_IDLE_SMART>,
2500					<SYSC_IDLE_SMART_WKUP>;
2501			/* Domains (P, C): per_pwrdm, l3s_clkdm */
2502			clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 0>;
2503			clock-names = "fck";
2504			#address-cells = <1>;
2505			#size-cells = <1>;
2506			ranges = <0x0 0xc0000 0x20000>;
2507
2508			dwc3_2: omap_dwc3@0 {
2509				compatible = "ti,am437x-dwc3";
2510				reg = <0x0 0x10000>;
2511				interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2512				#address-cells = <1>;
2513				#size-cells = <1>;
2514				utmi-mode = <1>;
2515				ranges = <0 0 0x20000>;
2516
2517				usb2: usb@10000 {
2518					compatible = "snps,dwc3";
2519					reg = <0x10000 0x10000>;
2520					interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2521						     <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2522						     <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2523					interrupt-names = "peripheral",
2524							  "host",
2525							  "otg";
2526					phys = <&usb2_phy2>;
2527					phy-names = "usb2-phy";
2528					maximum-speed = "high-speed";
2529					dr_mode = "otg";
2530					status = "disabled";
2531					snps,dis_u3_susphy_quirk;
2532					snps,dis_u2_susphy_quirk;
2533				};
2534			};
2535		};
2536
2537		target-module@e8000 {			/* 0x483e8000, ap 129 78.0 */
2538			compatible = "ti,sysc-omap4", "ti,sysc";
2539			reg = <0xe8000 0x4>;
2540			reg-names = "rev";
2541			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2542			clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP1_CLKCTRL 0>;
2543			clock-names = "fck";
2544			#address-cells = <1>;
2545			#size-cells = <1>;
2546			ranges = <0x0 0xe8000 0x8000>;
2547
2548			ocp2scp1: ocp2scp@0 {
2549				compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2550				#address-cells = <1>;
2551				#size-cells = <1>;
2552				ranges = <0 0 0x8000>;
2553
2554				usb2_phy2: phy@8000 {
2555					compatible = "ti,am437x-usb2";
2556					reg = <0x0 0x8000>;
2557					syscon-phy-power = <&scm_conf 0x628>;
2558					clocks = <&usb_phy1_always_on_clk32k>,
2559						 <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 8>;
2560					clock-names = "wkupclk", "refclk";
2561					#phy-cells = <0>;
2562					status = "disabled";
2563				};
2564			};
2565		};
2566
2567		target-module@f2000 {			/* 0x483f2000, ap 112 5a.0 */
2568			compatible = "ti,sysc";
2569			status = "disabled";
2570			#address-cells = <1>;
2571			#size-cells = <1>;
2572			ranges = <0x0 0xf2000 0x2000>;
2573		};
2574	};
2575};
2576