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stm32mp15-pinctrl.dtsi
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linux-6.19.14/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2/* 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics. 5 */ 6#include <dt-bindings/pinctrl/stm32-pinfunc.h> 7 8&hdp { 9 /omit-if-no-ref/ 10 hdp2_gpo: hdp2-pins { 11 function = "gpoval2"; 12 pins = "HDP2"; 13 }; 14}; 15 16&pinctrl { 17 /omit-if-no-ref/ 18 adc1_ain_pins_a: adc1-ain-0 { 19 pins { 20 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* ADC1_INP2 */ 21 <STM32_PINMUX('B', 1, ANALOG)>, /* ADC1_INP5 */ 22 <STM32_PINMUX('B', 0, ANALOG)>, /* ADC1_INP9 */ 23 <STM32_PINMUX('C', 0, ANALOG)>, /* ADC1_INP10 */ 24 <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1_INP13 */ 25 <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1_INP15 */ 26 }; 27 }; 28 29 /omit-if-no-ref/ 30 adc1_in6_pins_a: adc1-in6-0 { 31 pins { 32 pinmux = <STM32_PINMUX('F', 12, ANALOG)>; 33 }; 34 }; 35 36 /omit-if-no-ref/ 37 adc1_in10_pins_a: adc1-in10-0 { 38 pins { 39 pinmux = <STM32_PINMUX('C', 0, ANALOG)>; 40 }; 41 }; 42 43 /omit-if-no-ref/ 44 adc12_ain_pins_a: adc12-ain-0 { 45 pins { 46 pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */ 47 <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */ 48 <STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */ 49 <STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */ 50 }; 51 }; 52 53 /omit-if-no-ref/ 54 adc12_ain_pins_b: adc12-ain-1 { 55 pins { 56 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */ 57 <STM32_PINMUX('F', 13, ANALOG)>; /* ADC2 in2 */ 58 }; 59 }; 60 61 /omit-if-no-ref/ 62 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 { 63 pins { 64 pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */ 65 <STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */ 66 }; 67 }; 68 69 /omit-if-no-ref/ 70 cec_pins_a: cec-0 { 71 pins { 72 pinmux = <STM32_PINMUX('A', 15, AF4)>; 73 bias-disable; 74 drive-open-drain; 75 slew-rate = <0>; 76 }; 77 }; 78 79 /omit-if-no-ref/ 80 cec_sleep_pins_a: cec-sleep-0 { 81 pins { 82 pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */ 83 }; 84 }; 85 86 /omit-if-no-ref/ 87 cec_pins_b: cec-1 { 88 pins { 89 pinmux = <STM32_PINMUX('B', 6, AF5)>; 90 bias-disable; 91 drive-open-drain; 92 slew-rate = <0>; 93 }; 94 }; 95 96 /omit-if-no-ref/ 97 cec_sleep_pins_b: cec-sleep-1 { 98 pins { 99 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */ 100 }; 101 }; 102 103 /omit-if-no-ref/ 104 dac_ch1_pins_a: dac-ch1-0 { 105 pins { 106 pinmux = <STM32_PINMUX('A', 4, ANALOG)>; 107 }; 108 }; 109 110 /omit-if-no-ref/ 111 dac_ch2_pins_a: dac-ch2-0 { 112 pins { 113 pinmux = <STM32_PINMUX('A', 5, ANALOG)>; 114 }; 115 }; 116 117 /omit-if-no-ref/ 118 dcmi_pins_a: dcmi-0 { 119 pins { 120 pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */ 121 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */ 122 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */ 123 <STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */ 124 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */ 125 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */ 126 <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */ 127 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */ 128 <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */ 129 <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */ 130 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */ 131 <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */ 132 <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */ 133 <STM32_PINMUX('I', 3, AF13)>,/* DCMI_D10 */ 134 <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */ 135 bias-disable; 136 }; 137 }; 138 139 /omit-if-no-ref/ 140 dcmi_sleep_pins_a: dcmi-sleep-0 { 141 pins { 142 pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */ 143 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */ 144 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */ 145 <STM32_PINMUX('H', 9, ANALOG)>,/* DCMI_D0 */ 146 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */ 147 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */ 148 <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */ 149 <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */ 150 <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */ 151 <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */ 152 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */ 153 <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */ 154 <STM32_PINMUX('H', 7, ANALOG)>,/* DCMI_D9 */ 155 <STM32_PINMUX('I', 3, ANALOG)>,/* DCMI_D10 */ 156 <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */ 157 }; 158 }; 159 160 /omit-if-no-ref/ 161 dcmi_pins_b: dcmi-1 { 162 pins { 163 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */ 164 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */ 165 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */ 166 <STM32_PINMUX('C', 6, AF13)>,/* DCMI_D0 */ 167 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */ 168 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */ 169 <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */ 170 <STM32_PINMUX('E', 11, AF13)>,/* DCMI_D4 */ 171 <STM32_PINMUX('D', 3, AF13)>,/* DCMI_D5 */ 172 <STM32_PINMUX('E', 13, AF13)>,/* DCMI_D6 */ 173 <STM32_PINMUX('B', 9, AF13)>;/* DCMI_D7 */ 174 bias-disable; 175 }; 176 }; 177 178 /omit-if-no-ref/ 179 dcmi_sleep_pins_b: dcmi-sleep-1 { 180 pins { 181 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */ 182 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */ 183 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */ 184 <STM32_PINMUX('C', 6, ANALOG)>,/* DCMI_D0 */ 185 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */ 186 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */ 187 <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */ 188 <STM32_PINMUX('E', 11, ANALOG)>,/* DCMI_D4 */ 189 <STM32_PINMUX('D', 3, ANALOG)>,/* DCMI_D5 */ 190 <STM32_PINMUX('E', 13, ANALOG)>,/* DCMI_D6 */ 191 <STM32_PINMUX('B', 9, ANALOG)>;/* DCMI_D7 */ 192 }; 193 }; 194 195 /omit-if-no-ref/ 196 dcmi_pins_c: dcmi-2 { 197 pins { 198 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */ 199 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */ 200 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */ 201 <STM32_PINMUX('A', 9, AF13)>,/* DCMI_D0 */ 202 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */ 203 <STM32_PINMUX('E', 0, AF13)>,/* DCMI_D2 */ 204 <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */ 205 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */ 206 <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */ 207 <STM32_PINMUX('I', 6, AF13)>,/* DCMI_D6 */ 208 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */ 209 <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */ 210 <STM32_PINMUX('H', 7, AF13)>;/* DCMI_D9 */ 211 bias-pull-up; 212 }; 213 }; 214 215 /omit-if-no-ref/ 216 dcmi_sleep_pins_c: dcmi-sleep-2 { 217 pins { 218 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */ 219 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */ 220 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */ 221 <STM32_PINMUX('A', 9, ANALOG)>,/* DCMI_D0 */ 222 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */ 223 <STM32_PINMUX('E', 0, ANALOG)>,/* DCMI_D2 */ 224 <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */ 225 <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */ 226 <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */ 227 <STM32_PINMUX('I', 6, ANALOG)>,/* DCMI_D6 */ 228 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */ 229 <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */ 230 <STM32_PINMUX('H', 7, ANALOG)>;/* DCMI_D9 */ 231 }; 232 }; 233 234 /omit-if-no-ref/ 235 ethernet0_rgmii_pins_a: rgmii-0 { 236 pins1 { 237 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */ 238 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ 239 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */ 240 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ 241 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ 242 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ 243 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */ 244 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */ 245 bias-disable; 246 drive-push-pull; 247 slew-rate = <2>; 248 }; 249 pins2 { 250 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */ 251 bias-disable; 252 drive-push-pull; 253 slew-rate = <0>; 254 }; 255 pins3 { 256 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ 257 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ 258 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */ 259 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */ 260 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ 261 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ 262 bias-disable; 263 }; 264 }; 265 266 /omit-if-no-ref/ 267 ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 { 268 pins1 { 269 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */ 270 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ 271 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */ 272 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ 273 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ 274 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ 275 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ 276 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */ 277 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */ 278 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ 279 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ 280 <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */ 281 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */ 282 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ 283 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ 284 }; 285 }; 286 287 /omit-if-no-ref/ 288 ethernet0_rgmii_pins_b: rgmii-1 { 289 pins1 { 290 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */ 291 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ 292 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */ 293 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ 294 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ 295 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ 296 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */ 297 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */ 298 bias-disable; 299 drive-push-pull; 300 slew-rate = <2>; 301 }; 302 pins2 { 303 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */ 304 bias-disable; 305 drive-push-pull; 306 slew-rate = <0>; 307 }; 308 pins3 { 309 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ 310 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ 311 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */ 312 <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */ 313 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ 314 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ 315 bias-disable; 316 }; 317 }; 318 319 /omit-if-no-ref/ 320 ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 { 321 pins1 { 322 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */ 323 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ 324 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */ 325 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ 326 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ 327 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ 328 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ 329 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */ 330 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */ 331 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ 332 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ 333 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ 334 <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */ 335 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ 336 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ 337 }; 338 }; 339 340 /omit-if-no-ref/ 341 ethernet0_rgmii_pins_c: rgmii-2 { 342 pins1 { 343 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */ 344 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ 345 <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */ 346 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ 347 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ 348 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ 349 <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */ 350 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */ 351 bias-disable; 352 drive-push-pull; 353 slew-rate = <2>; 354 }; 355 pins2 { 356 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */ 357 bias-disable; 358 drive-push-pull; 359 slew-rate = <0>; 360 }; 361 pins3 { 362 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ 363 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ 364 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */ 365 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */ 366 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ 367 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ 368 bias-disable; 369 }; 370 }; 371 372 /omit-if-no-ref/ 373 ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 { 374 pins1 { 375 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */ 376 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ 377 <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */ 378 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ 379 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ 380 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ 381 <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ 382 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */ 383 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */ 384 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ 385 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ 386 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ 387 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */ 388 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ 389 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ 390 }; 391 }; 392 393 /omit-if-no-ref/ 394 ethernet0_rgmii_pins_d: rgmii-3 { 395 pins1 { 396 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */ 397 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */ 398 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ 399 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ 400 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ 401 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */ 402 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */ 403 bias-disable; 404 drive-push-pull; 405 slew-rate = <2>; 406 }; 407 pins2 { 408 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */ 409 bias-disable; 410 drive-push-pull; 411 slew-rate = <0>; 412 }; 413 pins3 { 414 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ 415 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ 416 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */ 417 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */ 418 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ 419 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ 420 bias-disable; 421 }; 422 }; 423 424 /omit-if-no-ref/ 425 ethernet0_rgmii_sleep_pins_d: rgmii-sleep-3 { 426 pins1 { 427 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */ 428 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ 429 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */ 430 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ 431 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ 432 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ 433 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ 434 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */ 435 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */ 436 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ 437 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ 438 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ 439 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */ 440 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ 441 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ 442 }; 443 }; 444 445 /omit-if-no-ref/ 446 ethernet0_rgmii_pins_e: rgmii-4 { 447 pins1 { 448 pinmux = <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ 449 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */ 450 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ 451 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ 452 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ 453 <STM32_PINMUX('B', 11, AF11)>; /* ETH_RGMII_TX_CTL */ 454 bias-disable; 455 drive-push-pull; 456 slew-rate = <2>; 457 }; 458 pins2 { 459 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ 460 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ 461 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */ 462 <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */ 463 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ 464 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ 465 bias-disable; 466 }; 467 }; 468 469 /omit-if-no-ref/ 470 ethernet0_rgmii_sleep_pins_e: rgmii-sleep-4 { 471 pins1 { 472 pinmux = <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ 473 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */ 474 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ 475 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ 476 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ 477 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ 478 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ 479 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ 480 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ 481 <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */ 482 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ 483 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ 484 }; 485 }; 486 487 /omit-if-no-ref/ 488 ethernet0_rmii_pins_a: rmii-0 { 489 pins1 { 490 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */ 491 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */ 492 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */ 493 <STM32_PINMUX('A', 1, AF0)>, /* ETH1_RMII_REF_CLK */ 494 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */ 495 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */ 496 bias-disable; 497 drive-push-pull; 498 slew-rate = <2>; 499 }; 500 pins2 { 501 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */ 502 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */ 503 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */ 504 bias-disable; 505 }; 506 }; 507 508 /omit-if-no-ref/ 509 ethernet0_rmii_sleep_pins_a: rmii-sleep-0 { 510 pins1 { 511 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */ 512 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */ 513 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */ 514 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */ 515 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */ 516 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */ 517 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */ 518 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */ 519 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */ 520 }; 521 }; 522 523 /omit-if-no-ref/ 524 ethernet0_rmii_pins_b: rmii-1 { 525 pins1 { 526 pinmux = <STM32_PINMUX('B', 5, AF0)>, /* ETH1_CLK */ 527 <STM32_PINMUX('C', 1, AF11)>, /* ETH1_MDC */ 528 <STM32_PINMUX('G', 13, AF11)>, /* ETH1_TXD0 */ 529 <STM32_PINMUX('G', 14, AF11)>; /* ETH1_TXD1 */ 530 bias-disable; 531 drive-push-pull; 532 slew-rate = <1>; 533 }; 534 pins2 { 535 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */ 536 bias-disable; 537 drive-push-pull; 538 slew-rate = <0>; 539 }; 540 pins3 { 541 pinmux = <STM32_PINMUX('A', 7, AF11)>, /* ETH1_CRS_DV */ 542 <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RXD0 */ 543 <STM32_PINMUX('C', 5, AF11)>; /* ETH1_RXD1 */ 544 bias-disable; 545 }; 546 pins4 { 547 pinmux = <STM32_PINMUX('B', 11, AF11)>; /* ETH1_TX_EN */ 548 }; 549 }; 550 551 /omit-if-no-ref/ 552 ethernet0_rmii_sleep_pins_b: rmii-sleep-1 { 553 pins1 { 554 pinmux = <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */ 555 <STM32_PINMUX('A', 7, ANALOG)>, /* ETH1_CRS_DV */ 556 <STM32_PINMUX('B', 5, ANALOG)>, /* ETH1_CLK */ 557 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_TX_EN */ 558 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */ 559 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RXD0 */ 560 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RXD1 */ 561 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_TXD0 */ 562 <STM32_PINMUX('G', 14, ANALOG)>; /* ETH1_TXD1 */ 563 }; 564 }; 565 566 /omit-if-no-ref/ 567 ethernet0_rmii_pins_c: rmii-2 { 568 pins1 { 569 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */ 570 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */ 571 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */ 572 <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK */ 573 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */ 574 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */ 575 bias-disable; 576 drive-push-pull; 577 slew-rate = <2>; 578 }; 579 pins2 { 580 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */ 581 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */ 582 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */ 583 bias-disable; 584 }; 585 }; 586 587 /omit-if-no-ref/ 588 ethernet0_rmii_sleep_pins_c: rmii-sleep-2 { 589 pins1 { 590 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */ 591 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */ 592 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */ 593 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */ 594 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */ 595 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */ 596 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */ 597 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */ 598 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */ 599 }; 600 }; 601 602 /omit-if-no-ref/ 603 ethernet0_rmii_pins_d: rmii-3 { 604 pins1 { 605 pinmux = <STM32_PINMUX('B', 12, AF11)>, /* ETH1_RMII_TXD0 */ 606 <STM32_PINMUX('B', 13, AF11)>, /* ETH1_RMII_TXD1 */ 607 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */ 608 <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK */ 609 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */ 610 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */ 611 bias-disable; 612 drive-push-pull; 613 slew-rate = <2>; 614 }; 615 616 pins2 { 617 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */ 618 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */ 619 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */ 620 bias-disable; 621 }; 622 }; 623 624 /omit-if-no-ref/ 625 ethernet0_rmii_sleep_pins_d: rmii-sleep-3 { 626 pins1 { 627 pinmux = <STM32_PINMUX('B', 12, ANALOG)>, /* ETH1_RMII_TXD0 */ 628 <STM32_PINMUX('B', 13, ANALOG)>, /* ETH1_RMII_TXD1 */ 629 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */ 630 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */ 631 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */ 632 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */ 633 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */ 634 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */ 635 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */ 636 }; 637 }; 638 639 /omit-if-no-ref/ 640 fmc_pins_a: fmc-0 { 641 pins1 { 642 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */ 643 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */ 644 <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */ 645 <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */ 646 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */ 647 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */ 648 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */ 649 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */ 650 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */ 651 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */ 652 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */ 653 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */ 654 <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */ 655 bias-disable; 656 drive-push-pull; 657 slew-rate = <1>; 658 }; 659 pins2 { 660 pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */ 661 bias-pull-up; 662 }; 663 }; 664 665 /omit-if-no-ref/ 666 fmc_sleep_pins_a: fmc-sleep-0 { 667 pins { 668 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */ 669 <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */ 670 <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */ 671 <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */ 672 <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */ 673 <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */ 674 <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */ 675 <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */ 676 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */ 677 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */ 678 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */ 679 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */ 680 <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */ 681 <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */ 682 }; 683 }; 684 685 /omit-if-no-ref/ 686 fmc_pins_b: fmc-1 { 687 pins { 688 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */ 689 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */ 690 <STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */ 691 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */ 692 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */ 693 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */ 694 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */ 695 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */ 696 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */ 697 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */ 698 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */ 699 <STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */ 700 <STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */ 701 <STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */ 702 <STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */ 703 <STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */ 704 <STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */ 705 <STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */ 706 <STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */ 707 <STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */ 708 <STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */ 709 bias-disable; 710 drive-push-pull; 711 slew-rate = <3>; 712 }; 713 }; 714 715 /omit-if-no-ref/ 716 fmc_sleep_pins_b: fmc-sleep-1 { 717 pins { 718 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */ 719 <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */ 720 <STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */ 721 <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */ 722 <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */ 723 <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */ 724 <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */ 725 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */ 726 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */ 727 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */ 728 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */ 729 <STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */ 730 <STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */ 731 <STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */ 732 <STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */ 733 <STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */ 734 <STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */ 735 <STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */ 736 <STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */ 737 <STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */ 738 <STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */ 739 }; 740 }; 741 742 /omit-if-no-ref/ 743 hdp2_pins_a: hdp2-0 { 744 pins { 745 pinmux = <STM32_PINMUX('E', 13, AF0)>; /* HDP2 */ 746 bias-disable; 747 drive-push-pull; 748 slew-rate = <2>; 749 }; 750 }; 751 752 /omit-if-no-ref/ 753 hdp2_sleep_pins_a: hdp2-sleep-0 { 754 pins { 755 pinmux = <STM32_PINMUX('E', 13, ANALOG)>; /* HDP2 */ 756 }; 757 }; 758 759 /omit-if-no-ref/ 760 i2c1_pins_a: i2c1-0 { 761 pins { 762 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */ 763 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */ 764 bias-disable; 765 drive-open-drain; 766 slew-rate = <0>; 767 }; 768 }; 769 770 /omit-if-no-ref/ 771 i2c1_sleep_pins_a: i2c1-sleep-0 { 772 pins { 773 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */ 774 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */ 775 }; 776 }; 777 778 /omit-if-no-ref/ 779 i2c1_pins_b: i2c1-1 { 780 pins { 781 pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */ 782 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */ 783 bias-disable; 784 drive-open-drain; 785 slew-rate = <0>; 786 }; 787 }; 788 789 /omit-if-no-ref/ 790 i2c1_sleep_pins_b: i2c1-sleep-1 { 791 pins { 792 pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */ 793 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */ 794 }; 795 }; 796 797 /omit-if-no-ref/ 798 i2c1_pins_c: i2c1-2 { 799 pins { 800 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */ 801 <STM32_PINMUX('D', 13, AF5)>; /* I2C1_SDA */ 802 bias-disable; 803 drive-open-drain; 804 slew-rate = <0>; 805 }; 806 }; 807 808 /omit-if-no-ref/ 809 i2c1_sleep_pins_c: i2c1-sleep-2 { 810 pins { 811 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */ 812 <STM32_PINMUX('D', 13, ANALOG)>; /* I2C1_SDA */ 813 }; 814 }; 815 816 /omit-if-no-ref/ 817 i2c2_pins_a: i2c2-0 { 818 pins { 819 pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */ 820 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */ 821 bias-disable; 822 drive-open-drain; 823 slew-rate = <0>; 824 }; 825 }; 826 827 /omit-if-no-ref/ 828 i2c2_sleep_pins_a: i2c2-sleep-0 { 829 pins { 830 pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */ 831 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */ 832 }; 833 }; 834 835 /omit-if-no-ref/ 836 i2c2_pins_b1: i2c2-1 { 837 pins { 838 pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */ 839 bias-disable; 840 drive-open-drain; 841 slew-rate = <0>; 842 }; 843 }; 844 845 /omit-if-no-ref/ 846 i2c2_sleep_pins_b1: i2c2-sleep-1 { 847 pins { 848 pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */ 849 }; 850 }; 851 852 /omit-if-no-ref/ 853 i2c2_pins_c: i2c2-2 { 854 pins { 855 pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */ 856 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */ 857 bias-disable; 858 drive-open-drain; 859 slew-rate = <0>; 860 }; 861 }; 862 863 /omit-if-no-ref/ 864 i2c2_pins_sleep_c: i2c2-sleep-2 { 865 pins { 866 pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */ 867 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */ 868 }; 869 }; 870 871 /omit-if-no-ref/ 872 i2c5_pins_a: i2c5-0 { 873 pins { 874 pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */ 875 <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */ 876 bias-disable; 877 drive-open-drain; 878 slew-rate = <0>; 879 }; 880 }; 881 882 /omit-if-no-ref/ 883 i2c5_sleep_pins_a: i2c5-sleep-0 { 884 pins { 885 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */ 886 <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */ 887 888 }; 889 }; 890 891 /omit-if-no-ref/ 892 i2c5_pins_b: i2c5-1 { 893 pins { 894 pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */ 895 <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */ 896 bias-disable; 897 drive-open-drain; 898 slew-rate = <0>; 899 }; 900 }; 901 902 /omit-if-no-ref/ 903 i2c5_sleep_pins_b: i2c5-sleep-1 { 904 pins { 905 pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */ 906 <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */ 907 }; 908 }; 909 910 /omit-if-no-ref/ 911 i2s1_pins_a: i2s1-0 { 912 pins { 913 pinmux = <STM32_PINMUX('A', 6, AF5)>, /* I2S2_SDI */ 914 <STM32_PINMUX('A', 4, AF5)>, /* I2S2_WS */ 915 <STM32_PINMUX('A', 5, AF5)>; /* I2S2_CK */ 916 slew-rate = <0>; 917 drive-push-pull; 918 bias-disable; 919 }; 920 }; 921 922 /omit-if-no-ref/ 923 i2s1_sleep_pins_a: i2s1-sleep-0 { 924 pins { 925 pinmux = <STM32_PINMUX('A', 6, ANALOG)>, /* I2S2_SDI */ 926 <STM32_PINMUX('A', 4, ANALOG)>, /* I2S2_WS */ 927 <STM32_PINMUX('A', 5, ANALOG)>; /* I2S2_CK */ 928 }; 929 }; 930 931 /omit-if-no-ref/ 932 i2s2_pins_a: i2s2-0 { 933 pins { 934 pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */ 935 <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */ 936 <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */ 937 slew-rate = <1>; 938 drive-push-pull; 939 bias-disable; 940 }; 941 }; 942 943 /omit-if-no-ref/ 944 i2s2_sleep_pins_a: i2s2-sleep-0 { 945 pins { 946 pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */ 947 <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */ 948 <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */ 949 }; 950 }; 951 952 /omit-if-no-ref/ 953 i2s2_pins_b: i2s2-1 { 954 pins { 955 pinmux = <STM32_PINMUX('C', 3, AF5)>, /* I2S2_SDO */ 956 <STM32_PINMUX('B', 12, AF5)>, /* I2S2_WS */ 957 <STM32_PINMUX('B', 13, AF5)>; /* I2S2_CK */ 958 bias-disable; 959 drive-push-pull; 960 slew-rate = <1>; 961 }; 962 }; 963 964 /omit-if-no-ref/ 965 i2s2_sleep_pins_b: i2s2-sleep-1 { 966 pins { 967 pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* I2S2_SDO */ 968 <STM32_PINMUX('B', 12, ANALOG)>, /* I2S2_WS */ 969 <STM32_PINMUX('B', 13, ANALOG)>; /* I2S2_CK */ 970 }; 971 }; 972 973 /omit-if-no-ref/ 974 ltdc_pins_a: ltdc-0 { 975 pins { 976 pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */ 977 <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */ 978 <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */ 979 <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */ 980 <STM32_PINMUX('H', 2, AF14)>, /* LCD_R0 */ 981 <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */ 982 <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */ 983 <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */ 984 <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */ 985 <STM32_PINMUX('C', 0, AF14)>, /* LCD_R5 */ 986 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */ 987 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */ 988 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */ 989 <STM32_PINMUX('E', 6, AF14)>, /* LCD_G1 */ 990 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */ 991 <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */ 992 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */ 993 <STM32_PINMUX('I', 0, AF14)>, /* LCD_G5 */ 994 <STM32_PINMUX('I', 1, AF14)>, /* LCD_G6 */ 995 <STM32_PINMUX('I', 2, AF14)>, /* LCD_G7 */ 996 <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */ 997 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */ 998 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */ 999 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */ 1000 <STM32_PINMUX('I', 4, AF14)>, /* LCD_B4 */ 1001 <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */ 1002 <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */ 1003 <STM32_PINMUX('D', 8, AF14)>; /* LCD_B7 */ 1004 bias-disable; 1005 drive-push-pull; 1006 slew-rate = <1>; 1007 }; 1008 }; 1009 1010 /omit-if-no-ref/ 1011 ltdc_sleep_pins_a: ltdc-sleep-0 { 1012 pins { 1013 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */ 1014 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */ 1015 <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */ 1016 <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */ 1017 <STM32_PINMUX('H', 2, ANALOG)>, /* LCD_R0 */ 1018 <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */ 1019 <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */ 1020 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */ 1021 <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */ 1022 <STM32_PINMUX('C', 0, ANALOG)>, /* LCD_R5 */ 1023 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */ 1024 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */ 1025 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */ 1026 <STM32_PINMUX('E', 6, ANALOG)>, /* LCD_G1 */ 1027 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */ 1028 <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */ 1029 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */ 1030 <STM32_PINMUX('I', 0, ANALOG)>, /* LCD_G5 */ 1031 <STM32_PINMUX('I', 1, ANALOG)>, /* LCD_G6 */ 1032 <STM32_PINMUX('I', 2, ANALOG)>, /* LCD_G7 */ 1033 <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */ 1034 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */ 1035 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */ 1036 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */ 1037 <STM32_PINMUX('I', 4, ANALOG)>, /* LCD_B4 */ 1038 <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */ 1039 <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */ 1040 <STM32_PINMUX('D', 8, ANALOG)>; /* LCD_B7 */ 1041 }; 1042 }; 1043 1044 /omit-if-no-ref/ 1045 ltdc_pins_b: ltdc-1 { 1046 pins { 1047 pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */ 1048 <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */ 1049 <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */ 1050 <STM32_PINMUX('K', 7, AF14)>, /* LCD_DE */ 1051 <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */ 1052 <STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */ 1053 <STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */ 1054 <STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */ 1055 <STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */ 1056 <STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */ 1057 <STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */ 1058 <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */ 1059 <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */ 1060 <STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */ 1061 <STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */ 1062 <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */ 1063 <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */ 1064 <STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */ 1065 <STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */ 1066 <STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */ 1067 <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */ 1068 <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */ 1069 <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */ 1070 <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */ 1071 <STM32_PINMUX('K', 3, AF14)>, /* LCD_B4 */ 1072 <STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */ 1073 <STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */ 1074 <STM32_PINMUX('K', 6, AF14)>; /* LCD_B7 */ 1075 bias-disable; 1076 drive-push-pull; 1077 slew-rate = <1>; 1078 }; 1079 }; 1080 1081 /omit-if-no-ref/ 1082 ltdc_sleep_pins_b: ltdc-sleep-1 { 1083 pins { 1084 pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */ 1085 <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */ 1086 <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */ 1087 <STM32_PINMUX('K', 7, ANALOG)>, /* LCD_DE */ 1088 <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */ 1089 <STM32_PINMUX('J', 0, ANALOG)>, /* LCD_R1 */ 1090 <STM32_PINMUX('J', 1, ANALOG)>, /* LCD_R2 */ 1091 <STM32_PINMUX('J', 2, ANALOG)>, /* LCD_R3 */ 1092 <STM32_PINMUX('J', 3, ANALOG)>, /* LCD_R4 */ 1093 <STM32_PINMUX('J', 4, ANALOG)>, /* LCD_R5 */ 1094 <STM32_PINMUX('J', 5, ANALOG)>, /* LCD_R6 */ 1095 <STM32_PINMUX('J', 6, ANALOG)>, /* LCD_R7 */ 1096 <STM32_PINMUX('J', 7, ANALOG)>, /* LCD_G0 */ 1097 <STM32_PINMUX('J', 8, ANALOG)>, /* LCD_G1 */ 1098 <STM32_PINMUX('J', 9, ANALOG)>, /* LCD_G2 */ 1099 <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */ 1100 <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */ 1101 <STM32_PINMUX('K', 0, ANALOG)>, /* LCD_G5 */ 1102 <STM32_PINMUX('K', 1, ANALOG)>, /* LCD_G6 */ 1103 <STM32_PINMUX('K', 2, ANALOG)>, /* LCD_G7 */ 1104 <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */ 1105 <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */ 1106 <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */ 1107 <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */ 1108 <STM32_PINMUX('K', 3, ANALOG)>, /* LCD_B4 */ 1109 <STM32_PINMUX('K', 4, ANALOG)>, /* LCD_B5 */ 1110 <STM32_PINMUX('K', 5, ANALOG)>, /* LCD_B6 */ 1111 <STM32_PINMUX('K', 6, ANALOG)>; /* LCD_B7 */ 1112 }; 1113 }; 1114 1115 /omit-if-no-ref/ 1116 ltdc_pins_c: ltdc-2 { 1117 pins1 { 1118 pinmux = <STM32_PINMUX('B', 1, AF9)>, /* LTDC_R6 */ 1119 <STM32_PINMUX('B', 9, AF14)>, /* LTDC_B7 */ 1120 <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */ 1121 <STM32_PINMUX('D', 3, AF14)>, /* LTDC_G7 */ 1122 <STM32_PINMUX('D', 6, AF14)>, /* LTDC_B2 */ 1123 <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */ 1124 <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */ 1125 <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */ 1126 <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */ 1127 <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */ 1128 <STM32_PINMUX('H', 4, AF9)>, /* LTDC_G5 */ 1129 <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */ 1130 <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */ 1131 <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */ 1132 <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */ 1133 <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */ 1134 <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */ 1135 <STM32_PINMUX('I', 5, AF14)>, /* LTDC_B5 */ 1136 <STM32_PINMUX('I', 6, AF14)>, /* LTDC_B6 */ 1137 <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */ 1138 <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */ 1139 bias-disable; 1140 drive-push-pull; 1141 slew-rate = <0>; 1142 }; 1143 pins2 { 1144 pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */ 1145 bias-disable; 1146 drive-push-pull; 1147 slew-rate = <1>; 1148 }; 1149 }; 1150 1151 /omit-if-no-ref/ 1152 ltdc_sleep_pins_c: ltdc-sleep-2 { 1153 pins1 { 1154 pinmux = <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_R6 */ 1155 <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */ 1156 <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */ 1157 <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */ 1158 <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */ 1159 <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */ 1160 <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */ 1161 <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */ 1162 <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */ 1163 <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */ 1164 <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G5 */ 1165 <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */ 1166 <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */ 1167 <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */ 1168 <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */ 1169 <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */ 1170 <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */ 1171 <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */ 1172 <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */ 1173 <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */ 1174 <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */ 1175 <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */ 1176 }; 1177 }; 1178 1179 /omit-if-no-ref/ 1180 ltdc_pins_d: ltdc-3 { 1181 pins1 { 1182 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LCD_CLK */ 1183 bias-disable; 1184 drive-push-pull; 1185 slew-rate = <3>; 1186 }; 1187 pins2 { 1188 pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */ 1189 <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */ 1190 <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */ 1191 <STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */ 1192 <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */ 1193 <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */ 1194 <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */ 1195 <STM32_PINMUX('A', 5, AF14)>, /* LCD_R4 */ 1196 <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */ 1197 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */ 1198 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */ 1199 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */ 1200 <STM32_PINMUX('B', 0, AF14)>, /* LCD_G1 */ 1201 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */ 1202 <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */ 1203 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */ 1204 <STM32_PINMUX('H', 4, AF9)>, /* LCD_G5 */ 1205 <STM32_PINMUX('I', 11, AF9)>, /* LCD_G6 */ 1206 <STM32_PINMUX('G', 8, AF14)>, /* LCD_G7 */ 1207 <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */ 1208 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */ 1209 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */ 1210 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */ 1211 <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */ 1212 <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */ 1213 <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */ 1214 <STM32_PINMUX('I', 7, AF14)>; /* LCD_B7 */ 1215 bias-disable; 1216 drive-push-pull; 1217 slew-rate = <2>; 1218 }; 1219 }; 1220 1221 /omit-if-no-ref/ 1222 ltdc_sleep_pins_d: ltdc-sleep-3 { 1223 pins { 1224 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */ 1225 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */ 1226 <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */ 1227 <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */ 1228 <STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */ 1229 <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */ 1230 <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */ 1231 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */ 1232 <STM32_PINMUX('A', 5, ANALOG)>, /* LCD_R4 */ 1233 <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */ 1234 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */ 1235 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */ 1236 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */ 1237 <STM32_PINMUX('B', 0, ANALOG)>, /* LCD_G1 */ 1238 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */ 1239 <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */ 1240 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */ 1241 <STM32_PINMUX('H', 4, ANALOG)>, /* LCD_G5 */ 1242 <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */ 1243 <STM32_PINMUX('G', 8, ANALOG)>, /* LCD_G7 */ 1244 <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */ 1245 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */ 1246 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */ 1247 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */ 1248 <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */ 1249 <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */ 1250 <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */ 1251 <STM32_PINMUX('I', 7, ANALOG)>; /* LCD_B7 */ 1252 }; 1253 }; 1254 1255 /omit-if-no-ref/ 1256 ltdc_pins_e: ltdc-4 { 1257 pins1 { 1258 pinmux = <STM32_PINMUX('H', 2, AF14)>, /* LTDC_R0 */ 1259 <STM32_PINMUX('H', 3, AF14)>, /* LTDC_R1 */ 1260 <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */ 1261 <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */ 1262 <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */ 1263 <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */ 1264 <STM32_PINMUX('H', 12, AF14)>, /* LTDC_R6 */ 1265 <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */ 1266 <STM32_PINMUX('E', 14, AF13)>, /* LTDC_G0 */ 1267 <STM32_PINMUX('E', 6, AF14)>, /* LTDC_G1 */ 1268 <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */ 1269 <STM32_PINMUX('H', 14, AF14)>, /* LTDC_G3 */ 1270 <STM32_PINMUX('H', 4, AF14)>, /* LTDC_G4 */ 1271 <STM32_PINMUX('I', 0, AF14)>, /* LTDC_G5 */ 1272 <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */ 1273 <STM32_PINMUX('I', 2, AF14)>, /* LTDC_G7 */ 1274 <STM32_PINMUX('D', 9, AF14)>, /* LTDC_B0 */ 1275 <STM32_PINMUX('G', 12, AF14)>, /* LTDC_B1 */ 1276 <STM32_PINMUX('G', 10, AF14)>, /* LTDC_B2 */ 1277 <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */ 1278 <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */ 1279 <STM32_PINMUX('A', 3, AF14)>, /* LTDC_B5 */ 1280 <STM32_PINMUX('B', 8, AF14)>, /* LTDC_B6 */ 1281 <STM32_PINMUX('D', 8, AF14)>, /* LTDC_B7 */ 1282 <STM32_PINMUX('F', 10, AF14)>, /* LTDC_DE */ 1283 <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */ 1284 <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */ 1285 bias-disable; 1286 drive-push-pull; 1287 slew-rate = <0>; 1288 }; 1289 1290 pins2 { 1291 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LTDC_CLK */ 1292 bias-disable; 1293 drive-push-pull; 1294 slew-rate = <1>; 1295 }; 1296 }; 1297 1298 /omit-if-no-ref/ 1299 ltdc_sleep_pins_e: ltdc-sleep-4 { 1300 pins { 1301 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* LTDC_R0 */ 1302 <STM32_PINMUX('H', 3, ANALOG)>, /* LTDC_R1 */ 1303 <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */ 1304 <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */ 1305 <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */ 1306 <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */ 1307 <STM32_PINMUX('H', 12, ANALOG)>, /* LTDC_R6 */ 1308 <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */ 1309 <STM32_PINMUX('D', 9, ANALOG)>, /* LTDC_B0 */ 1310 <STM32_PINMUX('G', 12, ANALOG)>, /* LTDC_B1 */ 1311 <STM32_PINMUX('G', 10, ANALOG)>, /* LTDC_B2 */ 1312 <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */ 1313 <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */ 1314 <STM32_PINMUX('A', 3, ANALOG)>, /* LTDC_B5 */ 1315 <STM32_PINMUX('B', 8, ANALOG)>, /* LTDC_B6 */ 1316 <STM32_PINMUX('D', 8, ANALOG)>, /* LTDC_B7 */ 1317 <STM32_PINMUX('E', 14, ANALOG)>, /* LTDC_G0 */ 1318 <STM32_PINMUX('E', 6, ANALOG)>, /* LTDC_G1 */ 1319 <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */ 1320 <STM32_PINMUX('H', 14, ANALOG)>, /* LTDC_G3 */ 1321 <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G4 */ 1322 <STM32_PINMUX('I', 0, ANALOG)>, /* LTDC_G5 */ 1323 <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */ 1324 <STM32_PINMUX('I', 2, ANALOG)>, /* LTDC_G7 */ 1325 <STM32_PINMUX('F', 10, ANALOG)>, /* LTDC_DE */ 1326 <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */ 1327 <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */ 1328 <STM32_PINMUX('G', 7, ANALOG)>; /* LTDC_CLK */ 1329 }; 1330 }; 1331 1332 /omit-if-no-ref/ 1333 m4_leds_orange_pins_a: m4-leds-orange-0 { 1334 pins { 1335 pinmux = <STM32_PINMUX('H', 7, RSVD)>; 1336 }; 1337 }; 1338 1339 /omit-if-no-ref/ 1340 m4_leds_orange_pins_b: m4-leds-orange-1 { 1341 pins { 1342 pinmux = <STM32_PINMUX('D', 8, RSVD)>; 1343 }; 1344 }; 1345 1346 /omit-if-no-ref/ 1347 mco1_pins_a: mco1-0 { 1348 pins { 1349 pinmux = <STM32_PINMUX('A', 13, AF2)>; /* MCO1 */ 1350 bias-disable; 1351 drive-push-pull; 1352 slew-rate = <1>; 1353 }; 1354 }; 1355 1356 /omit-if-no-ref/ 1357 mco1_sleep_pins_a: mco1-sleep-0 { 1358 pins { 1359 pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* MCO1 */ 1360 }; 1361 }; 1362 1363 /omit-if-no-ref/ 1364 mco2_pins_a: mco2-0 { 1365 pins { 1366 pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */ 1367 bias-disable; 1368 drive-push-pull; 1369 slew-rate = <2>; 1370 }; 1371 }; 1372 1373 /omit-if-no-ref/ 1374 mco2_sleep_pins_a: mco2-sleep-0 { 1375 pins { 1376 pinmux = <STM32_PINMUX('G', 2, ANALOG)>; /* MCO2 */ 1377 }; 1378 }; 1379 1380 /omit-if-no-ref/ 1381 m_can1_pins_a: m-can1-0 { 1382 pins1 { 1383 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ 1384 slew-rate = <1>; 1385 drive-push-pull; 1386 bias-disable; 1387 }; 1388 pins2 { 1389 pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */ 1390 bias-disable; 1391 }; 1392 }; 1393 1394 /omit-if-no-ref/ 1395 m_can1_sleep_pins_a: m_can1-sleep-0 { 1396 pins { 1397 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */ 1398 <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */ 1399 }; 1400 }; 1401 1402 /omit-if-no-ref/ 1403 m_can1_pins_b: m-can1-1 { 1404 pins1 { 1405 pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */ 1406 slew-rate = <1>; 1407 drive-push-pull; 1408 bias-disable; 1409 }; 1410 pins2 { 1411 pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */ 1412 bias-disable; 1413 }; 1414 }; 1415 1416 /omit-if-no-ref/ 1417 m_can1_sleep_pins_b: m_can1-sleep-1 { 1418 pins { 1419 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */ 1420 <STM32_PINMUX('A', 11, ANALOG)>; /* CAN1_RX */ 1421 }; 1422 }; 1423 1424 /omit-if-no-ref/ 1425 m_can1_pins_c: m-can1-2 { 1426 pins1 { 1427 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ 1428 slew-rate = <1>; 1429 drive-push-pull; 1430 bias-disable; 1431 }; 1432 pins2 { 1433 pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */ 1434 bias-disable; 1435 }; 1436 }; 1437 1438 /omit-if-no-ref/ 1439 m_can1_sleep_pins_c: m_can1-sleep-2 { 1440 pins { 1441 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */ 1442 <STM32_PINMUX('H', 14, ANALOG)>; /* CAN1_RX */ 1443 }; 1444 }; 1445 1446 /omit-if-no-ref/ 1447 m_can1_pins_d: m-can1-3 { 1448 pins1 { 1449 pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */ 1450 slew-rate = <1>; 1451 drive-push-pull; 1452 bias-disable; 1453 }; 1454 pins2 { 1455 pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */ 1456 bias-disable; 1457 }; 1458 }; 1459 1460 /omit-if-no-ref/ 1461 m_can1_sleep_pins_d: m_can1-sleep-3 { 1462 pins { 1463 pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* CAN1_TX */ 1464 <STM32_PINMUX('D', 0, ANALOG)>; /* CAN1_RX */ 1465 }; 1466 }; 1467 1468 /omit-if-no-ref/ 1469 m_can2_pins_a: m-can2-0 { 1470 pins1 { 1471 pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */ 1472 slew-rate = <1>; 1473 drive-push-pull; 1474 bias-disable; 1475 }; 1476 pins2 { 1477 pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */ 1478 bias-disable; 1479 }; 1480 }; 1481 1482 /omit-if-no-ref/ 1483 m_can2_sleep_pins_a: m_can2-sleep-0 { 1484 pins { 1485 pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */ 1486 <STM32_PINMUX('B', 5, ANALOG)>; /* CAN2_RX */ 1487 }; 1488 }; 1489 1490 /omit-if-no-ref/ 1491 pwm1_pins_a: pwm1-0 { 1492 pins { 1493 pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */ 1494 <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */ 1495 <STM32_PINMUX('E', 14, AF1)>; /* TIM1_CH4 */ 1496 bias-pull-down; 1497 drive-push-pull; 1498 slew-rate = <0>; 1499 }; 1500 }; 1501 1502 /omit-if-no-ref/ 1503 pwm1_sleep_pins_a: pwm1-sleep-0 { 1504 pins { 1505 pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */ 1506 <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */ 1507 <STM32_PINMUX('E', 14, ANALOG)>; /* TIM1_CH4 */ 1508 }; 1509 }; 1510 1511 /omit-if-no-ref/ 1512 pwm1_pins_b: pwm1-1 { 1513 pins { 1514 pinmux = <STM32_PINMUX('E', 9, AF1)>; /* TIM1_CH1 */ 1515 bias-pull-down; 1516 drive-push-pull; 1517 slew-rate = <0>; 1518 }; 1519 }; 1520 1521 /omit-if-no-ref/ 1522 pwm1_sleep_pins_b: pwm1-sleep-1 { 1523 pins { 1524 pinmux = <STM32_PINMUX('E', 9, ANALOG)>; /* TIM1_CH1 */ 1525 }; 1526 }; 1527 1528 /omit-if-no-ref/ 1529 pwm1_pins_c: pwm1-2 { 1530 pins { 1531 pinmux = <STM32_PINMUX('E', 11, AF1)>; /* TIM1_CH2 */ 1532 drive-push-pull; 1533 slew-rate = <0>; 1534 }; 1535 }; 1536 1537 /omit-if-no-ref/ 1538 pwm1_sleep_pins_c: pwm1-sleep-2 { 1539 pins { 1540 pinmux = <STM32_PINMUX('E', 11, ANALOG)>; /* TIM1_CH2 */ 1541 }; 1542 }; 1543 1544 /omit-if-no-ref/ 1545 pwm1_pins_d: pwm1-3 { 1546 pins { 1547 pinmux = <STM32_PINMUX('A', 0, AF2)>; /* TIM5_CH1 */ 1548 bias-pull-down; 1549 drive-push-pull; 1550 slew-rate = <0>; 1551 }; 1552 }; 1553 1554 /omit-if-no-ref/ 1555 pwm1_sleep_pins_d: pwm1-sleep-3 { 1556 pins { 1557 pinmux = <STM32_PINMUX('A', 0, ANALOG)>; 1558 }; 1559 }; 1560 1561 /omit-if-no-ref/ 1562 pwm2_pins_a: pwm2-0 { 1563 pins { 1564 pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */ 1565 bias-pull-down; 1566 drive-push-pull; 1567 slew-rate = <0>; 1568 }; 1569 }; 1570 1571 /omit-if-no-ref/ 1572 pwm2_sleep_pins_a: pwm2-sleep-0 { 1573 pins { 1574 pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */ 1575 }; 1576 }; 1577 1578 /omit-if-no-ref/ 1579 pwm3_pins_a: pwm3-0 { 1580 pins { 1581 pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */ 1582 bias-pull-down; 1583 drive-push-pull; 1584 slew-rate = <0>; 1585 }; 1586 }; 1587 1588 /omit-if-no-ref/ 1589 pwm3_sleep_pins_a: pwm3-sleep-0 { 1590 pins { 1591 pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */ 1592 }; 1593 }; 1594 1595 /omit-if-no-ref/ 1596 pwm3_pins_b: pwm3-1 { 1597 pins { 1598 pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */ 1599 bias-disable; 1600 drive-push-pull; 1601 slew-rate = <0>; 1602 }; 1603 }; 1604 1605 /omit-if-no-ref/ 1606 pwm3_sleep_pins_b: pwm3-sleep-1 { 1607 pins { 1608 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */ 1609 }; 1610 }; 1611 1612 /omit-if-no-ref/ 1613 pwm4_pins_a: pwm4-0 { 1614 pins { 1615 pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */ 1616 <STM32_PINMUX('D', 15, AF2)>; /* TIM4_CH4 */ 1617 bias-pull-down; 1618 drive-push-pull; 1619 slew-rate = <0>; 1620 }; 1621 }; 1622 1623 /omit-if-no-ref/ 1624 pwm4_sleep_pins_a: pwm4-sleep-0 { 1625 pins { 1626 pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */ 1627 <STM32_PINMUX('D', 15, ANALOG)>; /* TIM4_CH4 */ 1628 }; 1629 }; 1630 1631 /omit-if-no-ref/ 1632 pwm4_pins_b: pwm4-1 { 1633 pins { 1634 pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */ 1635 bias-pull-down; 1636 drive-push-pull; 1637 slew-rate = <0>; 1638 }; 1639 }; 1640 1641 /omit-if-no-ref/ 1642 pwm4_sleep_pins_b: pwm4-sleep-1 { 1643 pins { 1644 pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */ 1645 }; 1646 }; 1647 1648 /omit-if-no-ref/ 1649 pwm5_pins_a: pwm5-0 { 1650 pins { 1651 pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */ 1652 bias-pull-down; 1653 drive-push-pull; 1654 slew-rate = <0>; 1655 }; 1656 }; 1657 1658 /omit-if-no-ref/ 1659 pwm5_sleep_pins_a: pwm5-sleep-0 { 1660 pins { 1661 pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */ 1662 }; 1663 }; 1664 1665 /omit-if-no-ref/ 1666 pwm5_pins_b: pwm5-1 { 1667 pins { 1668 pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */ 1669 <STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */ 1670 <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */ 1671 bias-disable; 1672 drive-push-pull; 1673 slew-rate = <0>; 1674 }; 1675 }; 1676 1677 /omit-if-no-ref/ 1678 pwm5_sleep_pins_b: pwm5-sleep-1 { 1679 pins { 1680 pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */ 1681 <STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */ 1682 <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */ 1683 }; 1684 }; 1685 1686 /omit-if-no-ref/ 1687 pwm8_pins_a: pwm8-0 { 1688 pins { 1689 pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */ 1690 bias-pull-down; 1691 drive-push-pull; 1692 slew-rate = <0>; 1693 }; 1694 }; 1695 1696 /omit-if-no-ref/ 1697 pwm8_sleep_pins_a: pwm8-sleep-0 { 1698 pins { 1699 pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */ 1700 }; 1701 }; 1702 1703 /omit-if-no-ref/ 1704 pwm8_pins_b: pwm8-1 { 1705 pins { 1706 pinmux = <STM32_PINMUX('I', 5, AF3)>, /* TIM8_CH1 */ 1707 <STM32_PINMUX('I', 6, AF3)>, /* TIM8_CH2 */ 1708 <STM32_PINMUX('I', 7, AF3)>, /* TIM8_CH3 */ 1709 <STM32_PINMUX('C', 9, AF3)>; /* TIM8_CH4 */ 1710 drive-push-pull; 1711 slew-rate = <0>; 1712 }; 1713 }; 1714 1715 /omit-if-no-ref/ 1716 pwm8_sleep_pins_b: pwm8-sleep-1 { 1717 pins { 1718 pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* TIM8_CH1 */ 1719 <STM32_PINMUX('I', 6, ANALOG)>, /* TIM8_CH2 */ 1720 <STM32_PINMUX('I', 7, ANALOG)>, /* TIM8_CH3 */ 1721 <STM32_PINMUX('C', 9, ANALOG)>; /* TIM8_CH4 */ 1722 }; 1723 }; 1724 1725 /omit-if-no-ref/ 1726 pwm12_pins_a: pwm12-0 { 1727 pins { 1728 pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */ 1729 bias-pull-down; 1730 drive-push-pull; 1731 slew-rate = <0>; 1732 }; 1733 }; 1734 1735 /omit-if-no-ref/ 1736 pwm12_sleep_pins_a: pwm12-sleep-0 { 1737 pins { 1738 pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */ 1739 }; 1740 }; 1741 1742 /omit-if-no-ref/ 1743 qspi_clk_pins_a: qspi-clk-0 { 1744 pins { 1745 pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */ 1746 bias-disable; 1747 drive-push-pull; 1748 slew-rate = <3>; 1749 }; 1750 }; 1751 1752 /omit-if-no-ref/ 1753 qspi_clk_sleep_pins_a: qspi-clk-sleep-0 { 1754 pins { 1755 pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */ 1756 }; 1757 }; 1758 1759 /omit-if-no-ref/ 1760 qspi_bk1_pins_a: qspi-bk1-0 { 1761 pins { 1762 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */ 1763 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */ 1764 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */ 1765 <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */ 1766 bias-disable; 1767 drive-push-pull; 1768 slew-rate = <1>; 1769 }; 1770 }; 1771 1772 /omit-if-no-ref/ 1773 qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 { 1774 pins { 1775 pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */ 1776 <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */ 1777 <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */ 1778 <STM32_PINMUX('F', 6, ANALOG)>; /* QSPI_BK1_IO3 */ 1779 }; 1780 }; 1781 1782 /omit-if-no-ref/ 1783 qspi_bk2_pins_a: qspi-bk2-0 { 1784 pins { 1785 pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */ 1786 <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */ 1787 <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */ 1788 <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */ 1789 bias-disable; 1790 drive-push-pull; 1791 slew-rate = <1>; 1792 }; 1793 }; 1794 1795 /omit-if-no-ref/ 1796 qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 { 1797 pins { 1798 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */ 1799 <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */ 1800 <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */ 1801 <STM32_PINMUX('G', 7, ANALOG)>; /* QSPI_BK2_IO3 */ 1802 }; 1803 }; 1804 1805 /omit-if-no-ref/ 1806 qspi_cs1_pins_a: qspi-cs1-0 { 1807 pins { 1808 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */ 1809 bias-pull-up; 1810 drive-push-pull; 1811 slew-rate = <1>; 1812 }; 1813 }; 1814 1815 /omit-if-no-ref/ 1816 qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 { 1817 pins { 1818 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */ 1819 }; 1820 }; 1821 1822 /omit-if-no-ref/ 1823 qspi_cs2_pins_a: qspi-cs2-0 { 1824 pins { 1825 pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */ 1826 bias-pull-up; 1827 drive-push-pull; 1828 slew-rate = <1>; 1829 }; 1830 }; 1831 1832 /omit-if-no-ref/ 1833 qspi_cs2_sleep_pins_a: qspi-cs2-sleep-0 { 1834 pins { 1835 pinmux = <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */ 1836 }; 1837 }; 1838 1839 /omit-if-no-ref/ 1840 rtc_rsvd_pins_a: rtc-rsvd-0 { 1841 pins { 1842 pinmux = <STM32_PINMUX('I', 8, ANALOG)>; /* RTC_OUT2_RMP */ 1843 }; 1844 }; 1845 1846 /omit-if-no-ref/ 1847 sai2a_pins_a: sai2a-0 { 1848 pins { 1849 pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */ 1850 <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */ 1851 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */ 1852 <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */ 1853 slew-rate = <0>; 1854 drive-push-pull; 1855 bias-disable; 1856 }; 1857 }; 1858 1859 /omit-if-no-ref/ 1860 sai2a_sleep_pins_a: sai2a-sleep-0 { 1861 pins { 1862 pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */ 1863 <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */ 1864 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */ 1865 <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */ 1866 }; 1867 }; 1868 1869 /omit-if-no-ref/ 1870 sai2a_pins_b: sai2a-1 { 1871 pins1 { 1872 pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */ 1873 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */ 1874 <STM32_PINMUX('D', 13, AF10)>; /* SAI2_SCK_A */ 1875 slew-rate = <0>; 1876 drive-push-pull; 1877 bias-disable; 1878 }; 1879 }; 1880 1881 /omit-if-no-ref/ 1882 sai2a_sleep_pins_b: sai2a-sleep-1 { 1883 pins { 1884 pinmux = <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */ 1885 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */ 1886 <STM32_PINMUX('D', 13, ANALOG)>; /* SAI2_SCK_A */ 1887 }; 1888 }; 1889 1890 /omit-if-no-ref/ 1891 sai2a_pins_c: sai2a-2 { 1892 pins { 1893 pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */ 1894 <STM32_PINMUX('D', 11, AF10)>, /* SAI2_SD_A */ 1895 <STM32_PINMUX('D', 12, AF10)>; /* SAI2_FS_A */ 1896 slew-rate = <0>; 1897 drive-push-pull; 1898 bias-disable; 1899 }; 1900 }; 1901 1902 /omit-if-no-ref/ 1903 sai2a_sleep_pins_c: sai2a-sleep-2 { 1904 pins { 1905 pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */ 1906 <STM32_PINMUX('D', 11, ANALOG)>, /* SAI2_SD_A */ 1907 <STM32_PINMUX('D', 12, ANALOG)>; /* SAI2_FS_A */ 1908 }; 1909 }; 1910 1911 /omit-if-no-ref/ 1912 sai2b_pins_a: sai2b-0 { 1913 pins1 { 1914 pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */ 1915 <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */ 1916 <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */ 1917 slew-rate = <0>; 1918 drive-push-pull; 1919 bias-disable; 1920 }; 1921 pins2 { 1922 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */ 1923 bias-disable; 1924 }; 1925 }; 1926 1927 /omit-if-no-ref/ 1928 sai2b_sleep_pins_a: sai2b-sleep-0 { 1929 pins { 1930 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */ 1931 <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */ 1932 <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */ 1933 <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */ 1934 }; 1935 }; 1936 1937 /omit-if-no-ref/ 1938 sai2b_pins_b: sai2b-1 { 1939 pins { 1940 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */ 1941 bias-disable; 1942 }; 1943 }; 1944 1945 /omit-if-no-ref/ 1946 sai2b_sleep_pins_b: sai2b-sleep-1 { 1947 pins { 1948 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */ 1949 }; 1950 }; 1951 1952 /omit-if-no-ref/ 1953 sai2b_pins_c: sai2b-2 { 1954 pins1 { 1955 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */ 1956 bias-disable; 1957 }; 1958 }; 1959 1960 /omit-if-no-ref/ 1961 sai2b_sleep_pins_c: sai2b-sleep-2 { 1962 pins { 1963 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */ 1964 }; 1965 }; 1966 1967 /omit-if-no-ref/ 1968 sai2b_pins_d: sai2b-3 { 1969 pins1 { 1970 pinmux = <STM32_PINMUX('H', 2, AF10)>, /* SAI2_SCK_B */ 1971 <STM32_PINMUX('C', 0, AF8)>, /* SAI2_FS_B */ 1972 <STM32_PINMUX('H', 3, AF10)>; /* SAI2_MCLK_B */ 1973 slew-rate = <0>; 1974 drive-push-pull; 1975 bias-disable; 1976 }; 1977 pins2 { 1978 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */ 1979 bias-disable; 1980 }; 1981 }; 1982 1983 /omit-if-no-ref/ 1984 sai2b_sleep_pins_d: sai2b-sleep-3 { 1985 pins1 { 1986 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* SAI2_SCK_B */ 1987 <STM32_PINMUX('C', 0, ANALOG)>, /* SAI2_FS_B */ 1988 <STM32_PINMUX('H', 3, ANALOG)>, /* SAI2_MCLK_B */ 1989 <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */ 1990 }; 1991 }; 1992 1993 /omit-if-no-ref/ 1994 sai4a_pins_a: sai4a-0 { 1995 pins { 1996 pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */ 1997 slew-rate = <0>; 1998 drive-push-pull; 1999 bias-disable; 2000 }; 2001 }; 2002 2003 /omit-if-no-ref/ 2004 sai4a_sleep_pins_a: sai4a-sleep-0 { 2005 pins { 2006 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */ 2007 }; 2008 }; 2009 2010 /omit-if-no-ref/ 2011 sdmmc1_b4_pins_a: sdmmc1-b4-0 { 2012 pins1 { 2013 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ 2014 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ 2015 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ 2016 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ 2017 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ 2018 slew-rate = <1>; 2019 drive-push-pull; 2020 bias-disable; 2021 }; 2022 pins2 { 2023 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ 2024 slew-rate = <2>; 2025 drive-push-pull; 2026 bias-disable; 2027 }; 2028 }; 2029 2030 /omit-if-no-ref/ 2031 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { 2032 pins1 { 2033 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ 2034 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ 2035 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ 2036 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */ 2037 slew-rate = <1>; 2038 drive-push-pull; 2039 bias-disable; 2040 }; 2041 pins2 { 2042 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ 2043 slew-rate = <2>; 2044 drive-push-pull; 2045 bias-disable; 2046 }; 2047 pins3 { 2048 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ 2049 slew-rate = <1>; 2050 drive-open-drain; 2051 bias-disable; 2052 }; 2053 }; 2054 2055 /omit-if-no-ref/ 2056 sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 { 2057 pins1 { 2058 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ 2059 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ 2060 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ 2061 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */ 2062 slew-rate = <1>; 2063 drive-push-pull; 2064 bias-disable; 2065 }; 2066 }; 2067 2068 /omit-if-no-ref/ 2069 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { 2070 pins { 2071 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ 2072 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */ 2073 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */ 2074 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */ 2075 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */ 2076 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */ 2077 }; 2078 }; 2079 2080 /omit-if-no-ref/ 2081 sdmmc1_b4_pins_b: sdmmc1-b4-1 { 2082 pins1 { 2083 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ 2084 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ 2085 <STM32_PINMUX('E', 6, AF8)>, /* SDMMC1_D2 */ 2086 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ 2087 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ 2088 slew-rate = <1>; 2089 drive-push-pull; 2090 bias-disable; 2091 }; 2092 pins2 { 2093 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ 2094 slew-rate = <2>; 2095 drive-push-pull; 2096 bias-disable; 2097 }; 2098 }; 2099 2100 /omit-if-no-ref/ 2101 sdmmc1_b4_od_pins_b: sdmmc1-b4-od-1 { 2102 pins1 { 2103 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ 2104 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ 2105 <STM32_PINMUX('E', 6, AF8)>, /* SDMMC1_D2 */ 2106 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */ 2107 slew-rate = <1>; 2108 drive-push-pull; 2109 bias-disable; 2110 }; 2111 pins2 { 2112 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ 2113 slew-rate = <2>; 2114 drive-push-pull; 2115 bias-disable; 2116 }; 2117 pins3 { 2118 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ 2119 slew-rate = <1>; 2120 drive-open-drain; 2121 bias-disable; 2122 }; 2123 }; 2124 2125 /omit-if-no-ref/ 2126 sdmmc1_b4_sleep_pins_b: sdmmc1-b4-sleep-1 { 2127 pins { 2128 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ 2129 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */ 2130 <STM32_PINMUX('E', 6, ANALOG)>, /* SDMMC1_D2 */ 2131 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */ 2132 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */ 2133 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */ 2134 }; 2135 }; 2136 2137 /omit-if-no-ref/ 2138 sdmmc1_dir_pins_a: sdmmc1-dir-0 { 2139 pins1 { 2140 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */ 2141 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */ 2142 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */ 2143 slew-rate = <1>; 2144 drive-push-pull; 2145 bias-pull-up; 2146 }; 2147 pins2 { 2148 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */ 2149 bias-pull-up; 2150 }; 2151 }; 2152 2153 /omit-if-no-ref/ 2154 sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 { 2155 pins1 { 2156 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */ 2157 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */ 2158 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */ 2159 slew-rate = <1>; 2160 drive-push-pull; 2161 bias-pull-up; 2162 }; 2163 }; 2164 2165 /omit-if-no-ref/ 2166 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 { 2167 pins { 2168 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */ 2169 <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */ 2170 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */ 2171 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */ 2172 }; 2173 }; 2174 2175 /omit-if-no-ref/ 2176 sdmmc1_dir_pins_b: sdmmc1-dir-1 { 2177 pins1 { 2178 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */ 2179 <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */ 2180 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */ 2181 slew-rate = <1>; 2182 drive-push-pull; 2183 bias-pull-up; 2184 }; 2185 pins2 { 2186 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */ 2187 bias-pull-up; 2188 }; 2189 }; 2190 2191 /omit-if-no-ref/ 2192 sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 { 2193 pins { 2194 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */ 2195 <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */ 2196 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */ 2197 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */ 2198 }; 2199 }; 2200 2201 /omit-if-no-ref/ 2202 sdmmc2_b4_pins_a: sdmmc2-b4-0 { 2203 pins1 { 2204 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ 2205 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */ 2206 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ 2207 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */ 2208 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ 2209 slew-rate = <1>; 2210 drive-push-pull; 2211 bias-pull-up; 2212 }; 2213 pins2 { 2214 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */ 2215 slew-rate = <2>; 2216 drive-push-pull; 2217 bias-pull-up; 2218 }; 2219 }; 2220 2221 /omit-if-no-ref/ 2222 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { 2223 pins1 { 2224 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ 2225 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */ 2226 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ 2227 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */ 2228 slew-rate = <1>; 2229 drive-push-pull; 2230 bias-pull-up; 2231 }; 2232 pins2 { 2233 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */ 2234 slew-rate = <2>; 2235 drive-push-pull; 2236 bias-pull-up; 2237 }; 2238 pins3 { 2239 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ 2240 slew-rate = <1>; 2241 drive-open-drain; 2242 bias-pull-up; 2243 }; 2244 }; 2245 2246 /omit-if-no-ref/ 2247 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { 2248 pins { 2249 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */ 2250 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */ 2251 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */ 2252 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */ 2253 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */ 2254 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */ 2255 }; 2256 }; 2257 2258 /omit-if-no-ref/ 2259 sdmmc2_b4_pins_b: sdmmc2-b4-1 { 2260 pins1 { 2261 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ 2262 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */ 2263 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ 2264 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */ 2265 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ 2266 slew-rate = <1>; 2267 drive-push-pull; 2268 bias-disable; 2269 }; 2270 pins2 { 2271 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */ 2272 slew-rate = <2>; 2273 drive-push-pull; 2274 bias-disable; 2275 }; 2276 }; 2277 2278 /omit-if-no-ref/ 2279 sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 { 2280 pins1 { 2281 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ 2282 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */ 2283 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ 2284 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */ 2285 slew-rate = <1>; 2286 drive-push-pull; 2287 bias-disable; 2288 }; 2289 pins2 { 2290 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */ 2291 slew-rate = <2>; 2292 drive-push-pull; 2293 bias-disable; 2294 }; 2295 pins3 { 2296 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ 2297 slew-rate = <1>; 2298 drive-open-drain; 2299 bias-disable; 2300 }; 2301 }; 2302 2303 /omit-if-no-ref/ 2304 sdmmc2_b4_pins_c: sdmmc2-b4-2 { 2305 pins1 { 2306 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ 2307 <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */ 2308 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ 2309 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */ 2310 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ 2311 slew-rate = <1>; 2312 drive-push-pull; 2313 bias-pull-up; 2314 }; 2315 2316 pins2 { 2317 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */ 2318 slew-rate = <2>; 2319 drive-push-pull; 2320 bias-pull-up; 2321 }; 2322 }; 2323 2324 /omit-if-no-ref/ 2325 sdmmc2_b4_od_pins_c: sdmmc2-b4-od-2 { 2326 pins1 { 2327 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ 2328 <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */ 2329 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ 2330 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */ 2331 slew-rate = <1>; 2332 drive-push-pull; 2333 bias-pull-up; 2334 }; 2335 2336 pins2 { 2337 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */ 2338 slew-rate = <2>; 2339 drive-push-pull; 2340 bias-pull-up; 2341 }; 2342 2343 pins3 { 2344 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ 2345 slew-rate = <1>; 2346 drive-open-drain; 2347 bias-pull-up; 2348 }; 2349 }; 2350 2351 /omit-if-no-ref/ 2352 sdmmc2_b4_sleep_pins_c: sdmmc2-b4-sleep-2 { 2353 pins { 2354 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */ 2355 <STM32_PINMUX('B', 7, ANALOG)>, /* SDMMC2_D1 */ 2356 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */ 2357 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */ 2358 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */ 2359 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */ 2360 }; 2361 }; 2362 2363 /omit-if-no-ref/ 2364 sdmmc2_d47_pins_a: sdmmc2-d47-0 { 2365 pins { 2366 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */ 2367 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */ 2368 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */ 2369 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */ 2370 slew-rate = <1>; 2371 drive-push-pull; 2372 bias-pull-up; 2373 }; 2374 }; 2375 2376 /omit-if-no-ref/ 2377 sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 { 2378 pins { 2379 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */ 2380 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */ 2381 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */ 2382 <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */ 2383 }; 2384 }; 2385 2386 /omit-if-no-ref/ 2387 sdmmc2_d47_pins_b: sdmmc2-d47-1 { 2388 pins { 2389 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */ 2390 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */ 2391 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */ 2392 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */ 2393 slew-rate = <1>; 2394 drive-push-pull; 2395 bias-disable; 2396 }; 2397 }; 2398 2399 /omit-if-no-ref/ 2400 sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 { 2401 pins { 2402 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */ 2403 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */ 2404 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */ 2405 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */ 2406 }; 2407 }; 2408 2409 /omit-if-no-ref/ 2410 sdmmc2_d47_pins_c: sdmmc2-d47-2 { 2411 pins { 2412 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */ 2413 <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */ 2414 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */ 2415 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */ 2416 slew-rate = <1>; 2417 drive-push-pull; 2418 bias-pull-up; 2419 }; 2420 }; 2421 2422 /omit-if-no-ref/ 2423 sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 { 2424 pins { 2425 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */ 2426 <STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */ 2427 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */ 2428 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */ 2429 }; 2430 }; 2431 2432 /omit-if-no-ref/ 2433 sdmmc2_d47_pins_d: sdmmc2-d47-3 { 2434 pins { 2435 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */ 2436 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */ 2437 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */ 2438 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */ 2439 slew-rate = <1>; 2440 drive-push-pull; 2441 bias-pull-up; 2442 }; 2443 }; 2444 2445 /omit-if-no-ref/ 2446 sdmmc2_d47_sleep_pins_d: sdmmc2-d47-sleep-3 { 2447 pins { 2448 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */ 2449 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */ 2450 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */ 2451 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */ 2452 }; 2453 }; 2454 2455 /omit-if-no-ref/ 2456 sdmmc2_d47_pins_e: sdmmc2-d47-4 { 2457 pins { 2458 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */ 2459 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */ 2460 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */ 2461 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */ 2462 slew-rate = <1>; 2463 drive-push-pull; 2464 bias-pull-up; 2465 }; 2466 }; 2467 2468 /omit-if-no-ref/ 2469 sdmmc2_d47_sleep_pins_e: sdmmc2-d47-sleep-4 { 2470 pins { 2471 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */ 2472 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */ 2473 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */ 2474 <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */ 2475 }; 2476 }; 2477 2478 /omit-if-no-ref/ 2479 sdmmc3_b4_pins_a: sdmmc3-b4-0 { 2480 pins1 { 2481 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */ 2482 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */ 2483 <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */ 2484 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */ 2485 <STM32_PINMUX('F', 1, AF9)>; /* SDMMC3_CMD */ 2486 slew-rate = <1>; 2487 drive-push-pull; 2488 bias-pull-up; 2489 }; 2490 pins2 { 2491 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */ 2492 slew-rate = <2>; 2493 drive-push-pull; 2494 bias-pull-up; 2495 }; 2496 }; 2497 2498 /omit-if-no-ref/ 2499 sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 { 2500 pins1 { 2501 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */ 2502 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */ 2503 <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */ 2504 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */ 2505 slew-rate = <1>; 2506 drive-push-pull; 2507 bias-pull-up; 2508 }; 2509 pins2 { 2510 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */ 2511 slew-rate = <2>; 2512 drive-push-pull; 2513 bias-pull-up; 2514 }; 2515 pins3 { 2516 pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */ 2517 slew-rate = <1>; 2518 drive-open-drain; 2519 bias-pull-up; 2520 }; 2521 }; 2522 2523 /omit-if-no-ref/ 2524 sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 { 2525 pins { 2526 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */ 2527 <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */ 2528 <STM32_PINMUX('F', 5, ANALOG)>, /* SDMMC3_D2 */ 2529 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */ 2530 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */ 2531 <STM32_PINMUX('F', 1, ANALOG)>; /* SDMMC3_CMD */ 2532 }; 2533 }; 2534 2535 /omit-if-no-ref/ 2536 sdmmc3_b4_pins_b: sdmmc3-b4-1 { 2537 pins1 { 2538 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */ 2539 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */ 2540 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */ 2541 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */ 2542 <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */ 2543 slew-rate = <1>; 2544 drive-push-pull; 2545 bias-pull-up; 2546 }; 2547 pins2 { 2548 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */ 2549 slew-rate = <2>; 2550 drive-push-pull; 2551 bias-pull-up; 2552 }; 2553 }; 2554 2555 /omit-if-no-ref/ 2556 sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 { 2557 pins1 { 2558 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */ 2559 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */ 2560 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */ 2561 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */ 2562 slew-rate = <1>; 2563 drive-push-pull; 2564 bias-pull-up; 2565 }; 2566 pins2 { 2567 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */ 2568 slew-rate = <2>; 2569 drive-push-pull; 2570 bias-pull-up; 2571 }; 2572 pins3 { 2573 pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */ 2574 slew-rate = <1>; 2575 drive-open-drain; 2576 bias-pull-up; 2577 }; 2578 }; 2579 2580 /omit-if-no-ref/ 2581 sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 { 2582 pins { 2583 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */ 2584 <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */ 2585 <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */ 2586 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */ 2587 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */ 2588 <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */ 2589 }; 2590 }; 2591 2592 /omit-if-no-ref/ 2593 sdmmc3_b4_pins_c: sdmmc3-b4-2 { 2594 pins1 { 2595 pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */ 2596 <STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */ 2597 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */ 2598 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */ 2599 <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */ 2600 slew-rate = <1>; 2601 drive-push-pull; 2602 bias-pull-up; 2603 }; 2604 2605 pins2 { 2606 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */ 2607 slew-rate = <2>; 2608 drive-push-pull; 2609 bias-pull-up; 2610 }; 2611 }; 2612 2613 /omit-if-no-ref/ 2614 sdmmc3_b4_od_pins_c: sdmmc3-b4-od-2 { 2615 pins1 { 2616 pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */ 2617 <STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */ 2618 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */ 2619 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */ 2620 slew-rate = <1>; 2621 drive-push-pull; 2622 bias-pull-up; 2623 }; 2624 2625 pins2 { 2626 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */ 2627 slew-rate = <2>; 2628 drive-push-pull; 2629 bias-pull-up; 2630 }; 2631 2632 pins3 { 2633 pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */ 2634 slew-rate = <1>; 2635 drive-open-drain; 2636 bias-pull-up; 2637 }; 2638 }; 2639 2640 /omit-if-no-ref/ 2641 sdmmc3_b4_sleep_pins_c: sdmmc3-b4-sleep-2 { 2642 pins { 2643 pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* SDMMC3_D0 */ 2644 <STM32_PINMUX('D', 4, ANALOG)>, /* SDMMC3_D1 */ 2645 <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */ 2646 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */ 2647 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */ 2648 <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */ 2649 }; 2650 }; 2651 2652 /omit-if-no-ref/ 2653 spdifrx_pins_a: spdifrx-0 { 2654 pins { 2655 pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */ 2656 bias-disable; 2657 }; 2658 }; 2659 2660 /omit-if-no-ref/ 2661 spdifrx_sleep_pins_a: spdifrx-sleep-0 { 2662 pins { 2663 pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */ 2664 }; 2665 }; 2666 2667 /omit-if-no-ref/ 2668 spi1_pins_b: spi1-1 { 2669 pins1 { 2670 pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */ 2671 <STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */ 2672 bias-disable; 2673 drive-push-pull; 2674 slew-rate = <1>; 2675 }; 2676 2677 pins2 { 2678 pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */ 2679 bias-disable; 2680 }; 2681 }; 2682 2683 /omit-if-no-ref/ 2684 spi2_pins_a: spi2-0 { 2685 pins1 { 2686 pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */ 2687 <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */ 2688 bias-disable; 2689 drive-push-pull; 2690 slew-rate = <1>; 2691 }; 2692 2693 pins2 { 2694 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */ 2695 bias-disable; 2696 }; 2697 }; 2698 2699 /omit-if-no-ref/ 2700 spi2_pins_b: spi2-1 { 2701 pins1 { 2702 pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */ 2703 <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */ 2704 bias-disable; 2705 drive-push-pull; 2706 slew-rate = <1>; 2707 }; 2708 2709 pins2 { 2710 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */ 2711 bias-disable; 2712 }; 2713 }; 2714 2715 /omit-if-no-ref/ 2716 spi2_pins_c: spi2-2 { 2717 pins1 { 2718 pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */ 2719 <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */ 2720 bias-disable; 2721 drive-push-pull; 2722 }; 2723 2724 pins2 { 2725 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */ 2726 bias-pull-down; 2727 }; 2728 }; 2729 2730 /omit-if-no-ref/ 2731 spi4_pins_a: spi4-0 { 2732 pins { 2733 pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */ 2734 <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */ 2735 bias-disable; 2736 drive-push-pull; 2737 slew-rate = <1>; 2738 }; 2739 pins2 { 2740 pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */ 2741 bias-disable; 2742 }; 2743 }; 2744 2745 /omit-if-no-ref/ 2746 spi5_pins_a: spi5-0 { 2747 pins1 { 2748 pinmux = <STM32_PINMUX('F', 7, AF5)>, /* SPI5_SCK */ 2749 <STM32_PINMUX('F', 9, AF5)>; /* SPI5_MOSI */ 2750 bias-disable; 2751 drive-push-pull; 2752 slew-rate = <1>; 2753 }; 2754 2755 pins2 { 2756 pinmux = <STM32_PINMUX('F', 8, AF5)>; /* SPI5_MISO */ 2757 bias-disable; 2758 }; 2759 }; 2760 2761 /omit-if-no-ref/ 2762 stusb1600_pins_a: stusb1600-0 { 2763 pins { 2764 pinmux = <STM32_PINMUX('I', 11, GPIO)>; 2765 bias-pull-up; 2766 }; 2767 }; 2768 2769 /omit-if-no-ref/ 2770 uart4_pins_a: uart4-0 { 2771 pins1 { 2772 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */ 2773 bias-disable; 2774 drive-push-pull; 2775 slew-rate = <0>; 2776 }; 2777 pins2 { 2778 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 2779 bias-disable; 2780 }; 2781 }; 2782 2783 /omit-if-no-ref/ 2784 uart4_idle_pins_a: uart4-idle-0 { 2785 pins1 { 2786 pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */ 2787 }; 2788 pins2 { 2789 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 2790 bias-disable; 2791 }; 2792 }; 2793 2794 /omit-if-no-ref/ 2795 uart4_sleep_pins_a: uart4-sleep-0 { 2796 pins { 2797 pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */ 2798 <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */ 2799 }; 2800 }; 2801 2802 /omit-if-no-ref/ 2803 uart4_pins_b: uart4-1 { 2804 pins1 { 2805 pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */ 2806 bias-disable; 2807 drive-push-pull; 2808 slew-rate = <0>; 2809 }; 2810 pins2 { 2811 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 2812 bias-disable; 2813 }; 2814 }; 2815 2816 /omit-if-no-ref/ 2817 uart4_pins_c: uart4-2 { 2818 pins1 { 2819 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */ 2820 bias-disable; 2821 drive-push-pull; 2822 slew-rate = <0>; 2823 }; 2824 pins2 { 2825 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 2826 bias-disable; 2827 }; 2828 }; 2829 2830 /omit-if-no-ref/ 2831 uart4_pins_d: uart4-3 { 2832 pins1 { 2833 pinmux = <STM32_PINMUX('A', 13, AF8)>; /* UART4_TX */ 2834 bias-disable; 2835 drive-push-pull; 2836 slew-rate = <0>; 2837 }; 2838 pins2 { 2839 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 2840 bias-disable; 2841 }; 2842 }; 2843 2844 /omit-if-no-ref/ 2845 uart4_idle_pins_d: uart4-idle-3 { 2846 pins1 { 2847 pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* UART4_TX */ 2848 }; 2849 pins2 { 2850 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 2851 bias-disable; 2852 }; 2853 }; 2854 2855 /omit-if-no-ref/ 2856 uart4_sleep_pins_d: uart4-sleep-3 { 2857 pins { 2858 pinmux = <STM32_PINMUX('A', 13, ANALOG)>, /* UART4_TX */ 2859 <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */ 2860 }; 2861 }; 2862 2863 /omit-if-no-ref/ 2864 uart4_pins_e: uart4-4 { 2865 pins1 { 2866 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */ 2867 bias-disable; 2868 drive-push-pull; 2869 slew-rate = <0>; 2870 }; 2871 2872 pins2 { 2873 pinmux = <STM32_PINMUX('B', 8, AF8)>; /* UART4_RX */ 2874 bias-disable; 2875 }; 2876 }; 2877 2878 /omit-if-no-ref/ 2879 uart4_idle_pins_e: uart4-idle-4 { 2880 pins1 { 2881 pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */ 2882 }; 2883 2884 pins2 { 2885 pinmux = <STM32_PINMUX('B', 8, AF8)>; /* UART4_RX */ 2886 bias-disable; 2887 }; 2888 }; 2889 2890 /omit-if-no-ref/ 2891 uart4_sleep_pins_e: uart4-sleep-4 { 2892 pins { 2893 pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */ 2894 <STM32_PINMUX('B', 8, ANALOG)>; /* UART4_RX */ 2895 }; 2896 }; 2897 2898 /omit-if-no-ref/ 2899 uart5_pins_a: uart5-0 { 2900 pins1 { 2901 pinmux = <STM32_PINMUX('B', 13, AF14)>; /* UART5_TX */ 2902 bias-disable; 2903 drive-push-pull; 2904 slew-rate = <0>; 2905 }; 2906 pins2 { 2907 pinmux = <STM32_PINMUX('B', 5, AF12)>; /* UART5_RX */ 2908 bias-disable; 2909 }; 2910 }; 2911 2912 /omit-if-no-ref/ 2913 uart7_pins_a: uart7-0 { 2914 pins1 { 2915 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */ 2916 bias-disable; 2917 drive-push-pull; 2918 slew-rate = <0>; 2919 }; 2920 pins2 { 2921 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */ 2922 <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */ 2923 <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */ 2924 bias-disable; 2925 }; 2926 }; 2927 2928 /omit-if-no-ref/ 2929 uart7_pins_b: uart7-1 { 2930 pins1 { 2931 pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */ 2932 bias-disable; 2933 drive-push-pull; 2934 slew-rate = <0>; 2935 }; 2936 pins2 { 2937 pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */ 2938 bias-disable; 2939 }; 2940 }; 2941 2942 /omit-if-no-ref/ 2943 uart7_pins_c: uart7-2 { 2944 pins1 { 2945 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */ 2946 bias-disable; 2947 drive-push-pull; 2948 slew-rate = <0>; 2949 }; 2950 pins2 { 2951 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */ 2952 bias-pull-up; 2953 }; 2954 }; 2955 2956 /omit-if-no-ref/ 2957 uart7_idle_pins_c: uart7-idle-2 { 2958 pins1 { 2959 pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */ 2960 }; 2961 pins2 { 2962 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */ 2963 bias-pull-up; 2964 }; 2965 }; 2966 2967 /omit-if-no-ref/ 2968 uart7_sleep_pins_c: uart7-sleep-2 { 2969 pins { 2970 pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */ 2971 <STM32_PINMUX('E', 7, ANALOG)>; /* UART7_RX */ 2972 }; 2973 }; 2974 2975 /omit-if-no-ref/ 2976 uart7_pins_d: uart7-3 { 2977 pins1 { 2978 pinmux = <STM32_PINMUX('F', 7, AF7)>, /* UART7_TX */ 2979 <STM32_PINMUX('F', 8, AF7)>; /* UART7_RTS */ 2980 bias-disable; 2981 drive-push-pull; 2982 slew-rate = <0>; 2983 }; 2984 2985 pins2 { 2986 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */ 2987 <STM32_PINMUX('F', 9, AF7)>; /* UART7_CTS */ 2988 bias-disable; 2989 }; 2990 }; 2991 2992 /omit-if-no-ref/ 2993 uart8_pins_a: uart8-0 { 2994 pins1 { 2995 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */ 2996 bias-disable; 2997 drive-push-pull; 2998 slew-rate = <0>; 2999 }; 3000 pins2 { 3001 pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */ 3002 bias-disable; 3003 }; 3004 }; 3005 3006 /omit-if-no-ref/ 3007 uart8_rtscts_pins_a: uart8rtscts-0 { 3008 pins { 3009 pinmux = <STM32_PINMUX('G', 7, AF8)>, /* UART8_RTS */ 3010 <STM32_PINMUX('G', 10, AF8)>; /* UART8_CTS */ 3011 bias-disable; 3012 }; 3013 }; 3014 3015 /omit-if-no-ref/ 3016 usart1_pins_a: usart1-0 { 3017 pins1 { 3018 pinmux = <STM32_PINMUX('A', 12, AF7)>; /* USART1_RTS */ 3019 bias-disable; 3020 drive-push-pull; 3021 slew-rate = <0>; 3022 }; 3023 pins2 { 3024 pinmux = <STM32_PINMUX('A', 11, AF7)>; /* USART1_CTS_NSS */ 3025 bias-disable; 3026 }; 3027 }; 3028 3029 /omit-if-no-ref/ 3030 usart1_idle_pins_a: usart1-idle-0 { 3031 pins1 { 3032 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */ 3033 <STM32_PINMUX('A', 11, AF7)>; /* USART1_CTS_NSS */ 3034 }; 3035 }; 3036 3037 /omit-if-no-ref/ 3038 usart1_sleep_pins_a: usart1-sleep-0 { 3039 pins { 3040 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */ 3041 <STM32_PINMUX('A', 11, ANALOG)>; /* USART1_CTS_NSS */ 3042 }; 3043 }; 3044 3045 /omit-if-no-ref/ 3046 usart2_pins_a: usart2-0 { 3047 pins1 { 3048 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */ 3049 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */ 3050 bias-disable; 3051 drive-push-pull; 3052 slew-rate = <0>; 3053 }; 3054 pins2 { 3055 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */ 3056 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */ 3057 bias-disable; 3058 }; 3059 }; 3060 3061 /omit-if-no-ref/ 3062 usart2_sleep_pins_a: usart2-sleep-0 { 3063 pins { 3064 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */ 3065 <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */ 3066 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */ 3067 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */ 3068 }; 3069 }; 3070 3071 /omit-if-no-ref/ 3072 usart2_pins_b: usart2-1 { 3073 pins1 { 3074 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */ 3075 <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */ 3076 bias-disable; 3077 drive-push-pull; 3078 slew-rate = <0>; 3079 }; 3080 pins2 { 3081 pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */ 3082 <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */ 3083 bias-disable; 3084 }; 3085 }; 3086 3087 /omit-if-no-ref/ 3088 usart2_sleep_pins_b: usart2-sleep-1 { 3089 pins { 3090 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */ 3091 <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */ 3092 <STM32_PINMUX('F', 4, ANALOG)>, /* USART2_RX */ 3093 <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */ 3094 }; 3095 }; 3096 3097 /omit-if-no-ref/ 3098 usart2_pins_c: usart2-2 { 3099 pins1 { 3100 pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */ 3101 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */ 3102 bias-disable; 3103 drive-push-pull; 3104 slew-rate = <0>; 3105 }; 3106 pins2 { 3107 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */ 3108 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */ 3109 bias-disable; 3110 }; 3111 }; 3112 3113 /omit-if-no-ref/ 3114 usart2_idle_pins_c: usart2-idle-2 { 3115 pins1 { 3116 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */ 3117 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */ 3118 }; 3119 pins2 { 3120 pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */ 3121 bias-disable; 3122 drive-push-pull; 3123 slew-rate = <0>; 3124 }; 3125 pins3 { 3126 pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */ 3127 bias-disable; 3128 }; 3129 }; 3130 3131 /omit-if-no-ref/ 3132 usart2_sleep_pins_c: usart2-sleep-2 { 3133 pins { 3134 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */ 3135 <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */ 3136 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */ 3137 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */ 3138 }; 3139 }; 3140 3141 /omit-if-no-ref/ 3142 usart3_pins_a: usart3-0 { 3143 pins1 { 3144 pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */ 3145 bias-disable; 3146 drive-push-pull; 3147 slew-rate = <0>; 3148 }; 3149 pins2 { 3150 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ 3151 bias-disable; 3152 }; 3153 }; 3154 3155 /omit-if-no-ref/ 3156 usart3_idle_pins_a: usart3-idle-0 { 3157 pins1 { 3158 pinmux = <STM32_PINMUX('B', 10, ANALOG)>; /* USART3_TX */ 3159 }; 3160 pins2 { 3161 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ 3162 bias-disable; 3163 }; 3164 }; 3165 3166 /omit-if-no-ref/ 3167 usart3_sleep_pins_a: usart3-sleep-0 { 3168 pins { 3169 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3170 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */ 3171 }; 3172 }; 3173 3174 /omit-if-no-ref/ 3175 usart3_pins_b: usart3-1 { 3176 pins1 { 3177 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ 3178 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 3179 bias-disable; 3180 drive-push-pull; 3181 slew-rate = <0>; 3182 }; 3183 pins2 { 3184 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */ 3185 <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */ 3186 bias-pull-up; 3187 }; 3188 }; 3189 3190 /omit-if-no-ref/ 3191 usart3_idle_pins_b: usart3-idle-1 { 3192 pins1 { 3193 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3194 <STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */ 3195 }; 3196 pins2 { 3197 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 3198 bias-disable; 3199 drive-push-pull; 3200 slew-rate = <0>; 3201 }; 3202 pins3 { 3203 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ 3204 bias-pull-up; 3205 }; 3206 }; 3207 3208 /omit-if-no-ref/ 3209 usart3_sleep_pins_b: usart3-sleep-1 { 3210 pins { 3211 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3212 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ 3213 <STM32_PINMUX('I', 10, ANALOG)>, /* USART3_CTS_NSS */ 3214 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */ 3215 }; 3216 }; 3217 3218 /omit-if-no-ref/ 3219 usart3_pins_c: usart3-2 { 3220 pins1 { 3221 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ 3222 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 3223 bias-disable; 3224 drive-push-pull; 3225 slew-rate = <0>; 3226 }; 3227 pins2 { 3228 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */ 3229 <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */ 3230 bias-pull-up; 3231 }; 3232 }; 3233 3234 /omit-if-no-ref/ 3235 usart3_idle_pins_c: usart3-idle-2 { 3236 pins1 { 3237 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3238 <STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */ 3239 }; 3240 pins2 { 3241 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 3242 bias-disable; 3243 drive-push-pull; 3244 slew-rate = <0>; 3245 }; 3246 pins3 { 3247 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ 3248 bias-pull-up; 3249 }; 3250 }; 3251 3252 /omit-if-no-ref/ 3253 usart3_sleep_pins_c: usart3-sleep-2 { 3254 pins { 3255 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3256 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ 3257 <STM32_PINMUX('B', 13, ANALOG)>, /* USART3_CTS_NSS */ 3258 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */ 3259 }; 3260 }; 3261 3262 /omit-if-no-ref/ 3263 usart3_pins_d: usart3-3 { 3264 pins1 { 3265 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ 3266 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 3267 bias-disable; 3268 drive-push-pull; 3269 slew-rate = <0>; 3270 }; 3271 pins2 { 3272 pinmux = <STM32_PINMUX('D', 9, AF7)>, /* USART3_RX */ 3273 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */ 3274 bias-disable; 3275 }; 3276 }; 3277 3278 /omit-if-no-ref/ 3279 usart3_idle_pins_d: usart3-idle-3 { 3280 pins1 { 3281 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3282 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ 3283 <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */ 3284 }; 3285 pins2 { 3286 pinmux = <STM32_PINMUX('D', 9, AF7)>; /* USART3_RX */ 3287 bias-disable; 3288 }; 3289 }; 3290 3291 /omit-if-no-ref/ 3292 usart3_sleep_pins_d: usart3-sleep-3 { 3293 pins { 3294 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3295 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ 3296 <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */ 3297 <STM32_PINMUX('D', 9, ANALOG)>; /* USART3_RX */ 3298 }; 3299 }; 3300 3301 /omit-if-no-ref/ 3302 usart3_pins_e: usart3-4 { 3303 pins1 { 3304 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ 3305 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 3306 bias-disable; 3307 drive-push-pull; 3308 slew-rate = <0>; 3309 }; 3310 pins2 { 3311 pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */ 3312 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */ 3313 bias-pull-up; 3314 }; 3315 }; 3316 3317 /omit-if-no-ref/ 3318 usart3_idle_pins_e: usart3-idle-4 { 3319 pins1 { 3320 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3321 <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */ 3322 }; 3323 pins2 { 3324 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 3325 bias-disable; 3326 drive-push-pull; 3327 slew-rate = <0>; 3328 }; 3329 pins3 { 3330 pinmux = <STM32_PINMUX('B', 11, AF7)>; /* USART3_RX */ 3331 bias-pull-up; 3332 }; 3333 }; 3334 3335 /omit-if-no-ref/ 3336 usart3_sleep_pins_e: usart3-sleep-4 { 3337 pins { 3338 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3339 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ 3340 <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */ 3341 <STM32_PINMUX('B', 11, ANALOG)>; /* USART3_RX */ 3342 }; 3343 }; 3344 3345 /omit-if-no-ref/ 3346 usart3_pins_f: usart3-5 { 3347 pins1 { 3348 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ 3349 <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS */ 3350 bias-disable; 3351 drive-push-pull; 3352 slew-rate = <0>; 3353 }; 3354 pins2 { 3355 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */ 3356 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */ 3357 bias-disable; 3358 }; 3359 }; 3360 3361 /omit-if-no-ref/ 3362 usbotg_hs_pins_a: usbotg-hs-0 { 3363 pins { 3364 pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */ 3365 }; 3366 }; 3367 3368 /omit-if-no-ref/ 3369 usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 { 3370 pins { 3371 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */ 3372 <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */ 3373 }; 3374 }; 3375}; 3376 3377&pinctrl_z { 3378 /omit-if-no-ref/ 3379 i2c2_pins_b2: i2c2-0 { 3380 pins { 3381 pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */ 3382 bias-disable; 3383 drive-open-drain; 3384 slew-rate = <0>; 3385 }; 3386 }; 3387 3388 /omit-if-no-ref/ 3389 i2c2_sleep_pins_b2: i2c2-sleep-0 { 3390 pins { 3391 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */ 3392 }; 3393 }; 3394 3395 /omit-if-no-ref/ 3396 i2c4_pins_a: i2c4-0 { 3397 pins { 3398 pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */ 3399 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */ 3400 bias-disable; 3401 drive-open-drain; 3402 slew-rate = <0>; 3403 }; 3404 }; 3405 3406 /omit-if-no-ref/ 3407 i2c4_sleep_pins_a: i2c4-sleep-0 { 3408 pins { 3409 pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */ 3410 <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */ 3411 }; 3412 }; 3413 3414 /omit-if-no-ref/ 3415 i2c6_pins_a: i2c6-0 { 3416 pins { 3417 pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */ 3418 <STM32_PINMUX('Z', 7, AF2)>; /* I2C6_SDA */ 3419 bias-disable; 3420 drive-open-drain; 3421 slew-rate = <0>; 3422 }; 3423 }; 3424 3425 /omit-if-no-ref/ 3426 i2c6_sleep_pins_a: i2c6-sleep-0 { 3427 pins { 3428 pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */ 3429 <STM32_PINMUX('Z', 7, ANALOG)>; /* I2C6_SDA */ 3430 }; 3431 }; 3432 3433 /omit-if-no-ref/ 3434 i2c6_pins_b: i2c6-1 { 3435 pins { 3436 pinmux = <STM32_PINMUX('A', 11, AF2)>, /* I2C6_SCL */ 3437 <STM32_PINMUX('A', 12, AF2)>; /* I2C6_SDA */ 3438 bias-disable; 3439 drive-open-drain; 3440 slew-rate = <0>; 3441 }; 3442 }; 3443 3444 /omit-if-no-ref/ 3445 i2c6_sleep_pins_b: i2c6-sleep-1 { 3446 pins { 3447 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C6_SCL */ 3448 <STM32_PINMUX('A', 12, ANALOG)>; /* I2C6_SDA */ 3449 }; 3450 }; 3451 3452 /omit-if-no-ref/ 3453 spi1_pins_a: spi1-0 { 3454 pins1 { 3455 pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */ 3456 <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */ 3457 bias-disable; 3458 drive-push-pull; 3459 slew-rate = <1>; 3460 }; 3461 3462 pins2 { 3463 pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */ 3464 bias-disable; 3465 }; 3466 }; 3467 3468 /omit-if-no-ref/ 3469 spi1_sleep_pins_a: spi1-sleep-0 { 3470 pins { 3471 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>, /* SPI1_SCK */ 3472 <STM32_PINMUX('Z', 1, ANALOG)>, /* SPI1_MISO */ 3473 <STM32_PINMUX('Z', 2, ANALOG)>; /* SPI1_MOSI */ 3474 }; 3475 }; 3476 3477 /omit-if-no-ref/ 3478 usart1_pins_b: usart1-1 { 3479 pins1 { 3480 pinmux = <STM32_PINMUX('Z', 7, AF7)>; /* USART1_TX */ 3481 bias-disable; 3482 drive-push-pull; 3483 slew-rate = <0>; 3484 }; 3485 pins2 { 3486 pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */ 3487 bias-disable; 3488 }; 3489 }; 3490 3491 /omit-if-no-ref/ 3492 usart1_idle_pins_b: usart1-idle-1 { 3493 pins1 { 3494 pinmux = <STM32_PINMUX('Z', 7, ANALOG)>; /* USART1_TX */ 3495 }; 3496 pins2 { 3497 pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */ 3498 bias-disable; 3499 }; 3500 }; 3501 3502 /omit-if-no-ref/ 3503 usart1_sleep_pins_b: usart1-sleep-1 { 3504 pins { 3505 pinmux = <STM32_PINMUX('Z', 7, ANALOG)>, /* USART1_TX */ 3506 <STM32_PINMUX('Z', 6, ANALOG)>; /* USART1_RX */ 3507 }; 3508 }; 3509};
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