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imx6qdl-var-som.dtsi
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linux-6.19.14/arch/arm/boot/dts/nxp/imx/imx6qdl-var-som.dtsi
1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Support for Variscite VAR-SOM-MX6 Module 4 * 5 * Copyright 2011 Linaro Ltd. 6 * Copyright 2012 Freescale Semiconductor, Inc. 7 * Copyright (C) 2014-2016 Variscite, Ltd. 8 * Author: Donio Ron <ron.d@variscite.com> 9 * Copyright 2022 Bootlin 10 */ 11 12#include <dt-bindings/clock/imx6qdl-clock.h> 13#include <dt-bindings/gpio/gpio.h> 14#include <dt-bindings/sound/fsl-imx-audmux.h> 15 16/ { 17 model = "Variscite VAR-SOM-MX6 module"; 18 compatible = "variscite,var-som-imx6q", "fsl,imx6q"; 19 20 chosen { 21 stdout-path = &uart1; 22 }; 23 24 memory@10000000 { 25 device_type = "memory"; 26 reg = <0x10000000 0x40000000>; 27 }; 28 29 reg_usb_otg_vbus: regulator-usb-otg-vbus { 30 compatible = "regulator-fixed"; 31 regulator-name = "usb_otg_vbus"; 32 regulator-min-microvolt = <5000000>; 33 regulator-max-microvolt = <5000000>; 34 }; 35 36 reg_usb_h1_vbus: regulator-usb-h1-vbud { 37 compatible = "regulator-fixed"; 38 regulator-name = "usb_h1_vbus"; 39 regulator-min-microvolt = <5000000>; 40 regulator-max-microvolt = <5000000>; 41 }; 42 43 reg_1p8v: regulator-1p8v { 44 compatible = "regulator-fixed"; 45 regulator-name = "1P8V"; 46 regulator-min-microvolt = <1800000>; 47 regulator-max-microvolt = <1800000>; 48 regulator-always-on; 49 }; 50 51 reg_3p3v: regulator-3p3v { 52 compatible = "regulator-fixed"; 53 regulator-name = "3P3V"; 54 regulator-min-microvolt = <3300000>; 55 regulator-max-microvolt = <3300000>; 56 regulator-always-on; 57 }; 58 59 reg_wl18xx_vmmc: regulator-wl18xx { 60 compatible = "regulator-fixed"; 61 regulator-name = "vwl1807"; 62 regulator-min-microvolt = <1800000>; 63 regulator-max-microvolt = <1800000>; 64 gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>; 65 enable-active-high; 66 startup-delay-us = <70000>; 67 }; 68 69 sound: sound { 70 compatible = "simple-audio-card"; 71 simple-audio-card,name = "var-som-audio"; 72 simple-audio-card,format = "i2s"; 73 simple-audio-card,bitclock-master = <&sound_codec>; 74 simple-audio-card,frame-master = <&sound_codec>; 75 simple-audio-card,widgets = "Headphone", "Headphone Jack", 76 "Line", "Line In", "Microphone", "Mic Jack"; 77 simple-audio-card,routing = "Headphone Jack", "HPLOUT", 78 "Headphone Jack", "HPROUT", 79 "LINE1L", "Line In", 80 "LINE1R", "Line In"; 81 82 sound_cpu: simple-audio-card,cpu { 83 sound-dai = <&ssi2>; 84 }; 85 86 sound_codec: simple-audio-card,codec { 87 sound-dai = <&tlv320aic3106>; 88 clocks = <&clks IMX6QDL_CLK_CKO>; 89 }; 90 }; 91 92 rfkill { 93 compatible = "rfkill-gpio"; 94 name = "rfkill"; 95 radio-type = "bluetooth"; 96 shutdown-gpios = <&gpio6 18 GPIO_ACTIVE_HIGH>; 97 }; 98}; 99 100&audmux { 101 pinctrl-names = "default"; 102 pinctrl-0 = <&pinctrl_audmux>; 103 status = "okay"; 104 105 mux-ssi2 { 106 fsl,audmux-port = <1>; 107 fsl,port-config = < 108 (IMX_AUDMUX_V2_PTCR_SYN | 109 IMX_AUDMUX_V2_PTCR_TFSDIR | 110 IMX_AUDMUX_V2_PTCR_TFSEL(2) | 111 IMX_AUDMUX_V2_PTCR_TCLKDIR | 112 IMX_AUDMUX_V2_PTCR_TCSEL(2)) 113 IMX_AUDMUX_V2_PDCR_RXDSEL(2) 114 >; 115 }; 116 117 mux-aud3 { 118 fsl,audmux-port = <2>; 119 fsl,port-config = < 120 IMX_AUDMUX_V2_PTCR_SYN 121 IMX_AUDMUX_V2_PDCR_RXDSEL(1) 122 >; 123 }; 124}; 125 126&ecspi3 { 127 pinctrl-names = "default"; 128 pinctrl-0 = <&pinctrl_ecspi3>; 129 cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; 130 status = "okay"; 131}; 132 133&fec { 134 pinctrl-names = "default"; 135 pinctrl-0 = <&pinctrl_enet>; 136 phy-mode = "rgmii"; 137 phy-handle = <&rgmii_phy>; 138 status = "okay"; 139 140 mdio { 141 #address-cells = <1>; 142 #size-cells = <0>; 143 144 rgmii_phy: ethernet-phy@7 { 145 reg = <7>; 146 reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 147 reset-assert-us = <10000>; 148 }; 149 }; 150}; 151 152&gpmi { 153 pinctrl-names = "default"; 154 pinctrl-0 = <&pinctrl_gpmi_nand>; 155 status = "okay"; 156}; 157 158&i2c2 { 159 clock-frequency = <100000>; 160 pinctrl-names = "default"; 161 pinctrl-0 = <&pinctrl_i2c2>; 162 status = "okay"; 163 164 pmic@8 { 165 compatible = "fsl,pfuze100"; 166 reg = <0x08>; 167 pinctrl-names = "default"; 168 pinctrl-0 = <&pinctrl_pmic>; 169 170 regulators { 171 sw1a_reg: sw1ab { 172 regulator-min-microvolt = <300000>; 173 regulator-max-microvolt = <1875000>; 174 regulator-boot-on; 175 regulator-always-on; 176 regulator-ramp-delay = <6250>; 177 }; 178 179 sw1c_reg: sw1c { 180 regulator-min-microvolt = <300000>; 181 regulator-max-microvolt = <1875000>; 182 regulator-boot-on; 183 regulator-always-on; 184 regulator-ramp-delay = <6250>; 185 }; 186 187 sw2_reg: sw2 { 188 regulator-min-microvolt = <800000>; 189 regulator-max-microvolt = <3300000>; 190 regulator-boot-on; 191 regulator-always-on; 192 }; 193 194 sw3a_reg: sw3a { 195 regulator-min-microvolt = <800000>; 196 regulator-max-microvolt = <3950000>; 197 regulator-boot-on; 198 regulator-always-on; 199 }; 200 201 sw3b_reg: sw3b { 202 regulator-min-microvolt = <800000>; 203 regulator-max-microvolt = <3950000>; 204 regulator-boot-on; 205 regulator-always-on; 206 }; 207 208 sw4_reg: sw4 { 209 regulator-min-microvolt = <800000>; 210 regulator-max-microvolt = <3950000>; 211 }; 212 213 snvs_reg: vsnvs { 214 regulator-min-microvolt = <1200000>; 215 regulator-max-microvolt = <3000000>; 216 regulator-boot-on; 217 regulator-always-on; 218 }; 219 220 vref_reg: vrefddr { 221 regulator-boot-on; 222 regulator-always-on; 223 }; 224 225 vgen1_reg: vgen1 { 226 regulator-min-microvolt = <800000>; 227 regulator-max-microvolt = <1550000>; 228 }; 229 230 vgen2_reg: vgen2 { 231 regulator-min-microvolt = <800000>; 232 regulator-max-microvolt = <1550000>; 233 }; 234 235 vgen3_reg: vgen3 { 236 regulator-min-microvolt = <1800000>; 237 regulator-max-microvolt = <3300000>; 238 regulator-always-on; 239 regulator-boot-on; 240 }; 241 242 vgen4_reg: vgen4 { 243 regulator-min-microvolt = <1800000>; 244 regulator-max-microvolt = <3300000>; 245 regulator-always-on; 246 regulator-boot-on; 247 }; 248 249 vgen5_reg: vgen5 { 250 regulator-min-microvolt = <1800000>; 251 regulator-max-microvolt = <3300000>; 252 regulator-always-on; 253 regulator-boot-on; 254 }; 255 256 vgen6_reg: vgen6 { 257 regulator-min-microvolt = <2800000>; 258 regulator-max-microvolt = <2800000>; 259 regulator-always-on; 260 regulator-boot-on; 261 }; 262 }; 263 }; 264 265 tlv320aic3106: audio-codec@1b { 266 compatible = "ti,tlv320aic3106"; 267 reg = <0x1b>; 268 #sound-dai-cells = <0>; 269 DRVDD-supply = <®_3p3v>; 270 AVDD-supply = <®_3p3v>; 271 IOVDD-supply = <®_3p3v>; 272 DVDD-supply = <®_1p8v>; 273 ai3x-ocmv = <0>; 274 reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; 275 ai3x-gpio-func = < 276 0 /* AIC3X_GPIO1_FUNC_DISABLED */ 277 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */ 278 >; 279 }; 280}; 281 282&iomuxc { 283 pinctrl-names = "default"; 284 pinctrl-0 = <&pinctrl_hog>; 285 286 pinctrl_audmux: audmuxgrp { 287 fsl,pins = < 288 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 289 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 290 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 291 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 292 /* Audio Clock */ 293 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 294 >; 295 }; 296 297 pinctrl_bt: btgrp { 298 fsl,pins = < 299 /* Bluetooth/wifi enable */ 300 MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b1 301 /* Wifi Slow Clock */ 302 MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x000b0 303 >; 304 }; 305 306 pinctrl_ecspi3: ecspi3grp { 307 fsl,pins = < 308 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 309 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 310 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 311 >; 312 }; 313 314 pinctrl_enet: enetgrp { 315 fsl,pins = < 316 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 317 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 318 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 319 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 320 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 321 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 322 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 323 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 324 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 325 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 326 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 327 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 328 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 329 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 330 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 331 >; 332 }; 333 334 pinctrl_enet_irq: enetirqgrp { 335 fsl,pins = < 336 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 337 >; 338 }; 339 340 pinctrl_gpmi_nand: gpminandgrp { 341 fsl,pins = < 342 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 343 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 344 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 345 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 346 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb0b1 347 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 348 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 349 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 350 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 351 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 352 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 353 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 354 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 355 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 356 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 357 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 358 >; 359 }; 360 361 pinctrl_hog: hoggrp { 362 fsl,pins = < 363 /* CTW6120 IRQ */ 364 MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0xb0b1 365 /* SDMMC2 CD/WP */ 366 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 367 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 368 >; 369 }; 370 371 pinctrl_i2c1: i2c1grp { 372 fsl,pins = < 373 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 374 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 375 >; 376 }; 377 378 pinctrl_i2c2: i2c2grp { 379 fsl,pins = < 380 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 381 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 382 >; 383 }; 384 385 pinctrl_i2c3: i2c3grp { 386 fsl,pins = < 387 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 388 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 389 >; 390 }; 391 392 pinctrl_pmic: pmicgrp { 393 fsl,pins = < 394 /* PMIC INT */ 395 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 396 >; 397 }; 398 399 pinctrl_pwm2: pwm2grp { 400 fsl,pins = < 401 MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1 402 >; 403 }; 404 405 pinctrl_uart1: uart1grp { 406 fsl,pins = < 407 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 408 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 409 >; 410 }; 411 412 pinctrl_uart2: uart2grp { 413 fsl,pins = < 414 MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1 415 MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1 416 MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1 417 MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1 418 >; 419 }; 420 421 pinctrl_usdhc3: usdhc3grp { 422 fsl,pins = < 423 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17069 424 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10069 425 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17069 426 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17069 427 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17069 428 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17069 429 /* WL_EN */ 430 MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x13059 431 /* WL_IRQ */ 432 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059 433 >; 434 }; 435 436 pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp { 437 fsl,pins = < 438 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9 439 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9 440 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9 441 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9 442 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 443 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 444 /* WL_EN */ 445 MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x130B9 446 /* WL_IRQ */ 447 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x130B9 448 >; 449 }; 450 451 pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp { 452 fsl,pins = < 453 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9 454 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9 455 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9 456 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9 457 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9 458 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9 459 /* WL_EN */ 460 MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x130F9 461 /* WL_IRQ */ 462 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x130F9 463 >; 464 }; 465}; 466 467&pwm2 { 468 pinctrl-names = "default"; 469 pinctrl-0 = <&pinctrl_pwm2>; 470 status = "okay"; 471}; 472 473®_arm { 474 vin-supply = <&sw1a_reg>; 475}; 476 477®_pu { 478 vin-supply = <&sw1c_reg>; 479}; 480 481®_soc { 482 vin-supply = <&sw1c_reg>; 483}; 484 485®_vdd1p1 { 486 vin-supply = <&vgen5_reg>; 487}; 488 489®_vdd2p5 { 490 vin-supply = <&vgen5_reg>; 491}; 492 493&snvs_poweroff { 494 status = "okay"; 495}; 496 497&ssi2 { 498 status = "okay"; 499}; 500 501&uart1 { 502 pinctrl-names = "default"; 503 pinctrl-0 = <&pinctrl_uart1>; 504 status = "okay"; 505}; 506 507&uart2 { 508 pinctrl-names = "default"; 509 pinctrl-0 = <&pinctrl_uart2 &pinctrl_bt>; 510 uart-has-rtscts; 511 status = "okay"; 512}; 513 514&usbh1 { 515 vbus-supply = <®_usb_h1_vbus>; 516 status = "okay"; 517}; 518 519&usbotg { 520 vbus-supply = <®_usb_otg_vbus>; 521 pinctrl-names = "default"; 522 pinctrl-0 = <&pinctrl_usbotg_var>; 523 disable-over-current; 524 dr_mode = "host"; 525 status = "okay"; 526}; 527 528&usbphy1 { 529 fsl,tx-d-cal = <106>; 530}; 531 532&usbphy2 { 533 fsl,tx-d-cal = <106>; 534}; 535 536&usdhc1 { 537 pinctrl-names = "default"; 538 pinctrl-0 = <&pinctrl_usdhc1>; 539 non-removable; 540 keep-power-in-suspend; 541 status = "okay"; 542}; 543 544&usdhc3 { 545 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 546 pinctrl-0 = <&pinctrl_usdhc3>; 547 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 548 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 549 bus-width = <4>; 550 vmmc-supply = <®_wl18xx_vmmc>; 551 non-removable; 552 wakeup-source; 553 keep-power-in-suspend; 554 cap-power-off-card; 555 #address-cells = <1>; 556 #size-cells = <0>; 557 status = "okay"; 558 559 wifi: wifi@2 { 560 compatible = "ti,wl1835"; 561 reg = <2>; 562 interrupt-parent = <&gpio6>; 563 interrupts = <17 IRQ_TYPE_EDGE_RISING>; 564 ref-clock-frequency = <38400000>; 565 }; 566};
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