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imx6qdl-sabrelite.dtsi
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linux-6.19.14/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi
1// SPDX-License-Identifier: GPL-2.0 OR X11 2/* 3 * Copyright 2011 Freescale Semiconductor, Inc. 4 * Copyright 2011 Linaro Ltd. 5 * 6 */ 7 8#include <dt-bindings/clock/imx6qdl-clock.h> 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/input/input.h> 11#include <dt-bindings/media/video-interfaces.h> 12 13/ { 14 chosen { 15 stdout-path = &uart2; 16 }; 17 18 aliases { 19 mmc0 = &usdhc3; 20 mmc1 = &usdhc4; 21 }; 22 23 memory@10000000 { 24 device_type = "memory"; 25 reg = <0x10000000 0x40000000>; 26 }; 27 28 reg_2p5v: regulator-2p5v { 29 compatible = "regulator-fixed"; 30 regulator-name = "2P5V"; 31 regulator-min-microvolt = <2500000>; 32 regulator-max-microvolt = <2500000>; 33 regulator-always-on; 34 }; 35 36 reg_3p3v: regulator-3p3v { 37 compatible = "regulator-fixed"; 38 regulator-name = "3P3V"; 39 regulator-min-microvolt = <3300000>; 40 regulator-max-microvolt = <3300000>; 41 regulator-always-on; 42 }; 43 44 reg_usb_otg_vbus: regulator-usb-otg-vbus { 45 compatible = "regulator-fixed"; 46 regulator-name = "usb_otg_vbus"; 47 regulator-min-microvolt = <5000000>; 48 regulator-max-microvolt = <5000000>; 49 gpio = <&gpio3 22 0>; 50 enable-active-high; 51 }; 52 53 reg_can_xcvr: regulator-can-xcvr { 54 compatible = "regulator-fixed"; 55 regulator-name = "CAN XCVR"; 56 regulator-min-microvolt = <3300000>; 57 regulator-max-microvolt = <3300000>; 58 pinctrl-names = "default"; 59 pinctrl-0 = <&pinctrl_can_xcvr>; 60 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; 61 }; 62 63 reg_1p5v: regulator-1p5v { 64 compatible = "regulator-fixed"; 65 regulator-name = "1P5V"; 66 regulator-min-microvolt = <1500000>; 67 regulator-max-microvolt = <1500000>; 68 regulator-always-on; 69 }; 70 71 reg_1p8v: regulator-1p8v { 72 compatible = "regulator-fixed"; 73 regulator-name = "1P8V"; 74 regulator-min-microvolt = <1800000>; 75 regulator-max-microvolt = <1800000>; 76 regulator-always-on; 77 }; 78 79 reg_2p8v: regulator-2p8v { 80 compatible = "regulator-fixed"; 81 regulator-name = "2P8V"; 82 regulator-min-microvolt = <2800000>; 83 regulator-max-microvolt = <2800000>; 84 regulator-always-on; 85 }; 86 87 reg_usb_h1_vbus: regulator-usb-h1-vbus { 88 compatible = "regulator-fixed"; 89 pinctrl-names = "default"; 90 pinctrl-0 = <&pinctrl_usbh1>; 91 regulator-name = "usb_h1_vbus"; 92 regulator-min-microvolt = <3300000>; 93 regulator-max-microvolt = <3300000>; 94 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; 95 enable-active-high; 96 }; 97 98 mipi_xclk: mipi_xclk { 99 compatible = "pwm-clock"; 100 #clock-cells = <0>; 101 clock-frequency = <22000000>; 102 clock-output-names = "mipi_pwm3"; 103 pwms = <&pwm3 0 45 0>; /* 1 / 45 ns = 22 MHz */ 104 status = "okay"; 105 }; 106 107 gpio-keys { 108 compatible = "gpio-keys"; 109 pinctrl-names = "default"; 110 pinctrl-0 = <&pinctrl_gpio_keys>; 111 112 key-power { 113 label = "Power Button"; 114 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; 115 linux,code = <KEY_POWER>; 116 wakeup-source; 117 }; 118 119 key-menu { 120 label = "Menu"; 121 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; 122 linux,code = <KEY_MENU>; 123 }; 124 125 key-home { 126 label = "Home"; 127 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; 128 linux,code = <KEY_HOME>; 129 }; 130 131 key-back { 132 label = "Back"; 133 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; 134 linux,code = <KEY_BACK>; 135 }; 136 137 key-volume-up { 138 label = "Volume Up"; 139 gpios = <&gpio7 13 GPIO_ACTIVE_LOW>; 140 linux,code = <KEY_VOLUMEUP>; 141 }; 142 143 key-volume-down { 144 label = "Volume Down"; 145 gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; 146 linux,code = <KEY_VOLUMEDOWN>; 147 }; 148 }; 149 150 sound { 151 compatible = "fsl,imx6q-sabrelite-sgtl5000", 152 "fsl,imx-audio-sgtl5000"; 153 model = "imx6q-sabrelite-sgtl5000"; 154 ssi-controller = <&ssi1>; 155 audio-codec = <&codec>; 156 audio-routing = 157 "MIC_IN", "Mic Jack", 158 "Mic Jack", "Mic Bias", 159 "Headphone Jack", "HP_OUT"; 160 mux-int-port = <1>; 161 mux-ext-port = <4>; 162 }; 163 164 backlight_lcd: backlight-lcd { 165 compatible = "pwm-backlight"; 166 pwms = <&pwm1 0 5000000 0>; 167 brightness-levels = <0 4 8 16 32 64 128 255>; 168 default-brightness-level = <7>; 169 power-supply = <®_3p3v>; 170 status = "okay"; 171 }; 172 173 backlight_lvds: backlight-lvds { 174 compatible = "pwm-backlight"; 175 pwms = <&pwm4 0 5000000 0>; 176 brightness-levels = <0 4 8 16 32 64 128 255>; 177 default-brightness-level = <7>; 178 power-supply = <®_3p3v>; 179 status = "okay"; 180 }; 181 182 lcd_display: disp0 { 183 compatible = "fsl,imx-parallel-display"; 184 #address-cells = <1>; 185 #size-cells = <0>; 186 interface-pix-fmt = "bgr666"; 187 pinctrl-names = "default"; 188 pinctrl-0 = <&pinctrl_j15>; 189 status = "okay"; 190 191 port@0 { 192 reg = <0>; 193 194 lcd_display_in: endpoint { 195 remote-endpoint = <&ipu1_di0_disp0>; 196 }; 197 }; 198 199 port@1 { 200 reg = <1>; 201 202 lcd_display_out: endpoint { 203 remote-endpoint = <&lcd_panel_in>; 204 }; 205 }; 206 }; 207 208 panel-lcd { 209 compatible = "okaya,rs800480t-7x0gp"; 210 backlight = <&backlight_lcd>; 211 power-supply = <®_3p3v>; 212 213 port { 214 lcd_panel_in: endpoint { 215 remote-endpoint = <&lcd_display_out>; 216 }; 217 }; 218 }; 219 220 panel-lvds0 { 221 compatible = "hannstar,hsd100pxn1"; 222 backlight = <&backlight_lvds>; 223 power-supply = <®_3p3v>; 224 225 port { 226 panel_in: endpoint { 227 remote-endpoint = <&lvds0_out>; 228 }; 229 }; 230 }; 231}; 232 233&ipu1_csi0_from_ipu1_csi0_mux { 234 bus-width = <8>; 235 data-shift = <12>; /* Lines 19:12 used */ 236 hsync-active = <1>; 237 vync-active = <1>; 238}; 239 240&ipu1_csi0_mux_from_parallel_sensor { 241 remote-endpoint = <&ov5642_to_ipu1_csi0_mux>; 242}; 243 244&ipu1_csi0 { 245 pinctrl-names = "default"; 246 pinctrl-0 = <&pinctrl_ipu1_csi0>; 247}; 248 249&audmux { 250 pinctrl-names = "default"; 251 pinctrl-0 = <&pinctrl_audmux>; 252 status = "okay"; 253}; 254 255&can1 { 256 pinctrl-names = "default"; 257 pinctrl-0 = <&pinctrl_can1>; 258 xceiver-supply = <®_can_xcvr>; 259 status = "okay"; 260}; 261 262&clks { 263 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, 264 <&clks IMX6QDL_CLK_LDB_DI1_SEL>; 265 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, 266 <&clks IMX6QDL_CLK_PLL3_USB_OTG>; 267}; 268 269&ecspi1 { 270 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; 271 pinctrl-names = "default"; 272 pinctrl-0 = <&pinctrl_ecspi1>; 273 status = "okay"; 274 275 flash: flash@0 { 276 compatible = "sst,sst25vf016b", "jedec,spi-nor"; 277 spi-max-frequency = <20000000>; 278 reg = <0>; 279 }; 280}; 281 282&fec { 283 pinctrl-names = "default"; 284 pinctrl-0 = <&pinctrl_enet>; 285 phy-mode = "rgmii"; 286 phy-handle = <ðphy>; 287 phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; 288 status = "okay"; 289 290 mdio { 291 #address-cells = <1>; 292 #size-cells = <0>; 293 294 ethphy: ethernet-phy { 295 compatible = "ethernet-phy-ieee802.3-c22"; 296 txen-skew-ps = <0>; 297 txc-skew-ps = <3000>; 298 rxdv-skew-ps = <0>; 299 rxc-skew-ps = <3000>; 300 rxd0-skew-ps = <0>; 301 rxd1-skew-ps = <0>; 302 rxd2-skew-ps = <0>; 303 rxd3-skew-ps = <0>; 304 txd0-skew-ps = <0>; 305 txd1-skew-ps = <0>; 306 txd2-skew-ps = <0>; 307 txd3-skew-ps = <0>; 308 }; 309 }; 310}; 311 312&hdmi { 313 ddc-i2c-bus = <&i2c2>; 314 status = "okay"; 315}; 316 317&i2c1 { 318 clock-frequency = <100000>; 319 pinctrl-names = "default"; 320 pinctrl-0 = <&pinctrl_i2c1>; 321 status = "okay"; 322 323 codec: sgtl5000@a { 324 compatible = "fsl,sgtl5000"; 325 reg = <0x0a>; 326 #sound-dai-cells = <0>; 327 clocks = <&clks IMX6QDL_CLK_CKO>; 328 VDDA-supply = <®_2p5v>; 329 VDDIO-supply = <®_3p3v>; 330 }; 331}; 332 333&i2c2 { 334 clock-frequency = <100000>; 335 pinctrl-names = "default"; 336 pinctrl-0 = <&pinctrl_i2c2>; 337 status = "okay"; 338 339 ov5640: camera@40 { 340 compatible = "ovti,ov5640"; 341 pinctrl-names = "default"; 342 pinctrl-0 = <&pinctrl_ov5640>; 343 reg = <0x40>; 344 clocks = <&mipi_xclk>; 345 clock-names = "xclk"; 346 DOVDD-supply = <®_1p8v>; 347 AVDD-supply = <®_2p8v>; 348 DVDD-supply = <®_1p5v>; 349 reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* NANDF_D5 */ 350 powerdown-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* NANDF_WP_B */ 351 352 port { 353 ov5640_to_mipi_csi2: endpoint { 354 remote-endpoint = <&mipi_csi2_in>; 355 clock-lanes = <0>; 356 data-lanes = <1 2>; 357 }; 358 }; 359 }; 360 361 ov5642: camera@42 { 362 compatible = "ovti,ov5642"; 363 pinctrl-names = "default"; 364 pinctrl-0 = <&pinctrl_ov5642>; 365 clocks = <&clks IMX6QDL_CLK_CKO2>; 366 reg = <0x42>; 367 reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; 368 powerdown-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; 369 gp-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; 370 status = "disabled"; 371 372 port { 373 ov5642_to_ipu1_csi0_mux: endpoint { 374 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; 375 bus-type = <MEDIA_BUS_TYPE_PARALLEL>; 376 bus-width = <8>; 377 hsync-active = <1>; 378 vsync-active = <1>; 379 }; 380 }; 381 }; 382}; 383 384&i2c3 { 385 clock-frequency = <100000>; 386 pinctrl-names = "default"; 387 pinctrl-0 = <&pinctrl_i2c3>; 388 status = "okay"; 389}; 390 391&iomuxc { 392 pinctrl-names = "default"; 393 pinctrl-0 = <&pinctrl_hog>; 394 395 pinctrl_hog: hoggrp { 396 fsl,pins = < 397 /* SGTL5000 sys_mclk */ 398 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0 399 >; 400 }; 401 402 pinctrl_audmux: audmuxgrp { 403 fsl,pins = < 404 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0 405 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0 406 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0 407 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0 408 >; 409 }; 410 411 pinctrl_can1: can1grp { 412 fsl,pins = < 413 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0 414 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0 415 >; 416 }; 417 418 pinctrl_can_xcvr: can-xcvrgrp { 419 fsl,pins = < 420 /* Flexcan XCVR enable */ 421 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 422 >; 423 }; 424 425 pinctrl_ecspi1: ecspi1grp { 426 fsl,pins = < 427 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 428 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 429 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 430 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */ 431 >; 432 }; 433 434 pinctrl_enet: enetgrp { 435 fsl,pins = < 436 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 437 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 438 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 439 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 440 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 441 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 442 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 443 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 444 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 445 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 446 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 447 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 448 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 449 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 450 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 451 /* Phy reset */ 452 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0 453 >; 454 }; 455 456 pinctrl_gpio_keys: gpio-keysgrp { 457 fsl,pins = < 458 /* Power Button */ 459 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 460 /* Menu Button */ 461 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 462 /* Home Button */ 463 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 464 /* Back Button */ 465 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 466 /* Volume Up Button */ 467 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 468 /* Volume Down Button */ 469 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 470 >; 471 }; 472 473 pinctrl_i2c1: i2c1grp { 474 fsl,pins = < 475 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 476 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 477 >; 478 }; 479 480 pinctrl_i2c2: i2c2grp { 481 fsl,pins = < 482 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 483 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 484 >; 485 }; 486 487 pinctrl_i2c3: i2c3grp { 488 fsl,pins = < 489 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 490 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 491 >; 492 }; 493 494 pinctrl_ipu1_csi0: ipu1csi0grp { 495 fsl,pins = < 496 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 497 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 498 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 499 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 500 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 501 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 502 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 503 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 504 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 505 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0 506 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0 507 MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x1b0b0 508 >; 509 }; 510 511 pinctrl_j15: j15grp { 512 fsl,pins = < 513 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 514 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 515 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 516 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 517 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 518 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 519 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 520 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 521 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 522 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 523 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 524 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 525 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 526 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 527 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 528 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 529 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 530 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 531 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 532 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 533 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 534 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 535 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 536 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 537 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 538 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 539 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 540 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 541 >; 542 }; 543 544 pinctrl_ov5640: ov5640grp { 545 fsl,pins = < 546 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000b0 547 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0 548 >; 549 }; 550 551 pinctrl_ov5642: ov5642grp { 552 fsl,pins = < 553 MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 554 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0 555 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x130b0 556 MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x000b0 557 >; 558 }; 559 560 pinctrl_pwm1: pwm1grp { 561 fsl,pins = < 562 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 563 >; 564 }; 565 566 pinctrl_pwm3: pwm3grp { 567 fsl,pins = < 568 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 569 >; 570 }; 571 572 pinctrl_pwm4: pwm4grp { 573 fsl,pins = < 574 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 575 >; 576 }; 577 578 pinctrl_uart1: uart1grp { 579 fsl,pins = < 580 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 581 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 582 >; 583 }; 584 585 pinctrl_uart2: uart2grp { 586 fsl,pins = < 587 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 588 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 589 >; 590 }; 591 592 pinctrl_usbh1: usbh1grp { 593 fsl,pins = < 594 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x030b0 595 >; 596 }; 597 598 pinctrl_usbotg: usbotggrp { 599 fsl,pins = < 600 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 601 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0 602 /* power enable, high active */ 603 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 604 >; 605 }; 606 607 pinctrl_usdhc3: usdhc3grp { 608 fsl,pins = < 609 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 610 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 611 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 612 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 613 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 614 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 615 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */ 616 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */ 617 >; 618 }; 619 620 pinctrl_usdhc4: usdhc4grp { 621 fsl,pins = < 622 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 623 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 624 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 625 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 626 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 627 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 628 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */ 629 >; 630 }; 631}; 632 633&ipu1_di0_disp0 { 634 remote-endpoint = <&lcd_display_in>; 635}; 636 637&ldb { 638 status = "okay"; 639 640 lvds-channel@0 { 641 status = "okay"; 642 643 port@4 { 644 reg = <4>; 645 646 lvds0_out: endpoint { 647 remote-endpoint = <&panel_in>; 648 }; 649 }; 650 }; 651}; 652 653&pcie { 654 status = "okay"; 655}; 656 657&pwm1 { 658 pinctrl-names = "default"; 659 pinctrl-0 = <&pinctrl_pwm1>; 660 status = "okay"; 661}; 662 663&pwm3 { 664 pinctrl-names = "default"; 665 pinctrl-0 = <&pinctrl_pwm3>; 666 status = "okay"; 667}; 668 669&pwm4 { 670 pinctrl-names = "default"; 671 pinctrl-0 = <&pinctrl_pwm4>; 672 status = "okay"; 673}; 674 675&ssi1 { 676 status = "okay"; 677}; 678 679&uart1 { 680 pinctrl-names = "default"; 681 pinctrl-0 = <&pinctrl_uart1>; 682 status = "okay"; 683}; 684 685&uart2 { 686 pinctrl-names = "default"; 687 pinctrl-0 = <&pinctrl_uart2>; 688 status = "okay"; 689}; 690 691&usbh1 { 692 vbus-supply = <®_usb_h1_vbus>; 693 status = "okay"; 694}; 695 696&usbotg { 697 vbus-supply = <®_usb_otg_vbus>; 698 pinctrl-names = "default"; 699 pinctrl-0 = <&pinctrl_usbotg>; 700 disable-over-current; 701 status = "okay"; 702}; 703 704&usdhc3 { 705 pinctrl-names = "default"; 706 pinctrl-0 = <&pinctrl_usdhc3>; 707 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; 708 wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; 709 vmmc-supply = <®_3p3v>; 710 status = "okay"; 711}; 712 713&usdhc4 { 714 pinctrl-names = "default"; 715 pinctrl-0 = <&pinctrl_usdhc4>; 716 cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; 717 vmmc-supply = <®_3p3v>; 718 status = "okay"; 719}; 720 721&mipi_csi { 722 status = "okay"; 723 724 port@0 { 725 reg = <0>; 726 727 mipi_csi2_in: endpoint { 728 remote-endpoint = <&ov5640_to_mipi_csi2>; 729 clock-lanes = <0>; 730 data-lanes = <1 2>; 731 }; 732 }; 733};
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