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imx6qdl-nitrogen6_som2.dtsi
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linux-6.19.14/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi
1// SPDX-License-Identifier: GPL-2.0 OR X11 2/* 3 * Copyright 2016 Boundary Devices, Inc. 4 */ 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/input/input.h> 7 8/ { 9 chosen { 10 stdout-path = &uart2; 11 }; 12 13 memory@10000000 { 14 device_type = "memory"; 15 reg = <0x10000000 0x40000000>; 16 }; 17 18 backlight_lcd: backlight-lcd { 19 compatible = "pwm-backlight"; 20 pwms = <&pwm1 0 5000000 0>; 21 brightness-levels = <0 4 8 16 32 64 128 255>; 22 default-brightness-level = <7>; 23 power-supply = <®_3p3v>; 24 status = "okay"; 25 }; 26 27 backlight_lvds0: backlight-lvds0 { 28 compatible = "pwm-backlight"; 29 pwms = <&pwm4 0 5000000 0>; 30 brightness-levels = <0 4 8 16 32 64 128 255>; 31 default-brightness-level = <7>; 32 power-supply = <®_3p3v>; 33 status = "okay"; 34 }; 35 36 backlight_lvds1: backlight-lvds1 { 37 compatible = "gpio-backlight"; 38 pinctrl-names = "default"; 39 pinctrl-0 = <&pinctrl_backlight_lvds1>; 40 gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>; 41 default-on; 42 status = "okay"; 43 }; 44 45 gpio-keys { 46 compatible = "gpio-keys"; 47 pinctrl-names = "default"; 48 pinctrl-0 = <&pinctrl_gpio_keys>; 49 50 key-power { 51 label = "Power Button"; 52 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; 53 linux,code = <KEY_POWER>; 54 wakeup-source; 55 }; 56 57 key-menu { 58 label = "Menu"; 59 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; 60 linux,code = <KEY_MENU>; 61 }; 62 63 key-home { 64 label = "Home"; 65 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; 66 linux,code = <KEY_HOME>; 67 }; 68 69 key-back { 70 label = "Back"; 71 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; 72 linux,code = <KEY_BACK>; 73 }; 74 75 key-volume-up { 76 label = "Volume Up"; 77 gpios = <&gpio7 13 GPIO_ACTIVE_LOW>; 78 linux,code = <KEY_VOLUMEUP>; 79 }; 80 81 key-volume-down { 82 label = "Volume Down"; 83 gpios = <&gpio7 1 GPIO_ACTIVE_LOW>; 84 linux,code = <KEY_VOLUMEDOWN>; 85 }; 86 }; 87 88 lcd_display: disp0 { 89 compatible = "fsl,imx-parallel-display"; 90 #address-cells = <1>; 91 #size-cells = <0>; 92 interface-pix-fmt = "bgr666"; 93 pinctrl-names = "default"; 94 pinctrl-0 = <&pinctrl_j15>; 95 status = "okay"; 96 97 port@0 { 98 reg = <0>; 99 100 lcd_display_in: endpoint { 101 remote-endpoint = <&ipu1_di0_disp0>; 102 }; 103 }; 104 105 port@1 { 106 reg = <1>; 107 108 lcd_display_out: endpoint { 109 remote-endpoint = <&lcd_panel_in>; 110 }; 111 }; 112 }; 113 114 panel-lcd { 115 compatible = "okaya,rs800480t-7x0gp"; 116 backlight = <&backlight_lcd>; 117 power-supply = <®_3p3v>; 118 119 port { 120 lcd_panel_in: endpoint { 121 remote-endpoint = <&lcd_display_out>; 122 }; 123 }; 124 }; 125 126 panel-lvds0 { 127 compatible = "hannstar,hsd100pxn1"; 128 backlight = <&backlight_lvds0>; 129 power-supply = <®_3p3v>; 130 131 port { 132 panel_in_lvds0: endpoint { 133 remote-endpoint = <&lvds0_out>; 134 }; 135 }; 136 }; 137 138 panel-lvds1 { 139 compatible = "hannstar,hsd100pxn1"; 140 backlight = <&backlight_lvds1>; 141 power-supply = <®_3p3v>; 142 143 port { 144 panel_in_lvds1: endpoint { 145 remote-endpoint = <&lvds1_out>; 146 }; 147 }; 148 }; 149 150 reg_1p8v: regulator-1v8 { 151 compatible = "regulator-fixed"; 152 regulator-name = "1P8V"; 153 regulator-min-microvolt = <1800000>; 154 regulator-max-microvolt = <1800000>; 155 regulator-always-on; 156 }; 157 158 reg_2p5v: regulator-2v5 { 159 compatible = "regulator-fixed"; 160 regulator-name = "2P5V"; 161 regulator-min-microvolt = <2500000>; 162 regulator-max-microvolt = <2500000>; 163 regulator-always-on; 164 }; 165 166 reg_3p3v: regulator-3v3 { 167 compatible = "regulator-fixed"; 168 regulator-name = "3P3V"; 169 regulator-min-microvolt = <3300000>; 170 regulator-max-microvolt = <3300000>; 171 regulator-always-on; 172 }; 173 174 reg_can_xcvr: regulator-can-xcvr { 175 compatible = "regulator-fixed"; 176 regulator-name = "CAN XCVR"; 177 regulator-min-microvolt = <3300000>; 178 regulator-max-microvolt = <3300000>; 179 pinctrl-names = "default"; 180 pinctrl-0 = <&pinctrl_can_xcvr>; 181 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; 182 }; 183 184 reg_usb_h1_vbus: regulator-usb-h1-vbus { 185 compatible = "regulator-fixed"; 186 pinctrl-names = "default"; 187 pinctrl-0 = <&pinctrl_usbh1>; 188 regulator-name = "usb_h1_vbus"; 189 regulator-min-microvolt = <3300000>; 190 regulator-max-microvolt = <3300000>; 191 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; 192 enable-active-high; 193 regulator-always-on; 194 }; 195 196 reg_usb_otg_vbus: regulator-usb-otg-vbus { 197 compatible = "regulator-fixed"; 198 regulator-name = "usb_otg_vbus"; 199 regulator-min-microvolt = <5000000>; 200 regulator-max-microvolt = <5000000>; 201 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 202 enable-active-high; 203 }; 204 205 reg_wlan_vmmc: regulator-wlan-vmmc { 206 compatible = "regulator-fixed"; 207 pinctrl-names = "default"; 208 pinctrl-0 = <&pinctrl_wlan_vmmc>; 209 regulator-name = "reg_wlan_vmmc"; 210 regulator-min-microvolt = <3300000>; 211 regulator-max-microvolt = <3300000>; 212 gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>; 213 startup-delay-us = <70000>; 214 enable-active-high; 215 }; 216 217 sound { 218 compatible = "fsl,imx6q-nitrogen6_som2-sgtl5000", 219 "fsl,imx-audio-sgtl5000"; 220 model = "imx6q-nitrogen6_som2-sgtl5000"; 221 ssi-controller = <&ssi1>; 222 audio-codec = <&codec>; 223 audio-routing = 224 "MIC_IN", "Mic Jack", 225 "Mic Jack", "Mic Bias", 226 "Headphone Jack", "HP_OUT"; 227 mux-int-port = <1>; 228 mux-ext-port = <3>; 229 }; 230}; 231 232&audmux { 233 pinctrl-names = "default"; 234 pinctrl-0 = <&pinctrl_audmux>; 235 status = "okay"; 236}; 237 238&can1 { 239 pinctrl-names = "default"; 240 pinctrl-0 = <&pinctrl_can1>; 241 xceiver-supply = <®_can_xcvr>; 242 status = "okay"; 243}; 244 245&clks { 246 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, 247 <&clks IMX6QDL_CLK_LDB_DI1_SEL>; 248 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, 249 <&clks IMX6QDL_CLK_PLL3_USB_OTG>; 250}; 251 252&ecspi1 { 253 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; 254 pinctrl-names = "default"; 255 pinctrl-0 = <&pinctrl_ecspi1>; 256 status = "okay"; 257 258 flash: flash@0 { 259 compatible = "microchip,sst25vf016b"; 260 spi-max-frequency = <20000000>; 261 reg = <0>; 262 }; 263}; 264 265&fec { 266 pinctrl-names = "default"; 267 pinctrl-0 = <&pinctrl_enet>; 268 phy-mode = "rgmii"; 269 /delete-property/ interrupts; 270 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 271 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 272 fsl,err006687-workaround-present; 273 status = "okay"; 274}; 275 276&hdmi { 277 ddc-i2c-bus = <&i2c2>; 278 status = "okay"; 279}; 280 281&i2c1 { 282 clock-frequency = <100000>; 283 pinctrl-names = "default"; 284 pinctrl-0 = <&pinctrl_i2c1>; 285 status = "okay"; 286 287 codec: sgtl5000@a { 288 compatible = "fsl,sgtl5000"; 289 pinctrl-names = "default"; 290 pinctrl-0 = <&pinctrl_sgtl5000>; 291 reg = <0x0a>; 292 #sound-dai-cells = <0>; 293 clocks = <&clks IMX6QDL_CLK_CKO>; 294 VDDA-supply = <®_2p5v>; 295 VDDIO-supply = <®_3p3v>; 296 }; 297 298 rtc@68 { 299 compatible = "microcrystal,rv4162"; 300 pinctrl-names = "default"; 301 pinctrl-0 = <&pinctrl_rv4162>; 302 reg = <0x68>; 303 interrupts-extended = <&gpio6 7 IRQ_TYPE_LEVEL_LOW>; 304 }; 305}; 306 307&i2c2 { 308 clock-frequency = <100000>; 309 pinctrl-names = "default"; 310 pinctrl-0 = <&pinctrl_i2c2>; 311 status = "okay"; 312}; 313 314&i2c3 { 315 clock-frequency = <100000>; 316 pinctrl-names = "default"; 317 pinctrl-0 = <&pinctrl_i2c3>; 318 status = "okay"; 319 320 touchscreen@4 { 321 compatible = "eeti,egalax_ts"; 322 reg = <0x04>; 323 interrupt-parent = <&gpio1>; 324 interrupts = <9 IRQ_TYPE_EDGE_FALLING>; 325 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; 326 }; 327 328 touchscreen@38 { 329 compatible = "edt,edt-ft5x06"; 330 reg = <0x38>; 331 interrupt-parent = <&gpio1>; 332 interrupts = <9 IRQ_TYPE_EDGE_FALLING>; 333 wakeup-source; 334 }; 335}; 336 337&iomuxc { 338 pinctrl_audmux: audmuxgrp { 339 fsl,pins = < 340 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 341 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 342 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 343 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 344 >; 345 }; 346 347 pinctrl_backlight_lvds1: backlight-lvds1grp { 348 fsl,pins = < 349 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x0b0b0 350 >; 351 }; 352 353 pinctrl_can1: can1grp { 354 fsl,pins = < 355 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0 356 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0 357 >; 358 }; 359 360 pinctrl_can_xcvr: can-xcvrgrp { 361 fsl,pins = < 362 /* Flexcan XCVR enable */ 363 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x0b0b0 364 >; 365 }; 366 367 pinctrl_ecspi1: ecspi1grp { 368 fsl,pins = < 369 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 370 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 371 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 372 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 373 >; 374 }; 375 376 pinctrl_enet: enetgrp { 377 fsl,pins = < 378 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 379 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 380 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 381 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 382 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 383 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 384 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 385 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 386 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 387 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 388 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0 389 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 390 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x130b0 391 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 392 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 393 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x030b0 394 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 395 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 396 >; 397 }; 398 399 pinctrl_gpio_keys: gpio-keysgrp { 400 fsl,pins = < 401 /* Power Button */ 402 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 403 /* Menu Button */ 404 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 405 /* Home Button */ 406 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 407 /* Back Button */ 408 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 409 /* Volume Up Button */ 410 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 411 /* Volume Down Button */ 412 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0 413 >; 414 }; 415 416 pinctrl_i2c1: i2c1grp { 417 fsl,pins = < 418 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 419 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 420 >; 421 }; 422 423 pinctrl_i2c2: i2c2grp { 424 fsl,pins = < 425 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 426 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 427 >; 428 }; 429 430 pinctrl_i2c3: i2c3grp { 431 fsl,pins = < 432 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 433 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 434 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 435 >; 436 }; 437 438 pinctrl_i2c3mux: i2c3muxgrp { 439 fsl,pins = < 440 /* PCIe I2C enable */ 441 MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x000b0 442 >; 443 }; 444 445 pinctrl_j15: j15grp { 446 fsl,pins = < 447 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 448 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 449 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 450 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 451 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 452 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 453 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 454 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 455 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 456 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 457 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 458 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 459 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 460 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 461 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 462 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 463 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 464 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 465 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 466 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 467 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 468 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 469 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 470 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 471 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 472 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 473 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 474 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 475 >; 476 }; 477 478 pinctrl_pcie: pciegrp { 479 fsl,pins = < 480 /* PCIe reset */ 481 MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x030b0 482 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x030b0 483 >; 484 }; 485 486 pinctrl_pwm1: pwm1grp { 487 fsl,pins = < 488 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x030b1 489 >; 490 }; 491 492 pinctrl_pwm3: pwm3grp { 493 fsl,pins = < 494 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x030b1 495 >; 496 }; 497 498 pinctrl_pwm4: pwm4grp { 499 fsl,pins = < 500 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x030b1 501 >; 502 }; 503 504 pinctrl_rv4162: rv4162grp { 505 fsl,pins = < 506 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0 507 >; 508 }; 509 510 pinctrl_sgtl5000: sgtl5000grp { 511 fsl,pins = < 512 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 513 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x130b0 514 MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x130b0 515 MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x130b0 516 >; 517 }; 518 519 pinctrl_uart1: uart1grp { 520 fsl,pins = < 521 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 522 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 523 >; 524 }; 525 526 pinctrl_uart2: uart2grp { 527 fsl,pins = < 528 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 529 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 530 >; 531 }; 532 533 pinctrl_uart3: uart3grp { 534 fsl,pins = < 535 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 536 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 537 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 538 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 539 >; 540 }; 541 542 pinctrl_usbh1: usbh1grp { 543 fsl,pins = < 544 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x030b0 545 >; 546 }; 547 548 pinctrl_usbotg: usbotggrp { 549 fsl,pins = < 550 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 551 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0 552 /* power enable, high active */ 553 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x030b0 554 >; 555 }; 556 557 pinctrl_usdhc2: usdhc2grp { 558 fsl,pins = < 559 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071 560 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071 561 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071 562 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071 563 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071 564 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071 565 >; 566 }; 567 568 pinctrl_usdhc3: usdhc3grp { 569 fsl,pins = < 570 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10071 571 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17071 572 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17071 573 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17071 574 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17071 575 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17071 576 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 577 >; 578 }; 579 580 pinctrl_usdhc4: usdhc4grp { 581 fsl,pins = < 582 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 583 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 584 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 585 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 586 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 587 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 588 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 589 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 590 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 591 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 592 >; 593 }; 594 595 pinctrl_wlan_vmmc: wlan-vmmcgrp { 596 fsl,pins = < 597 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x100b0 598 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x030b0 599 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x030b0 600 MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0 601 >; 602 }; 603}; 604 605&ipu1_di0_disp0 { 606 remote-endpoint = <&lcd_display_in>; 607}; 608 609&ldb { 610 status = "okay"; 611 612 lvds-channel@0 { 613 status = "okay"; 614 615 port@4 { 616 reg = <4>; 617 618 lvds0_out: endpoint { 619 remote-endpoint = <&panel_in_lvds0>; 620 }; 621 }; 622 }; 623 624 lvds-channel@1 { 625 fsl,data-mapping = "spwg"; 626 fsl,data-width = <18>; 627 status = "okay"; 628 629 port@4 { 630 reg = <4>; 631 632 lvds1_out: endpoint { 633 remote-endpoint = <&panel_in_lvds1>; 634 }; 635 }; 636 }; 637}; 638 639&pcie { 640 pinctrl-names = "default"; 641 pinctrl-0 = <&pinctrl_pcie>; 642 reset-gpio = <&gpio3 0 GPIO_ACTIVE_LOW>; 643 status = "okay"; 644}; 645 646&pwm1 { 647 pinctrl-names = "default"; 648 pinctrl-0 = <&pinctrl_pwm1>; 649 status = "okay"; 650}; 651 652&pwm3 { 653 pinctrl-names = "default"; 654 pinctrl-0 = <&pinctrl_pwm3>; 655 status = "okay"; 656}; 657 658&pwm4 { 659 pinctrl-names = "default"; 660 pinctrl-0 = <&pinctrl_pwm4>; 661 status = "okay"; 662}; 663 664&ssi1 { 665 status = "okay"; 666}; 667 668&uart1 { 669 pinctrl-names = "default"; 670 pinctrl-0 = <&pinctrl_uart1>; 671 status = "okay"; 672}; 673 674&uart2 { 675 pinctrl-names = "default"; 676 pinctrl-0 = <&pinctrl_uart2>; 677 status = "okay"; 678}; 679 680&uart3 { 681 pinctrl-names = "default"; 682 pinctrl-0 = <&pinctrl_uart3>; 683 uart-has-rtscts; 684 status = "okay"; 685}; 686 687&usbh1 { 688 vbus-supply = <®_usb_h1_vbus>; 689 status = "okay"; 690}; 691 692&usbotg { 693 vbus-supply = <®_usb_otg_vbus>; 694 pinctrl-names = "default"; 695 pinctrl-0 = <&pinctrl_usbotg>; 696 disable-over-current; 697 status = "okay"; 698}; 699 700&usdhc2 { 701 pinctrl-names = "default"; 702 pinctrl-0 = <&pinctrl_usdhc2>; 703 bus-width = <4>; 704 non-removable; 705 vmmc-supply = <®_wlan_vmmc>; 706 cap-power-off-card; 707 keep-power-in-suspend; 708 status = "okay"; 709 710 #address-cells = <1>; 711 #size-cells = <0>; 712 wlcore: wlcore@2 { 713 compatible = "ti,wl1271"; 714 reg = <2>; 715 interrupt-parent = <&gpio6>; 716 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; 717 ref-clock-frequency = <38400000>; 718 }; 719}; 720 721&usdhc3 { 722 pinctrl-names = "default"; 723 pinctrl-0 = <&pinctrl_usdhc3>; 724 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; 725 bus-width = <4>; 726 vmmc-supply = <®_3p3v>; 727 status = "okay"; 728}; 729 730&usdhc4 { 731 pinctrl-names = "default"; 732 pinctrl-0 = <&pinctrl_usdhc4>; 733 bus-width = <8>; 734 non-removable; 735 vmmc-supply = <®_1p8v>; 736 keep-power-in-suspend; 737 status = "okay"; 738};
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