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imx6dl-yapp4-common.dtsi
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linux-6.19.14/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi
1// SPDX-License-Identifier: GPL-2.0 2// 3// Copyright (C) 2015-2018 Y Soft Corporation, a.s. 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/interrupt-controller/irq.h> 7#include <dt-bindings/input/input.h> 8#include <dt-bindings/leds/common.h> 9#include <dt-bindings/pwm/pwm.h> 10 11/ { 12 aliases: aliases { 13 ethernet1 = ð1; 14 ethernet2 = ð2; 15 mmc0 = &usdhc3; 16 mmc1 = &usdhc4; 17 }; 18 19 backlight: backlight { 20 compatible = "pwm-backlight"; 21 pwms = <&pwm1 0 500000 PWM_POLARITY_INVERTED>; 22 brightness-levels = <0 32 64 128 255>; 23 default-brightness-level = <32>; 24 num-interpolated-steps = <8>; 25 power-supply = <&sw2_reg>; 26 status = "disabled"; 27 }; 28 29 lcd_display: display { 30 compatible = "fsl,imx-parallel-display"; 31 #address-cells = <1>; 32 #size-cells = <0>; 33 interface-pix-fmt = "rgb24"; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&pinctrl_ipu1>; 36 status = "disabled"; 37 38 port@0 { 39 reg = <0>; 40 41 lcd_display_in: endpoint { 42 remote-endpoint = <&ipu1_di0_disp0>; 43 }; 44 }; 45 46 port@1 { 47 reg = <1>; 48 49 lcd_display_out: endpoint { 50 remote-endpoint = <&lcd_panel_in>; 51 }; 52 }; 53 }; 54 55 panel: panel { 56 compatible = "dataimage,scf0700c48ggu18"; 57 power-supply = <&sw2_reg>; 58 backlight = <&backlight>; 59 status = "disabled"; 60 61 port { 62 lcd_panel_in: endpoint { 63 remote-endpoint = <&lcd_display_out>; 64 }; 65 }; 66 }; 67 68 reg_pcie: regulator-pcie { 69 compatible = "regulator-fixed"; 70 pinctrl-names = "default"; 71 pinctrl-0 = <&pinctrl_pcie_reg>; 72 regulator-name = "MPCIE_3V3"; 73 regulator-min-microvolt = <3300000>; 74 regulator-max-microvolt = <3300000>; 75 gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; 76 enable-active-high; 77 status = "disabled"; 78 }; 79 80 reg_usb_h1_vbus: regulator-usb-h1-vbus { 81 compatible = "regulator-fixed"; 82 pinctrl-names = "default"; 83 pinctrl-0 = <&pinctrl_usbh1_vbus>; 84 regulator-name = "usb_h1_vbus"; 85 regulator-min-microvolt = <5000000>; 86 regulator-max-microvolt = <5000000>; 87 gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>; 88 enable-active-high; 89 status = "disabled"; 90 }; 91 92 reg_usb_otg_vbus: regulator-usb-otg-vbus { 93 compatible = "regulator-fixed"; 94 pinctrl-names = "default"; 95 pinctrl-0 = <&pinctrl_usbotg_vbus>; 96 regulator-name = "usb_otg_vbus"; 97 regulator-min-microvolt = <5000000>; 98 regulator-max-microvolt = <5000000>; 99 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 100 enable-active-high; 101 }; 102}; 103 104&fec { 105 pinctrl-names = "default"; 106 pinctrl-0 = <&pinctrl_enet>; 107 phy-mode = "rgmii-id"; 108 phy-supply = <&sw2_reg>; 109 status = "okay"; 110 111 fixed-link { 112 speed = <1000>; 113 full-duplex; 114 }; 115 116 mdio { 117 #address-cells = <1>; 118 #size-cells = <0>; 119 120 switch@10 { 121 compatible = "qca,qca8334"; 122 reg = <0x10>; 123 reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 124 125 switch_ports: ports { 126 #address-cells = <1>; 127 #size-cells = <0>; 128 129 ethphy0: port@0 { 130 reg = <0>; 131 label = "cpu"; 132 phy-mode = "rgmii-id"; 133 ethernet = <&fec>; 134 135 fixed-link { 136 speed = <1000>; 137 full-duplex; 138 }; 139 }; 140 141 eth2: port@2 { 142 reg = <2>; 143 label = "eth2"; 144 phy-mode = "internal"; 145 phy-handle = <&phy_port2>; 146 }; 147 148 eth1: port@3 { 149 reg = <3>; 150 label = "eth1"; 151 phy-mode = "internal"; 152 phy-handle = <&phy_port3>; 153 }; 154 }; 155 156 mdio { 157 #address-cells = <1>; 158 #size-cells = <0>; 159 160 phy_port2: ethernet-phy@1 { 161 reg = <1>; 162 }; 163 164 phy_port3: ethernet-phy@2 { 165 reg = <2>; 166 }; 167 }; 168 }; 169 }; 170}; 171 172&hdmi { 173 pinctrl-names = "default"; 174 pinctrl-0 = <&pinctrl_hdmi_cec>; 175 ddc-i2c-bus = <&i2c2>; 176 status = "disabled"; 177}; 178 179&i2c2 { 180 clock-frequency = <100000>; 181 pinctrl-names = "default"; 182 pinctrl-0 = <&pinctrl_i2c2>; 183 status = "okay"; 184 185 pmic@8 { 186 compatible = "fsl,pfuze200"; 187 pinctrl-names = "default"; 188 pinctrl-0 = <&pinctrl_pmic>; 189 reg = <0x8>; 190 191 regulators { 192 sw1a_reg: sw1ab { 193 regulator-min-microvolt = <300000>; 194 regulator-max-microvolt = <1875000>; 195 regulator-boot-on; 196 regulator-always-on; 197 regulator-ramp-delay = <6250>; 198 }; 199 200 sw2_reg: sw2 { 201 regulator-min-microvolt = <800000>; 202 regulator-max-microvolt = <3300000>; 203 regulator-boot-on; 204 regulator-always-on; 205 }; 206 207 sw3a_reg: sw3a { 208 regulator-min-microvolt = <400000>; 209 regulator-max-microvolt = <1975000>; 210 regulator-boot-on; 211 regulator-always-on; 212 }; 213 214 sw3b_reg: sw3b { 215 regulator-min-microvolt = <400000>; 216 regulator-max-microvolt = <1975000>; 217 regulator-boot-on; 218 regulator-always-on; 219 }; 220 221 swbst_reg: swbst { 222 regulator-min-microvolt = <5000000>; 223 regulator-max-microvolt = <5150000>; 224 }; 225 226 vgen1_reg: vgen1 { 227 regulator-min-microvolt = <800000>; 228 regulator-max-microvolt = <1550000>; 229 }; 230 231 vgen2_reg: vgen2 { 232 regulator-min-microvolt = <800000>; 233 regulator-max-microvolt = <1550000>; 234 }; 235 236 vgen3_reg: vgen3 { 237 regulator-min-microvolt = <1800000>; 238 regulator-max-microvolt = <3300000>; 239 regulator-always-on; 240 }; 241 242 vgen4_reg: vgen4 { 243 regulator-min-microvolt = <1800000>; 244 regulator-max-microvolt = <3300000>; 245 regulator-always-on; 246 }; 247 248 vgen5_reg: vgen5 { 249 regulator-min-microvolt = <1800000>; 250 regulator-max-microvolt = <3300000>; 251 regulator-always-on; 252 }; 253 254 vgen6_reg: vgen6 { 255 regulator-min-microvolt = <1800000>; 256 regulator-max-microvolt = <3300000>; 257 regulator-always-on; 258 }; 259 260 vref_reg: vrefddr { 261 regulator-boot-on; 262 regulator-always-on; 263 }; 264 265 vsnvs_reg: vsnvs { 266 regulator-min-microvolt = <1000000>; 267 regulator-max-microvolt = <3000000>; 268 regulator-boot-on; 269 regulator-always-on; 270 }; 271 }; 272 }; 273 274 leds: led-controller@30 { 275 compatible = "ti,lp5562"; 276 reg = <0x30>; 277 clock-mode = /bits/ 8 <1>; 278 #address-cells = <1>; 279 #size-cells = <0>; 280 status = "disabled"; 281 282 multi-led@0 { 283 #address-cells = <1>; 284 #size-cells = <0>; 285 color = <LED_COLOR_ID_RGB>; 286 function = LED_FUNCTION_INDICATOR; 287 288 led@0 { 289 led-cur = /bits/ 8 <0x20>; 290 max-cur = /bits/ 8 <0x60>; 291 reg = <0>; 292 color = <LED_COLOR_ID_RED>; 293 }; 294 295 led@1 { 296 led-cur = /bits/ 8 <0x20>; 297 max-cur = /bits/ 8 <0x60>; 298 reg = <1>; 299 color = <LED_COLOR_ID_GREEN>; 300 }; 301 302 led@2 { 303 led-cur = /bits/ 8 <0x20>; 304 max-cur = /bits/ 8 <0x60>; 305 reg = <2>; 306 color = <LED_COLOR_ID_BLUE>; 307 }; 308 }; 309 }; 310 311 eeprom@57 { 312 compatible = "atmel,24c128"; 313 reg = <0x57>; 314 pagesize = <64>; 315 }; 316 317 touchscreen: touchscreen@5c { 318 compatible = "pixcir,pixcir_tangoc"; 319 reg = <0x5c>; 320 pinctrl-0 = <&pinctrl_touch>; 321 interrupt-parent = <&gpio4>; 322 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; 323 attb-gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>; 324 reset-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 325 touchscreen-size-x = <800>; 326 touchscreen-size-y = <480>; 327 status = "disabled"; 328 }; 329}; 330 331&i2c3 { 332 clock-frequency = <100000>; 333 pinctrl-names = "default"; 334 pinctrl-0 = <&pinctrl_i2c3>; 335 status = "okay"; 336 337 oled_1309: oled@3c { 338 compatible = "solomon,ssd1309fb-i2c"; 339 reg = <0x3c>; 340 solomon,height = <64>; 341 solomon,width = <128>; 342 solomon,page-offset = <0>; 343 solomon,segment-no-remap; 344 solomon,prechargep2 = <15>; 345 reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>; 346 vbat-supply = <&sw2_reg>; 347 status = "disabled"; 348 }; 349 350 oled_1305: oled@3d { 351 compatible = "solomon,ssd1305fb-i2c"; 352 reg = <0x3d>; 353 solomon,height = <64>; 354 solomon,width = <128>; 355 solomon,page-offset = <0>; 356 solomon,col-offset = <4>; 357 solomon,prechargep2 = <15>; 358 reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>; 359 vbat-supply = <&sw2_reg>; 360 status = "disabled"; 361 }; 362 363 gpio_oled: gpio@41 { 364 compatible = "nxp,pca9536"; 365 gpio-controller; 366 #gpio-cells = <2>; 367 reg = <0x41>; 368 vcc-supply = <&sw2_reg>; 369 status = "disabled"; 370 }; 371 372 touchkeys: keys@5a { 373 compatible = "fsl,mpr121-touchkey"; 374 reg = <0x5a>; 375 vdd-supply = <&sw2_reg>; 376 autorepeat; 377 linux,keycodes = <KEY_1>, <KEY_2>, <KEY_3>, <KEY_4>, <KEY_5>, 378 <KEY_6>, <KEY_7>, <KEY_8>, <KEY_9>, 379 <KEY_BACKSPACE>, <KEY_0>, <KEY_ENTER>; 380 poll-interval = <50>; 381 status = "disabled"; 382 }; 383}; 384 385&iomuxc { 386 pinctrl_enet: enetgrp { 387 fsl,pins = < 388 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b020 389 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b020 390 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b020 391 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b020 392 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b020 393 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b020 394 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b020 395 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b020 396 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b020 397 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b020 398 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b020 399 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b020 400 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b020 401 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b020 402 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b010 403 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b010 404 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b098 405 >; 406 }; 407 408 pinctrl_hdmi_cec: hdmicecgrp { 409 fsl,pins = < 410 MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1b898 411 >; 412 }; 413 414 pinctrl_i2c2: i2c2grp { 415 fsl,pins = < 416 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b899 417 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b899 418 >; 419 }; 420 421 pinctrl_i2c3: i2c3grp { 422 fsl,pins = < 423 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b899 424 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b899 425 >; 426 }; 427 428 pinctrl_ipu1: ipu1grp { 429 fsl,pins = < 430 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 431 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 432 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 433 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 434 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 435 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 436 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 437 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 438 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 439 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 440 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 441 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 442 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 443 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 444 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 445 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 446 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 447 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 448 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 449 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 450 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 451 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 452 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 453 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 454 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 455 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 456 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 457 >; 458 }; 459 460 pinctrl_pcie: pciegrp { 461 fsl,pins = < 462 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b098 463 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b098 464 MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b098 465 >; 466 }; 467 468 pinctrl_pcie_reg: pciereggrp { 469 fsl,pins = < 470 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b098 471 >; 472 }; 473 474 pinctrl_pmic: pmicgrp { 475 fsl,pins = < 476 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b098 477 >; 478 }; 479 480 pinctrl_pwm1: pwm1grp { 481 fsl,pins = < 482 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8 483 >; 484 }; 485 486 pinctrl_touch: touchgrp { 487 fsl,pins = < 488 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b098 489 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b098 490 >; 491 }; 492 493 pinctrl_uart1: uart1grp { 494 fsl,pins = < 495 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0a8 496 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0a8 497 >; 498 }; 499 500 pinctrl_uart2: uart2grp { 501 fsl,pins = < 502 MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b098 503 MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b098 504 >; 505 }; 506 507 pinctrl_usbh1: usbh1grp { 508 fsl,pins = < 509 MX6QDL_PAD_EIM_D30__USB_H1_OC 0x1b098 510 >; 511 }; 512 513 pinctrl_usbh1_vbus: usbh1-vbusgrp { 514 fsl,pins = < 515 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x98 516 >; 517 }; 518 519 pinctrl_usbotg: usbotggrp { 520 fsl,pins = < 521 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1b098 522 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b098 523 >; 524 }; 525 526 pinctrl_usbotg_vbus: usbotg-vbusgrp { 527 fsl,pins = < 528 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x98 529 >; 530 }; 531 532 pinctrl_usdhc3: usdhc3grp { 533 fsl,pins = < 534 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b018 535 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b018 536 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 537 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 538 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 539 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 540 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 541 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 542 >; 543 }; 544 545 pinctrl_usdhc4: usdhc4grp { 546 fsl,pins = < 547 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x1f069 548 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10069 549 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17069 550 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17069 551 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17069 552 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17069 553 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17069 554 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17069 555 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17069 556 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17069 557 >; 558 }; 559 560 pinctrl_wdog: wdoggrp { 561 fsl,pins = < 562 MX6QDL_PAD_GPIO_1__WDOG2_B 0x1b0b0 563 >; 564 }; 565}; 566 567&ipu1_di0_disp0 { 568 remote-endpoint = <&lcd_display_in>; 569}; 570 571&pcie { 572 pinctrl-names = "default"; 573 pinctrl-0 = <&pinctrl_pcie>; 574 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; 575 vpcie-supply = <®_pcie>; 576 status = "disabled"; 577}; 578 579&pwm1 { 580 pinctrl-names = "default"; 581 pinctrl-0 = <&pinctrl_pwm1>; 582 status = "disabled"; 583}; 584 585&uart1 { 586 pinctrl-names = "default"; 587 pinctrl-0 = <&pinctrl_uart1>; 588 status = "okay"; 589}; 590 591&uart2 { 592 pinctrl-names = "default"; 593 pinctrl-0 = <&pinctrl_uart2>; 594 status = "okay"; 595}; 596 597&usbh1 { 598 pinctrl-names = "default"; 599 pinctrl-0 = <&pinctrl_usbh1>; 600 vbus-supply = <®_usb_h1_vbus>; 601 over-current-active-low; 602 status = "disabled"; 603}; 604 605&usbotg { 606 pinctrl-names = "default"; 607 pinctrl-0 = <&pinctrl_usbotg>; 608 vbus-supply = <®_usb_otg_vbus>; 609 over-current-active-low; 610 srp-disable; 611 hnp-disable; 612 adp-disable; 613 status = "okay"; 614}; 615 616&usbphy1 { 617 fsl,tx-d-cal = <106>; 618 status = "okay"; 619}; 620 621&usbphy2 { 622 fsl,tx-d-cal = <109>; 623 status = "disabled"; 624}; 625 626&usdhc3 { 627 pinctrl-names = "default"; 628 pinctrl-0 = <&pinctrl_usdhc3>; 629 bus-width = <4>; 630 cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>; 631 wp-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; 632 no-1-8-v; 633 keep-power-in-suspend; 634 wakeup-source; 635 vmmc-supply = <&sw2_reg>; 636 status = "disabled"; 637}; 638 639&usdhc4 { 640 pinctrl-names = "default"; 641 pinctrl-0 = <&pinctrl_usdhc4>; 642 bus-width = <8>; 643 non-removable; 644 no-1-8-v; 645 keep-power-in-suspend; 646 vmmc-supply = <&sw2_reg>; 647 status = "okay"; 648}; 649 650&wdog1 { 651 status = "disabled"; 652}; 653 654&wdog2 { 655 pinctrl-names = "default"; 656 pinctrl-0 = <&pinctrl_wdog>; 657 fsl,ext-reset-output; 658 status = "okay"; 659};
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