imx53-tqma53.dtsi

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
  4 * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
  5 */
  6
  7#include "imx53.dtsi"
  8
  9/ {
 10	model = "TQ TQMa53";
 11	compatible = "tq,tqma53", "fsl,imx53";
 12
 13	memory@70000000 {
 14		device_type = "memory";
 15		reg = <0x70000000 0x40000000>; /* Up to 1GiB */
 16	};
 17
 18	reg_3p3v: regulator-3p3v {
 19		compatible = "regulator-fixed";
 20		regulator-name = "3P3V";
 21		regulator-min-microvolt = <3300000>;
 22		regulator-max-microvolt = <3300000>;
 23		regulator-always-on;
 24	};
 25};
 26
 27&esdhc2 {
 28	pinctrl-names = "default";
 29	pinctrl-0 = <&pinctrl_esdhc2>,
 30		    <&pinctrl_esdhc2_cdwp>;
 31	vmmc-supply = <&reg_3p3v>;
 32	wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 33	cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
 34	status = "disabled";
 35};
 36
 37&uart3 {
 38	pinctrl-names = "default";
 39	pinctrl-0 = <&pinctrl_uart3>;
 40	status = "disabled";
 41};
 42
 43&ecspi1 {
 44	pinctrl-names = "default";
 45	pinctrl-0 = <&pinctrl_ecspi1>;
 46	cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio3 19 GPIO_ACTIVE_LOW>,
 47		   <&gpio3 24 GPIO_ACTIVE_LOW>, <&gpio3 25 GPIO_ACTIVE_LOW>;
 48	status = "disabled";
 49};
 50
 51&esdhc3 { /* EMMC */
 52	pinctrl-names = "default";
 53	pinctrl-0 = <&pinctrl_esdhc3>;
 54	vmmc-supply = <&reg_3p3v>;
 55	non-removable;
 56	bus-width = <8>;
 57	status = "okay";
 58};
 59
 60&iomuxc {
 61	pinctrl-names = "default";
 62	pinctrl-0 = <&pinctrl_hog>;
 63
 64	pinctrl_hog: hoggrp {
 65		fsl,pins = <
 66			 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 /* SSI_MCLK */
 67			 MX53_PAD_PATA_DA_1__GPIO7_7     0x80000000 /* LCD_BLT_EN */
 68			 MX53_PAD_PATA_DA_2__GPIO7_8     0x80000000 /* LCD_RESET */
 69			 MX53_PAD_PATA_DATA5__GPIO2_5    0x80000000 /* LCD_POWER */
 70			 MX53_PAD_PATA_DATA6__GPIO2_6    0x80000000 /* PMIC_INT */
 71			 MX53_PAD_PATA_DATA14__GPIO2_14  0x80000000 /* CSI_RST */
 72			 MX53_PAD_PATA_DATA15__GPIO2_15  0x80000000 /* CSI_PWDN */
 73			 MX53_PAD_GPIO_19__GPIO4_5 	 0x80000000 /* #SYSTEM_DOWN */
 74			 MX53_PAD_GPIO_3__GPIO1_3        0x80000000
 75			 MX53_PAD_PATA_DA_0__GPIO7_6	 0x80000000 /* #PHY_RESET */
 76			 MX53_PAD_GPIO_1__PWM2_PWMO	 0x80000000 /* LCD_CONTRAST */
 77		>;
 78	};
 79
 80	pinctrl_audmux: audmuxgrp {
 81		fsl,pins = <
 82			MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC	0x80000000
 83			MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	0x80000000
 84			MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	0x80000000
 85			MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	0x80000000
 86		>;
 87	};
 88
 89	pinctrl_can1: can1grp {
 90		fsl,pins = <
 91			MX53_PAD_KEY_COL2__CAN1_TXCAN		0x80000000
 92			MX53_PAD_KEY_ROW2__CAN1_RXCAN		0x80000000
 93		>;
 94	};
 95
 96	pinctrl_can2: can2grp {
 97		fsl,pins = <
 98			MX53_PAD_KEY_COL4__CAN2_TXCAN		0x80000000
 99			MX53_PAD_KEY_ROW4__CAN2_RXCAN		0x80000000
100		>;
101	};
102
103	pinctrl_cspi: cspigrp {
104		fsl,pins = <
105			MX53_PAD_SD1_DATA0__CSPI_MISO		0x1d5
106			MX53_PAD_SD1_CMD__CSPI_MOSI		0x1d5
107			MX53_PAD_SD1_CLK__CSPI_SCLK		0x1d5
108		>;
109	};
110
111	pinctrl_ecspi1: ecspi1grp {
112		fsl,pins = <
113			MX53_PAD_EIM_D16__ECSPI1_SCLK		0x80000000
114			MX53_PAD_EIM_D17__ECSPI1_MISO		0x80000000
115			MX53_PAD_EIM_D18__ECSPI1_MOSI		0x80000000
116		>;
117	};
118
119	pinctrl_esdhc2: esdhc2grp {
120		fsl,pins = <
121			MX53_PAD_SD2_CMD__ESDHC2_CMD		0x1d5
122			MX53_PAD_SD2_CLK__ESDHC2_CLK		0x1d5
123			MX53_PAD_SD2_DATA0__ESDHC2_DAT0		0x1d5
124			MX53_PAD_SD2_DATA1__ESDHC2_DAT1		0x1d5
125			MX53_PAD_SD2_DATA2__ESDHC2_DAT2		0x1d5
126			MX53_PAD_SD2_DATA3__ESDHC2_DAT3		0x1d5
127		>;
128	};
129
130	pinctrl_esdhc2_cdwp: esdhc2cdwpgrp {
131		fsl,pins = <
132			MX53_PAD_GPIO_4__GPIO1_4	0x80000000 /* SD2_CD */
133			MX53_PAD_GPIO_2__GPIO1_2	0x80000000 /* SD2_WP */
134		>;
135	};
136
137	pinctrl_esdhc3: esdhc3grp {
138		fsl,pins = <
139			MX53_PAD_PATA_DATA8__ESDHC3_DAT0	0x1d5
140			MX53_PAD_PATA_DATA9__ESDHC3_DAT1	0x1d5
141			MX53_PAD_PATA_DATA10__ESDHC3_DAT2	0x1d5
142			MX53_PAD_PATA_DATA11__ESDHC3_DAT3	0x1d5
143			MX53_PAD_PATA_DATA0__ESDHC3_DAT4	0x1d5
144			MX53_PAD_PATA_DATA1__ESDHC3_DAT5	0x1d5
145			MX53_PAD_PATA_DATA2__ESDHC3_DAT6	0x1d5
146			MX53_PAD_PATA_DATA3__ESDHC3_DAT7	0x1d5
147			MX53_PAD_PATA_RESET_B__ESDHC3_CMD	0x1d5
148			MX53_PAD_PATA_IORDY__ESDHC3_CLK		0x1d5
149		>;
150	};
151
152	pinctrl_fec: fecgrp {
153		fsl,pins = <
154			MX53_PAD_FEC_MDC__FEC_MDC		0x80000000
155			MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000
156			MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000
157			MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000
158			MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000
159			MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000
160			MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000
161			MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000
162			MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000
163			MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000
164		>;
165	};
166
167	pinctrl_i2c2: i2c2grp {
168		fsl,pins = <
169			MX53_PAD_KEY_ROW3__I2C2_SDA		0xc0000000
170			MX53_PAD_KEY_COL3__I2C2_SCL		0xc0000000
171		>;
172	};
173
174	pinctrl_i2c3: i2c3grp {
175		fsl,pins = <
176			MX53_PAD_GPIO_6__I2C3_SDA		0xc0000000
177			MX53_PAD_GPIO_5__I2C3_SCL		0xc0000000
178		>;
179	};
180
181	pinctrl_uart1: uart1grp {
182		fsl,pins = <
183			MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4
184			MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4
185		>;
186	};
187
188	pinctrl_uart2: uart2grp {
189		fsl,pins = <
190			MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1e4
191			MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1e4
192		>;
193	};
194
195	pinctrl_uart3: uart3grp {
196		fsl,pins = <
197			MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4
198			MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4
199		>;
200	};
201};
202
203&uart1 {
204	pinctrl-names = "default";
205	pinctrl-0 = <&pinctrl_uart1>;
206	uart-has-rtscts;
207	status = "disabled";
208};
209
210&uart2 {
211	pinctrl-names = "default";
212	pinctrl-0 = <&pinctrl_uart2>;
213	status = "disabled";
214};
215
216&can1 {
217	pinctrl-names = "default";
218	pinctrl-0 = <&pinctrl_can1>;
219	status = "disabled";
220};
221
222&can2 {
223	pinctrl-names = "default";
224	pinctrl-0 = <&pinctrl_can2>;
225	status = "disabled";
226};
227
228&i2c3 {
229	pinctrl-names = "default";
230	pinctrl-0 = <&pinctrl_i2c3>;
231	status = "disabled";
232};
233
234&cspi {
235	pinctrl-names = "default";
236	pinctrl-0 = <&pinctrl_cspi>;
237	cs-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>, <&gpio1 19 GPIO_ACTIVE_LOW>,
238		   <&gpio1 21 GPIO_ACTIVE_LOW>;
239	status = "disabled";
240};
241
242&i2c2 {
243	pinctrl-names = "default";
244	pinctrl-0 = <&pinctrl_i2c2>;
245	status = "okay";
246
247	pmic: mc34708@8 {
248		compatible = "fsl,mc34708";
249		reg = <0x8>;
250		fsl,mc13xxx-uses-rtc;
251		interrupt-parent = <&gpio2>;
252		interrupts = <6 4>; /* PATA_DATA6, active high */
253	};
254
255	sensor1: temperature-sensor@48 {
256		compatible = "national,lm75b";
257		reg = <0x48>;
258	};
259
260	eeprom: eeprom@50 {
261		compatible = "atmel,24c64";
262		pagesize = <32>;
263		reg = <0x50>;
264	};
265};
266
267&fec {
268	pinctrl-names = "default";
269	pinctrl-0 = <&pinctrl_fec>;
270	phy-mode = "rmii";
271	status = "disabled";
272};