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tegra20-asus-transformer-common.dtsi

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linux-6.19.14/arch/arm/boot/dts/nvidia/tegra20-asus-transformer-common.dtsi DEVICETREE 
   1// SPDX-License-Identifier: GPL-2.0
   2
   3#include <dt-bindings/input/atmel-maxtouch.h>
   4#include <dt-bindings/input/gpio-keys.h>
   5#include <dt-bindings/input/input.h>
   6#include <dt-bindings/thermal/thermal.h>
   7
   8#include "tegra20.dtsi"
   9#include "tegra20-cpu-opp.dtsi"
  10#include "tegra20-cpu-opp-microvolt.dtsi"
  11
  12/ {
  13	chassis-type = "convertible";
  14
  15	aliases {
  16		mmc0 = &sdmmc4; /* eMMC */
  17		mmc1 = &sdmmc3; /* MicroSD */
  18		mmc2 = &sdmmc1; /* WiFi */
  19
  20		rtc0 = &pmic;
  21		rtc1 = "/rtc@7000e000";
  22
  23		serial0 = &uartd;
  24		serial1 = &uartc; /* Bluetooth */
  25		serial2 = &uartb; /* GPS */
  26	};
  27
  28	/*
  29	 * The decompressor and also some bootloaders rely on a
  30	 * pre-existing /chosen node to be available to insert the
  31	 * command line and merge other ATAGS info.
  32	 */
  33	chosen {};
  34
  35	memory@0 {
  36		reg = <0x00000000 0x40000000>;
  37	};
  38
  39	reserved-memory {
  40		#address-cells = <1>;
  41		#size-cells = <1>;
  42		ranges;
  43
  44		ramoops@2ffe0000 {
  45			compatible = "ramoops";
  46			reg = <0x2ffe0000 0x10000>;	/* 64kB */
  47			console-size = <0x8000>;	/* 32kB */
  48			record-size = <0x400>;		/*  1kB */
  49			ecc-size = <16>;
  50		};
  51
  52		linux,cma@30000000 {
  53			compatible = "shared-dma-pool";
  54			alloc-ranges = <0x30000000 0x10000000>;
  55			size = <0x10000000>; /* 256MiB */
  56			linux,cma-default;
  57			reusable;
  58		};
  59	};
  60
  61	host1x@50000000 {
  62		dc@54200000 {
  63			rgb {
  64				status = "okay";
  65
  66				port {
  67					lcd_output: endpoint {
  68						remote-endpoint = <&lvds_encoder_input>;
  69						bus-width = <18>;
  70					};
  71				};
  72			};
  73		};
  74
  75		hdmi@54280000 {
  76			status = "okay";
  77
  78			vdd-supply = <&hdmi_vdd_reg>;
  79			pll-supply = <&hdmi_pll_reg>;
  80			hdmi-supply = <&vdd_hdmi_en>;
  81
  82			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  83			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  84				GPIO_ACTIVE_HIGH>;
  85		};
  86	};
  87
  88	gpio@6000d000 {
  89		charging-enable-hog {
  90			gpio-hog;
  91			gpios = <TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
  92			output-low;
  93		};
  94	};
  95
  96	pinmux@70000014 {
  97		pinctrl-names = "default";
  98		pinctrl-0 = <&state_default>;
  99
 100		state_default: pinmux {
 101			ata {
 102				nvidia,pins = "ata";
 103				nvidia,function = "ide";
 104			};
 105
 106			atb {
 107				nvidia,pins = "atb", "gma", "gme";
 108				nvidia,function = "sdio4";
 109			};
 110
 111			atc {
 112				nvidia,pins = "atc";
 113				nvidia,function = "nand";
 114			};
 115
 116			atd {
 117				nvidia,pins = "atd", "ate", "gmb", "spia",
 118					"spib", "spic";
 119				nvidia,function = "gmi";
 120			};
 121
 122			cdev1 {
 123				nvidia,pins = "cdev1";
 124				nvidia,function = "plla_out";
 125			};
 126
 127			cdev2 {
 128				nvidia,pins = "cdev2";
 129				nvidia,function = "pllp_out4";
 130			};
 131
 132			crtp {
 133				nvidia,pins = "crtp";
 134				nvidia,function = "crt";
 135			};
 136
 137			lm1 {
 138				nvidia,pins = "lm1";
 139				nvidia,function = "rsvd3";
 140			};
 141
 142			csus {
 143				nvidia,pins = "csus";
 144				nvidia,function = "vi_sensor_clk";
 145			};
 146
 147			dap1 {
 148				nvidia,pins = "dap1";
 149				nvidia,function = "dap1";
 150			};
 151
 152			dap2 {
 153				nvidia,pins = "dap2";
 154				nvidia,function = "dap2";
 155			};
 156
 157			dap3 {
 158				nvidia,pins = "dap3";
 159				nvidia,function = "dap3";
 160			};
 161
 162			dap4 {
 163				nvidia,pins = "dap4";
 164				nvidia,function = "dap4";
 165			};
 166
 167			dta {
 168				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
 169				nvidia,function = "vi";
 170			};
 171
 172			dtf {
 173				nvidia,pins = "dtf";
 174				nvidia,function = "i2c3";
 175			};
 176
 177			gmc {
 178				nvidia,pins = "gmc";
 179				nvidia,function = "uartd";
 180			};
 181
 182			gmd {
 183				nvidia,pins = "gmd";
 184				nvidia,function = "sflash";
 185			};
 186
 187			gpu {
 188				nvidia,pins = "gpu";
 189				nvidia,function = "pwm";
 190			};
 191
 192			gpu7 {
 193				nvidia,pins = "gpu7";
 194				nvidia,function = "rtck";
 195			};
 196
 197			gpv {
 198				nvidia,pins = "gpv", "slxa";
 199				nvidia,function = "pcie";
 200			};
 201
 202			hdint {
 203				nvidia,pins = "hdint";
 204				nvidia,function = "hdmi";
 205			};
 206
 207			i2cp {
 208				nvidia,pins = "i2cp";
 209				nvidia,function = "i2cp";
 210			};
 211
 212			irrx {
 213				nvidia,pins = "irrx", "irtx";
 214				nvidia,function = "uartb";
 215			};
 216
 217			kbca {
 218				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 219					"kbce", "kbcf";
 220				nvidia,function = "kbc";
 221			};
 222
 223			lcsn {
 224				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
 225					"lsdi", "lvp0";
 226				nvidia,function = "rsvd4";
 227			};
 228
 229			ld0 {
 230				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 231					"ld5", "ld6", "ld7", "ld8", "ld9",
 232					"ld10", "ld11", "ld12", "ld13", "ld14",
 233					"ld15", "ld16", "ld17", "ldi", "lhp0",
 234					"lhp1", "lhp2", "lhs", "lpp", "lpw0",
 235					"lpw2", "lsc0", "lsc1", "lsck", "lsda",
 236					"lspi", "lvp1", "lvs";
 237				nvidia,function = "displaya";
 238			};
 239
 240			owc {
 241				nvidia,pins = "owc", "spdi", "spdo", "uac";
 242				nvidia,function = "rsvd2";
 243			};
 244
 245			pmc {
 246				nvidia,pins = "pmc";
 247				nvidia,function = "pwr_on";
 248			};
 249
 250			rm {
 251				nvidia,pins = "rm";
 252				nvidia,function = "i2c1";
 253			};
 254
 255			sdb {
 256				nvidia,pins = "sdb", "sdc", "sdd", "slxc", "slxk";
 257				nvidia,function = "sdio3";
 258			};
 259
 260			sdio1 {
 261				nvidia,pins = "sdio1";
 262				nvidia,function = "sdio1";
 263			};
 264
 265			slxd {
 266				nvidia,pins = "slxd";
 267				nvidia,function = "spdif";
 268			};
 269
 270			spid {
 271				nvidia,pins = "spid", "spie", "spif";
 272				nvidia,function = "spi1";
 273			};
 274
 275			spig {
 276				nvidia,pins = "spig", "spih";
 277				nvidia,function = "spi2_alt";
 278			};
 279
 280			uaa {
 281				nvidia,pins = "uaa", "uab", "uda";
 282				nvidia,function = "ulpi";
 283			};
 284
 285			uad {
 286				nvidia,pins = "uad";
 287				nvidia,function = "irda";
 288			};
 289
 290			uca {
 291				nvidia,pins = "uca", "ucb";
 292				nvidia,function = "uartc";
 293			};
 294
 295			conf-ata {
 296				nvidia,pins = "ata", "atb", "atc", "atd",
 297					"cdev1", "cdev2", "dap1", "dap4",
 298					"dte", "ddc", "dtf", "gma", "gmc",
 299					"gme", "gpu", "gpu7", "gpv", "i2cp",
 300					"irrx", "irtx", "pta", "rm", "sdc",
 301					"sdd", "slxc", "slxd", "slxk", "spdi",
 302					"spdo", "uac", "uad",
 303					"uda", "csus";
 304				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 305				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 306			};
 307
 308			conf-ate {
 309				nvidia,pins = "ate", "dap2", "dap3", "gmb", "gmd",
 310					"owc", "spia", "spib", "spic",
 311					"spid", "spie", "spig", "slxa";
 312				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 313				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 314			};
 315
 316			conf-ck32 {
 317				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 318					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 319				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 320			};
 321
 322			conf-crtp {
 323				nvidia,pins = "crtp", "spih";
 324				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 325				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 326			};
 327
 328			conf-dta {
 329				nvidia,pins = "dta", "dtb", "dtc", "dtd";
 330				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 331				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 332			};
 333
 334			conf-spif {
 335				nvidia,pins = "spif";
 336				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 337				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 338			};
 339
 340			conf-hdint {
 341				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
 342					"lpw1", "lsck", "lsda", "lsdi", "lvp0";
 343				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 344			};
 345
 346			conf-kbca {
 347				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 348					"kbce", "kbcf", "sdio1", "uaa", "uab",
 349					"uca", "ucb";
 350				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 351				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 352			};
 353
 354			conf-lc {
 355				nvidia,pins = "lc", "ls";
 356				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 357			};
 358
 359			conf-ld0 {
 360				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 361					"ld5", "ld6", "ld7", "ld8", "ld9",
 362					"ld10", "ld11", "ld12", "ld13", "ld14",
 363					"ld15", "ld16", "ld17", "ldi", "lhp0",
 364					"lhp1", "lhp2", "lhs", "lm0", "lpp",
 365					"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
 366					"lvp1", "lvs", "pmc", "sdb";
 367				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 368			};
 369
 370			conf-ld17-0 {
 371				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
 372					"ld23_22";
 373				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 374			};
 375
 376			drive-sdio1 {
 377				nvidia,pins = "drive_sdio1", "drive_ddc", "drive_vi1";
 378				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 379				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
 380				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 381				nvidia,pull-down-strength = <31>;
 382				nvidia,pull-up-strength = <31>;
 383				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 384				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 385			};
 386
 387			drive-csus {
 388				nvidia,pins = "drive_csus";
 389				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 390				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 391				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 392				nvidia,pull-down-strength = <31>;
 393				nvidia,pull-up-strength = <31>;
 394				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 395				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 396			};
 397		};
 398
 399		state_i2cmux_ddc: pinmux-i2cmux-ddc {
 400			ddc {
 401				nvidia,pins = "ddc";
 402				nvidia,function = "i2c2";
 403			};
 404
 405			pta {
 406				nvidia,pins = "pta";
 407				nvidia,function = "rsvd4";
 408			};
 409		};
 410
 411		state_i2cmux_idle: pinmux-i2cmux-idle {
 412			ddc {
 413				nvidia,pins = "ddc";
 414				nvidia,function = "rsvd4";
 415			};
 416
 417			pta {
 418				nvidia,pins = "pta";
 419				nvidia,function = "rsvd4";
 420			};
 421		};
 422
 423		state_i2cmux_pta: pinmux-i2cmux-pta {
 424			ddc {
 425				nvidia,pins = "ddc";
 426				nvidia,function = "rsvd4";
 427			};
 428
 429			pta {
 430				nvidia,pins = "pta";
 431				nvidia,function = "i2c2";
 432			};
 433		};
 434	};
 435
 436	spdif@70002400 {
 437		status = "okay";
 438
 439		nvidia,fixed-parent-rate;
 440	};
 441
 442	i2s@70002800 {
 443		status = "okay";
 444
 445		nvidia,fixed-parent-rate;
 446	};
 447
 448	serial@70006040 {
 449		compatible = "nvidia,tegra20-hsuart";
 450		reset-names = "serial";
 451		/delete-property/ reg-shift;
 452		/* GPS BCM4751 */
 453	};
 454
 455	serial@70006200 {
 456		compatible = "nvidia,tegra20-hsuart";
 457		reset-names = "serial";
 458		/delete-property/ reg-shift;
 459		status = "okay";
 460
 461		/* Azurewave AW-NH615 BCM4329B1 */
 462		bluetooth {
 463			compatible = "brcm,bcm4329-bt";
 464
 465			interrupt-parent = <&gpio>;
 466			interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>;
 467			interrupt-names = "host-wakeup";
 468
 469			/* PLLP 216MHz / 16 / 4 */
 470			max-speed = <3375000>;
 471
 472			clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
 473			clock-names = "txco";
 474
 475			vbat-supply  = <&vdd_3v3_sys>;
 476			vddio-supply = <&vdd_1v8_sys>;
 477
 478			device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
 479			shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
 480		};
 481	};
 482
 483	serial@70006300 {
 484		/delete-property/ dmas;
 485		/delete-property/ dma-names;
 486		status = "okay";
 487	};
 488
 489	pwm@7000a000 {
 490		status = "okay";
 491	};
 492
 493	i2c@7000c000 {
 494		status = "okay";
 495		clock-frequency = <400000>;
 496
 497		/* Aichi AMI306 digital compass */
 498		magnetometer@e {
 499			compatible = "asahi-kasei,ak8974";
 500			reg = <0xe>;
 501
 502			interrupt-parent = <&gpio>;
 503			interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_EDGE_RISING>;
 504
 505			avdd-supply = <&vdd_3v3_sys>;
 506			dvdd-supply = <&vdd_1v8_sys>;
 507		};
 508
 509		wm8903: audio-codec@1a {
 510			compatible = "wlf,wm8903";
 511			reg = <0x1a>;
 512
 513			interrupt-parent = <&gpio>;
 514			interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_EDGE_BOTH>;
 515
 516			gpio-controller;
 517			#gpio-cells = <2>;
 518
 519			micdet-cfg = <0x83>;
 520			micdet-delay = <100>;
 521
 522			gpio-cfg = <
 523				0x00000600 /* DMIC_LR, output */
 524				0x00000680 /* DMIC_DAT, input */
 525				0x00000000 /* Speaker-enable GPIO, output, low */
 526				0xffffffff /* don't touch */
 527				0xffffffff /* don't touch */
 528			>;
 529
 530			AVDD-supply  = <&vdd_1v8_sys>;
 531			CPVDD-supply = <&vdd_1v8_sys>;
 532			DBVDD-supply = <&vdd_1v8_sys>;
 533			DCVDD-supply = <&vdd_1v8_sys>;
 534		};
 535
 536		gyroscope@68 {
 537			compatible = "invensense,mpu3050";
 538			reg = <0x68>;
 539
 540			interrupt-parent = <&gpio>;
 541			interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_EDGE_RISING>;
 542
 543			vdd-supply    = <&vdd_3v3_sys>;
 544			vlogic-supply = <&vdd_1v8_sys>;
 545
 546			i2c-gate {
 547				#address-cells = <1>;
 548				#size-cells = <0>;
 549
 550				accelerometer@f {
 551					compatible = "kionix,kxtf9";
 552					reg = <0xf>;
 553
 554					interrupt-parent = <&gpio>;
 555					interrupts = <TEGRA_GPIO(N, 4) IRQ_TYPE_EDGE_RISING>;
 556
 557					vdd-supply = <&vdd_1v8_sys>;
 558					vddio-supply = <&vdd_1v8_sys>;
 559				};
 560			};
 561		};
 562	};
 563
 564	i2c2: i2c@7000c400 {
 565		status = "okay";
 566		clock-frequency = <100000>;
 567	};
 568
 569	i2c@7000c500 {
 570		status = "okay";
 571		clock-frequency = <400000>;
 572	};
 573
 574	i2c@7000d000 {
 575		status = "okay";
 576		clock-frequency = <400000>;
 577
 578		pmic: pmic@34 {
 579			compatible = "ti,tps6586x";
 580			reg = <0x34>;
 581			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 582
 583			ti,system-power-controller;
 584
 585			#gpio-cells = <2>;
 586			gpio-controller;
 587
 588			sys-supply = <&vdd_5v0_sys>;
 589			vin-sm0-supply = <&sys_reg>;
 590			vin-sm1-supply = <&sys_reg>;
 591			vin-sm2-supply = <&sys_reg>;
 592			vinldo01-supply = <&sm2_reg>;
 593			vinldo23-supply = <&sm2_reg>;
 594			vinldo4-supply = <&sm2_reg>;
 595			vinldo678-supply = <&sm2_reg>;
 596			vinldo9-supply = <&sm2_reg>;
 597
 598			regulators {
 599				sys_reg: sys {
 600					regulator-name = "vdd_sys";
 601					regulator-always-on;
 602				};
 603
 604				vdd_core: sm0 {
 605					regulator-name = "vdd_sm0,vdd_core";
 606					regulator-min-microvolt = <950000>;
 607					regulator-max-microvolt = <1300000>;
 608					regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
 609					regulator-coupled-max-spread = <170000 550000>;
 610					regulator-always-on;
 611					regulator-boot-on;
 612
 613					nvidia,tegra-core-regulator;
 614				};
 615
 616				vdd_cpu: sm1 {
 617					regulator-name = "vdd_sm1,vdd_cpu";
 618					regulator-min-microvolt = <750000>;
 619					regulator-max-microvolt = <1125000>;
 620					regulator-coupled-with = <&vdd_core &rtc_vdd>;
 621					regulator-coupled-max-spread = <550000 550000>;
 622					regulator-always-on;
 623					regulator-boot-on;
 624
 625					nvidia,tegra-cpu-regulator;
 626				};
 627
 628				sm2_reg: sm2 {
 629					regulator-name = "vdd_sm2,vin_ldo*";
 630					regulator-min-microvolt = <3700000>;
 631					regulator-max-microvolt = <3700000>;
 632					regulator-always-on;
 633				};
 634
 635				/* LDO0 is not connected to anything */
 636
 637				ldo1 {
 638					regulator-name = "vdd_ldo1,avdd_pll*";
 639					regulator-min-microvolt = <1100000>;
 640					regulator-max-microvolt = <1100000>;
 641					regulator-always-on;
 642				};
 643
 644				rtc_vdd: ldo2 {
 645					regulator-name = "vdd_ldo2,vdd_rtc";
 646					regulator-min-microvolt = <950000>;
 647					regulator-max-microvolt = <1300000>;
 648					regulator-coupled-with = <&vdd_core &vdd_cpu>;
 649					regulator-coupled-max-spread = <170000 550000>;
 650					regulator-always-on;
 651					regulator-boot-on;
 652
 653					nvidia,tegra-rtc-regulator;
 654				};
 655
 656				ldo3 {
 657					regulator-name = "vdd_ldo3,avdd_usb*";
 658					regulator-min-microvolt = <3300000>;
 659					regulator-max-microvolt = <3300000>;
 660					regulator-always-on;
 661				};
 662
 663				ldo4 {
 664					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
 665					regulator-min-microvolt = <1800000>;
 666					regulator-max-microvolt = <1800000>;
 667					regulator-always-on;
 668				};
 669
 670				vcore_emmc: ldo5 {
 671					regulator-name = "vdd_ldo5,vcore_mmc";
 672					regulator-min-microvolt = <2850000>;
 673					regulator-max-microvolt = <2850000>;
 674					regulator-always-on;
 675				};
 676
 677				ldo6 {
 678					regulator-name = "vdd_ldo6,avdd_vdac";
 679					regulator-min-microvolt = <1800000>;
 680					regulator-max-microvolt = <1800000>;
 681				};
 682
 683				hdmi_vdd_reg: ldo7 {
 684					regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
 685					regulator-min-microvolt = <3300000>;
 686					regulator-max-microvolt = <3300000>;
 687				};
 688
 689				hdmi_pll_reg: ldo8 {
 690					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
 691					regulator-min-microvolt = <1800000>;
 692					regulator-max-microvolt = <1800000>;
 693				};
 694
 695				ldo9 {
 696					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
 697					regulator-min-microvolt = <2850000>;
 698					regulator-max-microvolt = <2850000>;
 699					regulator-always-on;
 700				};
 701
 702				ldo_rtc {
 703					regulator-name = "vdd_rtc_out,vdd_cell";
 704					regulator-min-microvolt = <3300000>;
 705					regulator-max-microvolt = <3300000>;
 706					regulator-always-on;
 707				};
 708			};
 709		};
 710
 711		nct1008: temperature-sensor@4c {
 712			compatible = "onnn,nct1008";
 713			reg = <0x4c>;
 714			vcc-supply = <&vdd_3v3_sys>;
 715
 716			interrupt-parent = <&gpio>;
 717			interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING>;
 718
 719			#thermal-sensor-cells = <1>;
 720		};
 721	};
 722
 723	pmc@7000e400 {
 724		nvidia,invert-interrupt;
 725		nvidia,suspend-mode = <1>;
 726		nvidia,cpu-pwr-good-time = <2000>;
 727		nvidia,cpu-pwr-off-time = <100>;
 728		nvidia,core-pwr-good-time = <3845 3845>;
 729		nvidia,core-pwr-off-time = <458>;
 730		nvidia,sys-clock-req-active-high;
 731		core-supply = <&vdd_core>;
 732	};
 733
 734	memory-controller@7000f400 {
 735		nvidia,use-ram-code;
 736
 737		emc-tables@3 {
 738			reg = <0x3>;
 739
 740			#address-cells = <1>;
 741			#size-cells = <0>;
 742
 743			emc-table@25000 {
 744				reg = <25000>;
 745				compatible = "nvidia,tegra20-emc-table";
 746				clock-frequency = <25000>;
 747				nvidia,emc-registers = <0x00000002 0x00000006
 748					0x00000003 0x00000003 0x00000006 0x00000004
 749					0x00000002 0x00000009 0x00000003 0x00000003
 750					0x00000002 0x00000002 0x00000002 0x00000004
 751					0x00000003 0x00000008 0x0000000b 0x0000004d
 752					0x00000000 0x00000003 0x00000003 0x00000003
 753					0x00000008 0x00000001 0x0000000a 0x00000004
 754					0x00000003 0x00000008 0x00000004 0x00000006
 755					0x00000002 0x00000068 0x00000000 0x00000003
 756					0x00000000 0x00000000 0x00000282 0xa0ae04ae
 757					0x00070000 0x00000000 0x00000000 0x00000003
 758					0x00000000 0x00000000 0x00000000 0x00000000>;
 759			};
 760
 761			emc-table@50000 {
 762				reg = <50000>;
 763				compatible = "nvidia,tegra20-emc-table";
 764				clock-frequency = <50000>;
 765				nvidia,emc-registers = <0x00000003 0x00000007
 766					0x00000003 0x00000003 0x00000006 0x00000004
 767					0x00000002 0x00000009 0x00000003 0x00000003
 768					0x00000002 0x00000002 0x00000002 0x00000005
 769					0x00000003 0x00000008 0x0000000b 0x0000009f
 770					0x00000000 0x00000003 0x00000003 0x00000003
 771					0x00000008 0x00000001 0x0000000a 0x00000007
 772					0x00000003 0x00000008 0x00000004 0x00000006
 773					0x00000002 0x000000d0 0x00000000 0x00000000
 774					0x00000000 0x00000000 0x00000282 0xa0ae04ae
 775					0x00070000 0x00000000 0x00000000 0x00000005
 776					0x00000000 0x00000000 0x00000000 0x00000000>;
 777			};
 778
 779			emc-table@75000 {
 780				reg = <75000>;
 781				compatible = "nvidia,tegra20-emc-table";
 782				clock-frequency = <75000>;
 783				nvidia,emc-registers = <0x00000005 0x0000000a
 784					0x00000004 0x00000003 0x00000006 0x00000004
 785					0x00000002 0x00000009 0x00000003 0x00000003
 786					0x00000002 0x00000002 0x00000002 0x00000005
 787					0x00000003 0x00000008 0x0000000b 0x000000ff
 788					0x00000000 0x00000003 0x00000003 0x00000003
 789					0x00000008 0x00000001 0x0000000a 0x0000000b
 790					0x00000003 0x00000008 0x00000004 0x00000006
 791					0x00000002 0x00000138 0x00000000 0x00000000
 792					0x00000000 0x00000000 0x00000282 0xa0ae04ae
 793					0x00070000 0x00000000 0x00000000 0x00000007
 794					0x00000000 0x00000000 0x00000000 0x00000000>;
 795			};
 796
 797			emc-table@150000 {
 798				reg = <150000>;
 799				compatible = "nvidia,tegra20-emc-table";
 800				clock-frequency = <150000>;
 801				nvidia,emc-registers = <0x00000009 0x00000014
 802					0x00000007 0x00000003 0x00000006 0x00000004
 803					0x00000002 0x00000009 0x00000003 0x00000003
 804					0x00000002 0x00000002 0x00000002 0x00000005
 805					0x00000003 0x00000008 0x0000000b 0x0000021f
 806					0x00000000 0x00000003 0x00000003 0x00000003
 807					0x00000008 0x00000001 0x0000000a 0x00000015
 808					0x00000003 0x00000008 0x00000004 0x00000006
 809					0x00000002 0x00000270 0x00000000 0x00000001
 810					0x00000000 0x00000000 0x00000282 0xa07c04ae
 811					0x007dc010 0x00000000 0x00000000 0x0000000e
 812					0x00000000 0x00000000 0x00000000 0x00000000>;
 813			};
 814
 815			emc-table@300000 {
 816				reg = <300000>;
 817				compatible = "nvidia,tegra20-emc-table";
 818				clock-frequency = <300000>;
 819				nvidia,emc-registers = <0x00000012 0x00000027
 820					0x0000000d 0x00000006 0x00000007 0x00000005
 821					0x00000003 0x00000009 0x00000006 0x00000006
 822					0x00000003 0x00000003 0x00000002 0x00000006
 823					0x00000003 0x00000009 0x0000000c 0x0000045f
 824					0x00000000 0x00000004 0x00000004 0x00000006
 825					0x00000008 0x00000001 0x0000000e 0x0000002a
 826					0x00000003 0x0000000f 0x00000007 0x00000005
 827					0x00000002 0x000004e0 0x00000005 0x00000002
 828					0x00000000 0x00000000 0x00000282 0xe059048b
 829					0x007e0010 0x00000000 0x00000000 0x0000001b
 830					0x00000000 0x00000000 0x00000000 0x00000000>;
 831			};
 832
 833			lpddr2 {
 834				compatible = "elpida,B8132B2PB-6D-F", "jedec,lpddr2-s4";
 835				revision-id = <1 0>;
 836				density = <2048>;
 837				io-width = <16>;
 838			};
 839		};
 840	};
 841
 842	/* Peripheral USB via ASUS connector */
 843	usb@c5000000 {
 844		compatible = "nvidia,tegra20-udc";
 845		status = "okay";
 846		dr_mode = "peripheral";
 847	};
 848
 849	usb-phy@c5000000 {
 850		status = "okay";
 851		dr_mode = "peripheral";
 852		nvidia,xcvr-setup-use-fuses;
 853		nvidia,xcvr-lsfslew = <2>;
 854		nvidia,xcvr-lsrslew = <2>;
 855		vbus-supply = <&vdd_5v0_sys>;
 856	};
 857
 858	/* Dock's USB port */
 859	usb@c5008000 {
 860		status = "okay";
 861	};
 862
 863	usb-phy@c5008000 {
 864		status = "okay";
 865		nvidia,xcvr-setup-use-fuses;
 866		vbus-supply = <&vdd_5v0_sys>;
 867	};
 868
 869	sdmmc1: mmc@c8000000 {
 870		status = "okay";
 871
 872		#address-cells = <1>;
 873		#size-cells = <0>;
 874
 875		assigned-clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
 876		assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_C>;
 877		assigned-clock-rates = <40000000>;
 878
 879		max-frequency = <40000000>;
 880		keep-power-in-suspend;
 881		bus-width = <4>;
 882		non-removable;
 883
 884		mmc-pwrseq = <&brcm_wifi_pwrseq>;
 885		vmmc-supply = <&vdd_3v3_sys>;
 886		vqmmc-supply = <&vdd_3v3_sys>;
 887
 888		/* Azurewave AW-NH615 BCM4329B1 */
 889		wifi@1 {
 890			compatible = "brcm,bcm4329-fmac";
 891			reg = <1>;
 892
 893			interrupt-parent = <&gpio>;
 894			interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>;
 895			interrupt-names = "host-wake";
 896		};
 897	};
 898
 899	sdmmc3: mmc@c8000400 {
 900		status = "okay";
 901		bus-width = <4>;
 902		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 903		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
 904		power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
 905		vmmc-supply = <&vdd_3v3_sys>;
 906		vqmmc-supply = <&vdd_3v3_sys>;
 907	};
 908
 909	sdmmc4: mmc@c8000600 {
 910		status = "okay";
 911		bus-width = <8>;
 912		vmmc-supply = <&vcore_emmc>;
 913		vqmmc-supply = <&vdd_3v3_sys>;
 914		non-removable;
 915	};
 916
 917	mains: ac-adapter-detect {
 918		compatible = "gpio-charger";
 919		charger-type = "mains";
 920		gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
 921	};
 922
 923	backlight: backlight {
 924		compatible = "pwm-backlight";
 925
 926		enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
 927		power-supply = <&vdd_3v3_sys>;
 928		pwms = <&pwm 2 4000000>;
 929
 930		brightness-levels = <7 255>;
 931		num-interpolated-steps = <248>;
 932		default-brightness-level = <20>;
 933	};
 934
 935	/* PMIC has a built-in 32KHz oscillator which is used by PMC */
 936	clk32k_in: clock-32k-in {
 937		compatible = "fixed-clock";
 938		clock-frequency = <32768>;
 939		#clock-cells = <0>;
 940	};
 941
 942	cpus {
 943		cpu0: cpu@0 {
 944			cpu-supply = <&vdd_cpu>;
 945			operating-points-v2 = <&cpu0_opp_table>;
 946			#cooling-cells = <2>;
 947		};
 948
 949		cpu1: cpu@1 {
 950			cpu-supply = <&vdd_cpu>;
 951			operating-points-v2 = <&cpu0_opp_table>;
 952			#cooling-cells = <2>;
 953		};
 954	};
 955
 956	display-panel {
 957		compatible = "auo,b101ew05", "panel-lvds";
 958
 959		/* AUO B101EW05 using custom timings */
 960
 961		backlight = <&backlight>;
 962		ddc-i2c-bus = <&lvds_ddc>;
 963		power-supply = <&vdd_pnl_reg>;
 964
 965		width-mm = <218>;
 966		height-mm = <135>;
 967
 968		data-mapping = "jeida-18";
 969
 970		panel-timing {
 971			clock-frequency = <71200000>;
 972			hactive = <1280>;
 973			vactive = <800>;
 974			hfront-porch = <8>;
 975			hback-porch = <18>;
 976			hsync-len = <184>;
 977			vsync-len = <3>;
 978			vfront-porch = <4>;
 979			vback-porch = <8>;
 980		};
 981
 982		port {
 983			panel_input: endpoint {
 984				remote-endpoint = <&lvds_encoder_output>;
 985			};
 986		};
 987	};
 988
 989	gpio-keys {
 990		compatible = "gpio-keys";
 991
 992		key-power {
 993			label = "Power";
 994			gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
 995			linux,code = <KEY_POWER>;
 996			debounce-interval = <10>;
 997			wakeup-event-action = <EV_ACT_ASSERTED>;
 998			wakeup-source;
 999		};
1000
1001		key-volume-down {
1002			label = "Volume Down";
1003			gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
1004			linux,code = <KEY_VOLUMEDOWN>;
1005			debounce-interval = <10>;
1006			wakeup-event-action = <EV_ACT_ASSERTED>;
1007			wakeup-source;
1008		};
1009
1010		key-volume-up {
1011			label = "Volume Up";
1012			gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
1013			linux,code = <KEY_VOLUMEUP>;
1014			debounce-interval = <10>;
1015			wakeup-event-action = <EV_ACT_ASSERTED>;
1016			wakeup-source;
1017		};
1018	};
1019
1020	i2cmux {
1021		compatible = "i2c-mux-pinctrl";
1022		#address-cells = <1>;
1023		#size-cells = <0>;
1024
1025		i2c-parent = <&i2c2>;
1026
1027		pinctrl-names = "ddc", "pta", "idle";
1028		pinctrl-0 = <&state_i2cmux_ddc>;
1029		pinctrl-1 = <&state_i2cmux_pta>;
1030		pinctrl-2 = <&state_i2cmux_idle>;
1031
1032		hdmi_ddc: i2c@0 {
1033			reg = <0>;
1034			#address-cells = <1>;
1035			#size-cells = <0>;
1036		};
1037
1038		lvds_ddc: i2c@1 {
1039			reg = <1>;
1040			#address-cells = <1>;
1041			#size-cells = <0>;
1042
1043			smart-battery@b {
1044				compatible = "ti,bq20z75", "sbs,sbs-battery";
1045				reg = <0xb>;
1046				sbs,i2c-retry-count = <2>;
1047				sbs,poll-retry-count = <10>;
1048				power-supplies = <&mains>;
1049			};
1050
1051			/* Dynaimage ambient light sensor */
1052			light-sensor@1c {
1053				compatible = "dynaimage,al3000a";
1054				reg = <0x1c>;
1055
1056				interrupt-parent = <&gpio>;
1057				interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
1058
1059				vdd-supply = <&vdd_1v8_sys>;
1060			};
1061		};
1062	};
1063
1064	lvds-encoder {
1065		compatible = "ti,sn75lvds83", "lvds-encoder";
1066
1067		powerdown-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW>;
1068		power-supply = <&vdd_3v3_sys>;
1069
1070		ports {
1071			#address-cells = <1>;
1072			#size-cells = <0>;
1073
1074			port@0 {
1075				reg = <0>;
1076
1077				lvds_encoder_input: endpoint {
1078					remote-endpoint = <&lcd_output>;
1079				};
1080			};
1081
1082			port@1 {
1083				reg = <1>;
1084
1085				lvds_encoder_output: endpoint {
1086					remote-endpoint = <&panel_input>;
1087				};
1088			};
1089		};
1090	};
1091
1092	opp-table-emc {
1093		/delete-node/ opp-666000000;
1094		/delete-node/ opp-760000000;
1095	};
1096
1097	vdd_5v0_sys: regulator-5v0 {
1098		compatible = "regulator-fixed";
1099		regulator-name = "vdd_5v0";
1100		regulator-min-microvolt = <5000000>;
1101		regulator-max-microvolt = <5000000>;
1102		regulator-always-on;
1103	};
1104
1105	vdd_3v3_sys: regulator-3v3 {
1106		compatible = "regulator-fixed";
1107		regulator-name = "vdd_3v3_vs";
1108		regulator-min-microvolt = <3300000>;
1109		regulator-max-microvolt = <3300000>;
1110		regulator-always-on;
1111		vin-supply = <&vdd_5v0_sys>;
1112	};
1113
1114	regulator-pcie {
1115		compatible = "regulator-fixed";
1116		regulator-name = "pcie_vdd";
1117		regulator-min-microvolt = <1500000>;
1118		regulator-max-microvolt = <1500000>;
1119		gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
1120		regulator-always-on;
1121	};
1122
1123	vdd_pnl_reg: regulator-panel {
1124		compatible = "regulator-fixed";
1125		regulator-name = "vdd_pnl";
1126		regulator-min-microvolt = <2800000>;
1127		regulator-max-microvolt = <2800000>;
1128		gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
1129		enable-active-high;
1130	};
1131
1132	vdd_1v8_sys: regulator-1v8 {
1133		compatible = "regulator-fixed";
1134		regulator-name = "vdd_1v8_vs";
1135		regulator-min-microvolt = <1800000>;
1136		regulator-max-microvolt = <1800000>;
1137		regulator-always-on;
1138		vin-supply = <&vdd_5v0_sys>;
1139	};
1140
1141	vdd_hdmi_en: regulator-hdmi {
1142		compatible = "regulator-fixed";
1143		regulator-name = "vdd_5v0_hdmi_en";
1144		regulator-min-microvolt = <5000000>;
1145		regulator-max-microvolt = <5000000>;
1146		regulator-always-on;
1147		vin-supply = <&vdd_5v0_sys>;
1148		gpio = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
1149		enable-active-high;
1150	};
1151
1152	sound {
1153		compatible = "asus,tegra-audio-wm8903-tf101",
1154			     "nvidia,tegra-audio-wm8903";
1155		nvidia,model = "Asus EeePad Transformer WM8903";
1156
1157		nvidia,audio-routing =
1158			"Headphone Jack", "HPOUTR",
1159			"Headphone Jack", "HPOUTL",
1160			"Int Spk", "ROP",
1161			"Int Spk", "RON",
1162			"Int Spk", "LOP",
1163			"Int Spk", "LON",
1164			"IN2L", "Mic Jack",
1165			"DMICDAT", "Int Mic";
1166
1167		nvidia,i2s-controller = <&tegra_i2s1>;
1168		nvidia,audio-codec = <&wm8903>;
1169
1170		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
1171		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
1172		nvidia,mic-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_LOW>;
1173		nvidia,coupled-mic-hp-det;
1174
1175		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
1176			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
1177			 <&tegra_car TEGRA20_CLK_CDEV1>;
1178		clock-names = "pll_a", "pll_a_out0", "mclk";
1179	};
1180
1181	thermal-zones {
1182		/*
1183		 * NCT1008 has two sensors:
1184		 *
1185		 *	0: internal that monitors ambient/skin temperature
1186		 *	1: external that is connected to the CPU's diode
1187		 *
1188		 * Ideally we should use userspace thermal governor,
1189		 * but it's a much more complex solution.  The "skin"
1190		 * zone is a simpler solution which prevents TF101 from
1191		 * getting too hot from a user's tactile perspective.
1192		 * The CPU zone is intended to protect silicon from damage.
1193		 */
1194
1195		skin-thermal {
1196			polling-delay-passive = <1000>; /* milliseconds */
1197			polling-delay = <5000>; /* milliseconds */
1198
1199			thermal-sensors = <&nct1008 0>;
1200
1201			trips {
1202				trip0: skin-alert {
1203					/* start throttling at 60C */
1204					temperature = <60000>;
1205					hysteresis = <200>;
1206					type = "passive";
1207				};
1208
1209				trip1: skin-crit {
1210					/* shut down at 70C */
1211					temperature = <70000>;
1212					hysteresis = <2000>;
1213					type = "critical";
1214				};
1215			};
1216
1217			cooling-maps {
1218				map0 {
1219					trip = <&trip0>;
1220					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1221							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1222				};
1223			};
1224		};
1225
1226		cpu-thermal {
1227			polling-delay-passive = <1000>; /* milliseconds */
1228			polling-delay = <5000>; /* milliseconds */
1229
1230			thermal-sensors = <&nct1008 1>;
1231
1232			trips {
1233				trip2: cpu-alert {
1234					/* throttle at 85C until temperature drops to 84.8C */
1235					temperature = <85000>;
1236					hysteresis = <200>;
1237					type = "passive";
1238				};
1239
1240				trip3: cpu-crit {
1241					/* shut down at 90C */
1242					temperature = <90000>;
1243					hysteresis = <2000>;
1244					type = "critical";
1245				};
1246			};
1247
1248			cooling-maps {
1249				map1 {
1250					trip = <&trip2>;
1251					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1252							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1253				};
1254			};
1255		};
1256	};
1257
1258	brcm_wifi_pwrseq: wifi-pwrseq {
1259		compatible = "mmc-pwrseq-simple";
1260
1261		clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
1262		clock-names = "ext_clock";
1263
1264		reset-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW>;
1265		post-power-on-delay-ms = <200>;
1266		power-off-delay-us = <200>;
1267	};
1268};
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