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sama5d3.dtsi
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linux-6.19.14/arch/arm/boot/dts/microchip/sama5d3.dtsi
1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC 4 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC 5 * 6 * Copyright (C) 2013 Atmel, 7 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com> 8 */ 9 10#include <dt-bindings/dma/at91.h> 11#include <dt-bindings/pinctrl/at91.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13#include <dt-bindings/gpio/gpio.h> 14#include <dt-bindings/clock/at91.h> 15#include <dt-bindings/mfd/at91-usart.h> 16 17/ { 18 #address-cells = <1>; 19 #size-cells = <1>; 20 model = "Atmel SAMA5D3 family SoC"; 21 compatible = "atmel,sama5d3", "atmel,sama5"; 22 interrupt-parent = <&aic>; 23 24 aliases { 25 serial0 = &dbgu; 26 serial1 = &usart0; 27 serial2 = &usart1; 28 serial3 = &usart2; 29 serial4 = &usart3; 30 serial5 = &uart0; 31 gpio0 = &pioA; 32 gpio1 = &pioB; 33 gpio2 = &pioC; 34 gpio3 = &pioD; 35 gpio4 = &pioE; 36 tcb0 = &tcb0; 37 i2c0 = &i2c0; 38 i2c1 = &i2c1; 39 i2c2 = &i2c2; 40 ssc0 = &ssc0; 41 ssc1 = &ssc1; 42 pwm0 = &pwm0; 43 }; 44 cpus { 45 #address-cells = <1>; 46 #size-cells = <0>; 47 cpu@0 { 48 device_type = "cpu"; 49 compatible = "arm,cortex-a5"; 50 reg = <0x0>; 51 d-cache-size = <0x8000>; // L1, 32 KB 52 i-cache-size = <0x8000>; // L1, 32 KB 53 }; 54 }; 55 56 pmu { 57 compatible = "arm,cortex-a5-pmu"; 58 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>; 59 }; 60 61 memory@20000000 { 62 device_type = "memory"; 63 reg = <0x20000000 0x8000000>; 64 }; 65 66 clocks { 67 slow_xtal: slow_xtal { 68 compatible = "fixed-clock"; 69 #clock-cells = <0>; 70 clock-frequency = <0>; 71 }; 72 73 main_xtal: main_xtal { 74 compatible = "fixed-clock"; 75 #clock-cells = <0>; 76 clock-frequency = <0>; 77 }; 78 79 adc_op_clk: adc_op_clk { 80 compatible = "fixed-clock"; 81 #clock-cells = <0>; 82 clock-frequency = <1000000>; 83 }; 84 }; 85 86 sram: sram@300000 { 87 compatible = "mmio-sram"; 88 reg = <0x00300000 0x20000>; 89 #address-cells = <1>; 90 #size-cells = <1>; 91 ranges = <0 0x00300000 0x20000>; 92 }; 93 94 ahb { 95 compatible = "simple-bus"; 96 #address-cells = <1>; 97 #size-cells = <1>; 98 ranges; 99 100 apb { 101 compatible = "simple-bus"; 102 #address-cells = <1>; 103 #size-cells = <1>; 104 ranges; 105 106 mmc0: mmc@f0000000 { 107 compatible = "atmel,hsmci"; 108 reg = <0xf0000000 0x600>; 109 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; 110 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>; 111 dma-names = "rxtx"; 112 pinctrl-names = "default"; 113 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>; 114 status = "disabled"; 115 #address-cells = <1>; 116 #size-cells = <0>; 117 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; 118 clock-names = "mci_clk"; 119 }; 120 121 spi0: spi@f0004000 { 122 #address-cells = <1>; 123 #size-cells = <0>; 124 compatible = "atmel,at91rm9200-spi"; 125 reg = <0xf0004000 0x100>; 126 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; 127 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>, 128 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>; 129 dma-names = "tx", "rx"; 130 pinctrl-names = "default"; 131 pinctrl-0 = <&pinctrl_spi0>; 132 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; 133 clock-names = "spi_clk"; 134 status = "disabled"; 135 }; 136 137 ssc0: ssc@f0008000 { 138 compatible = "atmel,at91sam9g45-ssc"; 139 reg = <0xf0008000 0x4000>; 140 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>; 141 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>, 142 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>; 143 dma-names = "tx", "rx"; 144 pinctrl-names = "default"; 145 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 146 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; 147 clock-names = "pclk"; 148 status = "disabled"; 149 }; 150 151 tcb0: timer@f0010000 { 152 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; 153 #address-cells = <1>; 154 #size-cells = <0>; 155 reg = <0xf0010000 0x100>; 156 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; 157 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&clk32k>; 158 clock-names = "t0_clk", "slow_clk"; 159 }; 160 161 i2c0: i2c@f0014000 { 162 compatible = "atmel,at91sam9x5-i2c"; 163 reg = <0xf0014000 0x4000>; 164 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>; 165 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>, 166 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>; 167 dma-names = "tx", "rx"; 168 pinctrl-names = "default", "gpio"; 169 pinctrl-0 = <&pinctrl_i2c0>; 170 pinctrl-1 = <&pinctrl_i2c0_gpio>; 171 sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>; 172 scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 173 #address-cells = <1>; 174 #size-cells = <0>; 175 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; 176 status = "disabled"; 177 }; 178 179 i2c1: i2c@f0018000 { 180 compatible = "atmel,at91sam9x5-i2c"; 181 reg = <0xf0018000 0x4000>; 182 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>; 183 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>, 184 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>; 185 dma-names = "tx", "rx"; 186 pinctrl-names = "default", "gpio"; 187 pinctrl-0 = <&pinctrl_i2c1>; 188 pinctrl-1 = <&pinctrl_i2c1_gpio>; 189 sda-gpios = <&pioC 26 GPIO_ACTIVE_HIGH>; 190 scl-gpios = <&pioC 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 191 #address-cells = <1>; 192 #size-cells = <0>; 193 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; 194 status = "disabled"; 195 }; 196 197 usart0: serial@f001c000 { 198 compatible = "atmel,at91sam9260-usart"; 199 reg = <0xf001c000 0x100>; 200 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 201 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; 202 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>, 203 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 204 dma-names = "tx", "rx"; 205 pinctrl-names = "default"; 206 pinctrl-0 = <&pinctrl_usart0>; 207 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 208 clock-names = "usart"; 209 status = "disabled"; 210 }; 211 212 usart1: serial@f0020000 { 213 compatible = "atmel,at91sam9260-usart"; 214 reg = <0xf0020000 0x100>; 215 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 216 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>; 217 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>, 218 <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 219 dma-names = "tx", "rx"; 220 pinctrl-names = "default"; 221 pinctrl-0 = <&pinctrl_usart1>; 222 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 223 clock-names = "usart"; 224 status = "disabled"; 225 }; 226 227 uart0: serial@f0024000 { 228 compatible = "atmel,at91sam9260-usart"; 229 reg = <0xf0024000 0x100>; 230 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 231 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 232 pinctrl-names = "default"; 233 pinctrl-0 = <&pinctrl_uart0>; 234 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; 235 clock-names = "usart"; 236 status = "disabled"; 237 }; 238 239 pwm0: pwm@f002c000 { 240 compatible = "atmel,sama5d3-pwm"; 241 reg = <0xf002c000 0x300>; 242 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>; 243 #pwm-cells = <3>; 244 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>; 245 status = "disabled"; 246 }; 247 248 isi: isi@f0034000 { 249 compatible = "atmel,at91sam9g45-isi"; 250 reg = <0xf0034000 0x4000>; 251 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>; 252 pinctrl-names = "default"; 253 pinctrl-0 = <&pinctrl_isi_data_0_7>; 254 clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; 255 clock-names = "isi_clk"; 256 status = "disabled"; 257 port { 258 #address-cells = <1>; 259 #size-cells = <0>; 260 }; 261 }; 262 263 sfr: sfr@f0038000 { 264 compatible = "atmel,sama5d3-sfr", "syscon"; 265 reg = <0xf0038000 0x60>; 266 }; 267 268 mmc1: mmc@f8000000 { 269 compatible = "atmel,hsmci"; 270 reg = <0xf8000000 0x600>; 271 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>; 272 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>; 273 dma-names = "rxtx"; 274 pinctrl-names = "default"; 275 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; 276 status = "disabled"; 277 #address-cells = <1>; 278 #size-cells = <0>; 279 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; 280 clock-names = "mci_clk"; 281 }; 282 283 spi1: spi@f8008000 { 284 #address-cells = <1>; 285 #size-cells = <0>; 286 compatible = "atmel,at91rm9200-spi"; 287 reg = <0xf8008000 0x100>; 288 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; 289 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>, 290 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>; 291 dma-names = "tx", "rx"; 292 pinctrl-names = "default"; 293 pinctrl-0 = <&pinctrl_spi1>; 294 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>; 295 clock-names = "spi_clk"; 296 status = "disabled"; 297 }; 298 299 ssc1: ssc@f800c000 { 300 compatible = "atmel,at91sam9g45-ssc"; 301 reg = <0xf800c000 0x4000>; 302 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>; 303 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>, 304 <&dma1 2 AT91_DMA_CFG_PER_ID(4)>; 305 dma-names = "tx", "rx"; 306 pinctrl-names = "default"; 307 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 308 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; 309 clock-names = "pclk"; 310 status = "disabled"; 311 }; 312 313 adc0: adc@f8018000 { 314 compatible = "atmel,sama5d3-adc"; 315 reg = <0xf8018000 0x100>; 316 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>; 317 pinctrl-names = "default"; 318 pinctrl-0 = < 319 &pinctrl_adc0_adtrg 320 &pinctrl_adc0_ad0 321 &pinctrl_adc0_ad1 322 &pinctrl_adc0_ad2 323 &pinctrl_adc0_ad3 324 &pinctrl_adc0_ad4 325 &pinctrl_adc0_ad5 326 &pinctrl_adc0_ad6 327 &pinctrl_adc0_ad7 328 &pinctrl_adc0_ad8 329 &pinctrl_adc0_ad9 330 &pinctrl_adc0_ad10 331 &pinctrl_adc0_ad11 332 >; 333 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, 334 <&adc_op_clk>; 335 clock-names = "adc_clk", "adc_op_clk"; 336 atmel,adc-channels-used = <0xfff>; 337 atmel,adc-startup-time = <40>; 338 atmel,adc-use-external-triggers; 339 atmel,adc-vref = <3000>; 340 atmel,adc-sample-hold-time = <11>; 341 status = "disabled"; 342 }; 343 344 i2c2: i2c@f801c000 { 345 compatible = "atmel,at91sam9x5-i2c"; 346 reg = <0xf801c000 0x4000>; 347 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>; 348 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>, 349 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>; 350 dma-names = "tx", "rx"; 351 pinctrl-names = "default", "gpio"; 352 pinctrl-0 = <&pinctrl_i2c2>; 353 pinctrl-1 = <&pinctrl_i2c2_gpio>; 354 sda-gpios = <&pioA 18 GPIO_ACTIVE_HIGH>; 355 scl-gpios = <&pioA 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 356 #address-cells = <1>; 357 #size-cells = <0>; 358 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; 359 status = "disabled"; 360 }; 361 362 usart2: serial@f8020000 { 363 compatible = "atmel,at91sam9260-usart"; 364 reg = <0xf8020000 0x100>; 365 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 366 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 367 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>, 368 <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 369 dma-names = "tx", "rx"; 370 pinctrl-names = "default"; 371 pinctrl-0 = <&pinctrl_usart2>; 372 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 373 clock-names = "usart"; 374 status = "disabled"; 375 }; 376 377 usart3: serial@f8024000 { 378 compatible = "atmel,at91sam9260-usart"; 379 reg = <0xf8024000 0x100>; 380 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 381 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 382 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>, 383 <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 384 dma-names = "tx", "rx"; 385 pinctrl-names = "default"; 386 pinctrl-0 = <&pinctrl_usart3>; 387 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; 388 clock-names = "usart"; 389 status = "disabled"; 390 }; 391 392 sha: crypto@f8034000 { 393 compatible = "atmel,at91sam9g46-sha"; 394 reg = <0xf8034000 0x100>; 395 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>; 396 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>; 397 dma-names = "tx"; 398 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>; 399 clock-names = "sha_clk"; 400 }; 401 402 aes: crypto@f8038000 { 403 compatible = "atmel,at91sam9g46-aes"; 404 reg = <0xf8038000 0x100>; 405 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>; 406 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>, 407 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>; 408 dma-names = "tx", "rx"; 409 clocks = <&pmc PMC_TYPE_PERIPHERAL 43>; 410 clock-names = "aes_clk"; 411 }; 412 413 tdes: crypto@f803c000 { 414 compatible = "atmel,at91sam9g46-tdes"; 415 reg = <0xf803c000 0x100>; 416 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>; 417 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>, 418 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>; 419 dma-names = "tx", "rx"; 420 clocks = <&pmc PMC_TYPE_PERIPHERAL 44>; 421 clock-names = "tdes_clk"; 422 }; 423 424 trng: rng@f8040000 { 425 compatible = "atmel,at91sam9g45-trng"; 426 reg = <0xf8040000 0x100>; 427 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>; 428 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>; 429 }; 430 431 hsmc: hsmc@ffffc000 { 432 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd"; 433 reg = <0xffffc000 0x1000>; 434 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>; 435 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 436 #address-cells = <1>; 437 #size-cells = <1>; 438 ranges; 439 440 pmecc: ecc-engine@ffffc070 { 441 compatible = "atmel,at91sam9g45-pmecc"; 442 reg = <0xffffc070 0x490>, 443 <0xffffc500 0x100>; 444 }; 445 }; 446 447 dma0: dma-controller@ffffe600 { 448 compatible = "atmel,at91sam9g45-dma"; 449 reg = <0xffffe600 0x200>; 450 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>; 451 #dma-cells = <2>; 452 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>; 453 clock-names = "dma_clk"; 454 }; 455 456 dma1: dma-controller@ffffe800 { 457 compatible = "atmel,at91sam9g45-dma"; 458 reg = <0xffffe800 0x200>; 459 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; 460 #dma-cells = <2>; 461 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>; 462 clock-names = "dma_clk"; 463 }; 464 465 ramc0: ramc@ffffea00 { 466 compatible = "atmel,sama5d3-ddramc"; 467 reg = <0xffffea00 0x200>; 468 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 49>; 469 clock-names = "ddrck", "mpddr"; 470 }; 471 472 dbgu: serial@ffffee00 { 473 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 474 reg = <0xffffee00 0x200>; 475 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 476 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; 477 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>, 478 <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 479 dma-names = "tx", "rx"; 480 pinctrl-names = "default"; 481 pinctrl-0 = <&pinctrl_dbgu>; 482 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 483 clock-names = "usart"; 484 status = "disabled"; 485 }; 486 487 aic: interrupt-controller@fffff000 { 488 #interrupt-cells = <3>; 489 compatible = "atmel,sama5d3-aic"; 490 interrupt-controller; 491 reg = <0xfffff000 0x200>; 492 atmel,external-irqs = <47>; 493 }; 494 495 pinctrl: pinctrl@fffff200 { 496 #address-cells = <1>; 497 #size-cells = <1>; 498 compatible = "atmel,sama5d3-pinctrl", "simple-mfd"; 499 ranges = <0xfffff200 0xfffff200 0xa00>; 500 atmel,mux-mask = < 501 /* A B C */ 502 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */ 503 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */ 504 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */ 505 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */ 506 0xffffffff 0xbf9f8000 0x18000000 /* pioE */ 507 >; 508 509 /* shared pinctrl settings */ 510 adc0 { 511 pinctrl_adc0_adtrg: adc0_adtrg { 512 atmel,pins = 513 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */ 514 }; 515 pinctrl_adc0_ad0: adc0_ad0 { 516 atmel,pins = 517 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */ 518 }; 519 pinctrl_adc0_ad1: adc0_ad1 { 520 atmel,pins = 521 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */ 522 }; 523 pinctrl_adc0_ad2: adc0_ad2 { 524 atmel,pins = 525 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */ 526 }; 527 pinctrl_adc0_ad3: adc0_ad3 { 528 atmel,pins = 529 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */ 530 }; 531 pinctrl_adc0_ad4: adc0_ad4 { 532 atmel,pins = 533 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */ 534 }; 535 pinctrl_adc0_ad5: adc0_ad5 { 536 atmel,pins = 537 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */ 538 }; 539 pinctrl_adc0_ad6: adc0_ad6 { 540 atmel,pins = 541 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */ 542 }; 543 pinctrl_adc0_ad7: adc0_ad7 { 544 atmel,pins = 545 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */ 546 }; 547 pinctrl_adc0_ad8: adc0_ad8 { 548 atmel,pins = 549 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */ 550 }; 551 pinctrl_adc0_ad9: adc0_ad9 { 552 atmel,pins = 553 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */ 554 }; 555 pinctrl_adc0_ad10: adc0_ad10 { 556 atmel,pins = 557 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */ 558 }; 559 pinctrl_adc0_ad11: adc0_ad11 { 560 atmel,pins = 561 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */ 562 }; 563 }; 564 565 dbgu { 566 pinctrl_dbgu: dbgu-0 { 567 atmel,pins = 568 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 569 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 570 }; 571 }; 572 573 ebi { 574 pinctrl_ebi_addr: ebi-addr-0 { 575 atmel,pins = 576 <AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE 577 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE 578 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE 579 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE 580 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE 581 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE 582 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE 583 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE 584 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE 585 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE 586 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE 587 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE 588 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE 589 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE 590 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE 591 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE 592 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE 593 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE 594 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE 595 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE 596 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE 597 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE 598 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; 599 }; 600 601 pinctrl_ebi_nand_addr: ebi-addr-1 { 602 atmel,pins = 603 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE 604 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; 605 }; 606 607 pinctrl_ebi_cs0: ebi-cs0-0 { 608 atmel,pins = 609 <AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; 610 }; 611 612 pinctrl_ebi_cs1: ebi-cs1-0 { 613 atmel,pins = 614 <AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; 615 }; 616 617 pinctrl_ebi_cs2: ebi-cs2-0 { 618 atmel,pins = 619 <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; 620 }; 621 622 pinctrl_ebi_nwait: ebi-nwait-0 { 623 atmel,pins = 624 <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; 625 }; 626 627 pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 { 628 atmel,pins = 629 <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; 630 }; 631 }; 632 633 i2c0 { 634 pinctrl_i2c0: i2c0-0 { 635 atmel,pins = 636 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */ 637 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */ 638 }; 639 640 pinctrl_i2c0_gpio: i2c0-gpio { 641 atmel,pins = 642 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 643 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 644 }; 645 }; 646 647 i2c1 { 648 pinctrl_i2c1: i2c1-0 { 649 atmel,pins = 650 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */ 651 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */ 652 }; 653 654 pinctrl_i2c1_gpio: i2c1-gpio { 655 atmel,pins = 656 <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 657 AT91_PIOC 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 658 }; 659 }; 660 661 i2c2 { 662 pinctrl_i2c2: i2c2-0 { 663 atmel,pins = 664 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */ 665 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */ 666 }; 667 668 pinctrl_i2c2_gpio: i2c2-gpio { 669 atmel,pins = 670 <AT91_PIOA 18 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 671 AT91_PIOA 19 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 672 }; 673 }; 674 675 isi { 676 pinctrl_isi_data_0_7: isi-0-data-0-7 { 677 atmel,pins = 678 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */ 679 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */ 680 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */ 681 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */ 682 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */ 683 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */ 684 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */ 685 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */ 686 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */ 687 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */ 688 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */ 689 }; 690 691 pinctrl_isi_data_8_9: isi-0-data-8-9 { 692 atmel,pins = 693 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */ 694 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */ 695 }; 696 697 pinctrl_isi_data_10_11: isi-0-data-10-11 { 698 atmel,pins = 699 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */ 700 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */ 701 }; 702 }; 703 704 mmc0 { 705 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { 706 atmel,pins = 707 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */ 708 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */ 709 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */ 710 }; 711 pinctrl_mmc0_dat1_3: mmc0_dat1_3 { 712 atmel,pins = 713 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */ 714 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */ 715 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */ 716 }; 717 pinctrl_mmc0_dat4_7: mmc0_dat4_7 { 718 atmel,pins = 719 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */ 720 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */ 721 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conflicts with TCLK0, PWMH3 */ 722 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */ 723 }; 724 }; 725 726 mmc1 { 727 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 { 728 atmel,pins = 729 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */ 730 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */ 731 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */ 732 }; 733 pinctrl_mmc1_dat1_3: mmc1_dat1_3 { 734 atmel,pins = 735 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */ 736 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */ 737 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */ 738 }; 739 }; 740 741 nand0 { 742 pinctrl_nand0_ale_cle: nand0_ale_cle-0 { 743 atmel,pins = 744 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */ 745 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */ 746 }; 747 }; 748 749 pwm0 { 750 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 { 751 atmel,pins = 752 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */ 753 }; 754 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 { 755 atmel,pins = 756 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */ 757 }; 758 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 { 759 atmel,pins = 760 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */ 761 }; 762 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 { 763 atmel,pins = 764 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */ 765 }; 766 767 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 { 768 atmel,pins = 769 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */ 770 }; 771 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 { 772 atmel,pins = 773 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */ 774 }; 775 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 { 776 atmel,pins = 777 <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */ 778 }; 779 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 { 780 atmel,pins = 781 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */ 782 }; 783 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 { 784 atmel,pins = 785 <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */ 786 }; 787 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 { 788 atmel,pins = 789 <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */ 790 }; 791 792 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 { 793 atmel,pins = 794 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */ 795 }; 796 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 { 797 atmel,pins = 798 <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */ 799 }; 800 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 { 801 atmel,pins = 802 <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */ 803 }; 804 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 { 805 atmel,pins = 806 <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */ 807 }; 808 809 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 { 810 atmel,pins = 811 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */ 812 }; 813 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 { 814 atmel,pins = 815 <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */ 816 }; 817 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 { 818 atmel,pins = 819 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */ 820 }; 821 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 { 822 atmel,pins = 823 <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */ 824 }; 825 }; 826 827 spi0 { 828 pinctrl_spi0: spi0-0 { 829 atmel,pins = 830 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */ 831 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */ 832 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */ 833 }; 834 }; 835 836 spi1 { 837 pinctrl_spi1: spi1-0 { 838 atmel,pins = 839 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */ 840 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */ 841 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */ 842 }; 843 }; 844 845 ssc0 { 846 pinctrl_ssc0_tx: ssc0_tx { 847 atmel,pins = 848 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */ 849 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */ 850 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */ 851 }; 852 853 pinctrl_ssc0_rx: ssc0_rx { 854 atmel,pins = 855 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */ 856 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */ 857 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */ 858 }; 859 }; 860 861 ssc1 { 862 pinctrl_ssc1_tx: ssc1_tx { 863 atmel,pins = 864 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */ 865 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */ 866 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */ 867 }; 868 869 pinctrl_ssc1_rx: ssc1_rx { 870 atmel,pins = 871 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */ 872 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */ 873 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */ 874 }; 875 }; 876 877 uart0 { 878 pinctrl_uart0: uart0-0 { 879 atmel,pins = 880 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */ 881 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */ 882 }; 883 }; 884 885 uart1 { 886 pinctrl_uart1: uart1-0 { 887 atmel,pins = 888 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */ 889 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */ 890 }; 891 }; 892 893 usart0 { 894 pinctrl_usart0: usart0-0 { 895 atmel,pins = 896 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 897 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; 898 }; 899 900 pinctrl_usart0_rts_cts: usart0_rts_cts-0 { 901 atmel,pins = 902 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */ 903 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */ 904 }; 905 }; 906 907 usart1 { 908 pinctrl_usart1: usart1-0 { 909 atmel,pins = 910 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 911 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 912 }; 913 914 pinctrl_usart1_rts_cts: usart1_rts_cts-0 { 915 atmel,pins = 916 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */ 917 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */ 918 }; 919 }; 920 921 usart2 { 922 pinctrl_usart2: usart2-0 { 923 atmel,pins = 924 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A25 */ 925 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts NCS0 */ 926 }; 927 928 pinctrl_usart2_rts_cts: usart2_rts_cts-0 { 929 atmel,pins = 930 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */ 931 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */ 932 }; 933 }; 934 935 usart3 { 936 pinctrl_usart3: usart3-0 { 937 atmel,pins = 938 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A18 */ 939 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with A19 */ 940 }; 941 942 pinctrl_usart3_rts_cts: usart3_rts_cts-0 { 943 atmel,pins = 944 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */ 945 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */ 946 }; 947 }; 948 949 950 pioA: gpio@fffff200 { 951 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 952 reg = <0xfffff200 0x100>; 953 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>; 954 #gpio-cells = <2>; 955 gpio-controller; 956 interrupt-controller; 957 #interrupt-cells = <2>; 958 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 959 }; 960 961 pioB: gpio@fffff400 { 962 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 963 reg = <0xfffff400 0x100>; 964 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>; 965 #gpio-cells = <2>; 966 gpio-controller; 967 interrupt-controller; 968 #interrupt-cells = <2>; 969 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 970 }; 971 972 pioC: gpio@fffff600 { 973 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 974 reg = <0xfffff600 0x100>; 975 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>; 976 #gpio-cells = <2>; 977 gpio-controller; 978 interrupt-controller; 979 #interrupt-cells = <2>; 980 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 981 }; 982 983 pioD: gpio@fffff800 { 984 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 985 reg = <0xfffff800 0x100>; 986 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>; 987 #gpio-cells = <2>; 988 gpio-controller; 989 interrupt-controller; 990 #interrupt-cells = <2>; 991 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 992 }; 993 994 pioE: gpio@fffffa00 { 995 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 996 reg = <0xfffffa00 0x100>; 997 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>; 998 #gpio-cells = <2>; 999 gpio-controller; 1000 interrupt-controller; 1001 #interrupt-cells = <2>; 1002 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 1003 }; 1004 }; 1005 1006 pmc: clock-controller@fffffc00 { 1007 compatible = "atmel,sama5d3-pmc", "syscon"; 1008 reg = <0xfffffc00 0x120>; 1009 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1010 #clock-cells = <2>; 1011 clocks = <&clk32k>, <&main_xtal>; 1012 clock-names = "slow_clk", "main_xtal"; 1013 }; 1014 1015 reset_controller: reset-controller@fffffe00 { 1016 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc"; 1017 reg = <0xfffffe00 0x10>; 1018 clocks = <&clk32k>; 1019 }; 1020 1021 shutdown_controller: poweroff@fffffe10 { 1022 compatible = "atmel,at91sam9x5-shdwc"; 1023 reg = <0xfffffe10 0x10>; 1024 clocks = <&clk32k>; 1025 }; 1026 1027 pit: timer@fffffe30 { 1028 compatible = "atmel,at91sam9260-pit"; 1029 reg = <0xfffffe30 0xf>; 1030 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; 1031 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 1032 }; 1033 1034 watchdog: watchdog@fffffe40 { 1035 compatible = "atmel,at91sam9260-wdt"; 1036 reg = <0xfffffe40 0x10>; 1037 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>; 1038 clocks = <&clk32k>; 1039 atmel,watchdog-type = "hardware"; 1040 atmel,reset-type = "all"; 1041 atmel,dbg-halt; 1042 status = "disabled"; 1043 }; 1044 1045 clk32k: clock-controller@fffffe50 { 1046 compatible = "atmel,sama5d3-sckc"; 1047 reg = <0xfffffe50 0x4>; 1048 clocks = <&slow_xtal>; 1049 #clock-cells = <0>; 1050 }; 1051 1052 rtc@fffffeb0 { 1053 compatible = "atmel,at91rm9200-rtc"; 1054 reg = <0xfffffeb0 0x30>; 1055 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1056 clocks = <&clk32k>; 1057 }; 1058 }; 1059 1060 nfc_sram: sram@200000 { 1061 compatible = "mmio-sram"; 1062 no-memory-wc; 1063 reg = <0x200000 0x2400>; 1064 #address-cells = <1>; 1065 #size-cells = <1>; 1066 ranges = <0 0x200000 0x2400>; 1067 }; 1068 1069 usb0: gadget@500000 { 1070 compatible = "atmel,sama5d3-udc"; 1071 reg = <0x00500000 0x100000 1072 0xf8030000 0x4000>; 1073 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>; 1074 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>, <&pmc PMC_TYPE_CORE PMC_UTMI>; 1075 clock-names = "pclk", "hclk"; 1076 status = "disabled"; 1077 }; 1078 1079 usb1: usb@600000 { 1080 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 1081 reg = <0x00600000 0x100000>; 1082 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1083 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_SYSTEM 6>; 1084 clock-names = "ohci_clk", "hclk", "uhpck"; 1085 status = "disabled"; 1086 }; 1087 1088 usb2: usb@700000 { 1089 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1090 reg = <0x00700000 0x100000>; 1091 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1092 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 32>; 1093 clock-names = "usb_clk", "ehci_clk"; 1094 status = "disabled"; 1095 }; 1096 1097 ebi: ebi@10000000 { 1098 compatible = "atmel,sama5d3-ebi"; 1099 #address-cells = <2>; 1100 #size-cells = <1>; 1101 atmel,smc = <&hsmc>; 1102 reg = <0x10000000 0x10000000 1103 0x40000000 0x30000000>; 1104 ranges = <0x0 0x0 0x10000000 0x10000000 1105 0x1 0x0 0x40000000 0x10000000 1106 0x2 0x0 0x50000000 0x10000000 1107 0x3 0x0 0x60000000 0x10000000>; 1108 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 1109 status = "disabled"; 1110 1111 nand_controller: nand-controller { 1112 compatible = "atmel,sama5d3-nand-controller"; 1113 atmel,nfc-sram = <&nfc_sram>; 1114 atmel,nfc-io = <&nfc_io>; 1115 ecc-engine = <&pmecc>; 1116 #address-cells = <2>; 1117 #size-cells = <1>; 1118 ranges; 1119 status = "disabled"; 1120 }; 1121 }; 1122 1123 nfc_io: nfc-io@70000000 { 1124 compatible = "atmel,sama5d3-nfc-io", "syscon"; 1125 reg = <0x70000000 0x8000000>; 1126 }; 1127 }; 1128};
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