socfpga_cyclone5_mercury_sa1.dtsi

  1// SPDX-License-Identifier: GPL-2.0+ OR MIT
  2/*
  3 * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com
  4 */
  5
  6#include "socfpga_cyclone5.dtsi"
  7
  8/ {
  9	model = "Enclustra Mercury SA1";
 10	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
 11
 12	chosen {
 13		stdout-path = "serial0:115200n8";
 14	};
 15
 16	aliases {
 17		ethernet0 = &gmac1;
 18	};
 19
 20	/* Adjusted the i2c labels to use generic base-board dtsi files for
 21	 * Enclustra Arria10 and Cyclone5 SoMs.
 22	 *
 23	 * The set of i2c0 and i2c1 labels defined in socfpga_cyclone5.dtsi and in
 24	 * socfpga_arria10.dtsi do not allow for using the same base-board .dtsi
 25	 * fragments. Thus define generic labels here to match the correct i2c
 26	 * bus in a generic base-board .dtsi file.
 27	 */
 28	soc {
 29		i2c_encl: i2c@ffc04000 {
 30		};
 31		i2c_encl_fpga: i2c@ffc05000 {
 32		};
 33	};
 34
 35	memory {
 36		name = "memory";
 37		device_type = "memory";
 38		reg = <0x0 0x40000000>; /* 1GB */
 39	};
 40};
 41
 42&osc1 {
 43	clock-frequency = <50000000>;
 44};
 45
 46&i2c_encl {
 47	i2c-sda-hold-time-ns = <300>;
 48	clock-frequency = <100000>;
 49	status = "okay";
 50
 51	isl12020: rtc@6f {
 52		compatible = "isil,isl12022";
 53		reg = <0x6f>;
 54	};
 55};
 56
 57&i2c_encl_fpga {
 58	i2c-sda-hold-time-ns = <300>;
 59	status = "disabled";
 60};
 61
 62&uart0 {
 63	clock-frequency = <100000000>;
 64};
 65
 66&mmc0 {
 67	status = "okay";
 68	/delete-property/ cap-mmc-highspeed;
 69	/delete-property/ cap-sd-highspeed;
 70};
 71
 72&qspi {
 73	status = "okay";
 74
 75	flash0: flash@0 {
 76		u-boot,dm-pre-reloc;
 77		#address-cells = <1>;
 78		#size-cells = <1>;
 79		compatible = "jedec,spi-nor";
 80		reg = <0>;
 81
 82		spi-rx-bus-width = <4>;
 83		spi-tx-bus-width = <4>;
 84		spi-max-frequency = <10000000>;
 85
 86		cdns,read-delay = <4>;
 87		cdns,tshsl-ns = <50>;
 88		cdns,tsd2d-ns = <50>;
 89		cdns,tchsh-ns = <4>;
 90		cdns,tslch-ns = <4>;
 91
 92		partition@raw {
 93			label = "Flash Raw";
 94			reg = <0x0 0x4000000>;
 95		};
 96	};
 97};
 98
 99&gpio0 {
100	status = "okay";
101};
102
103&gpio1 {
104	status = "okay";
105};
106
107&gmac1 {
108	status = "okay";
109	/delete-property/ mac-address;
110	phy-mode = "rgmii-id";
111	phy-handle = <&phy3>;
112
113	mdio0 {
114		#address-cells = <1>;
115		#size-cells = <0>;
116		compatible = "snps,dwmac-mdio";
117
118		phy3: ethernet-phy@3 {
119			reg = <3>;
120
121			/* Add 2ns RX clock delay (1.2ns + 0.78ns)*/
122			rxc-skew-ps = <1680>;
123			rxd0-skew-ps = <420>;
124			rxd1-skew-ps = <420>;
125			rxd2-skew-ps = <420>;
126			rxd3-skew-ps = <420>;
127			rxdv-skew-ps = <420>;
128
129			/* Add 1.38ns TX clock delay (0.96ns + 0.42ns)*/
130			txc-skew-ps = <1860>;
131			txd0-skew-ps = <0>;
132			txd1-skew-ps = <0>;
133			txd2-skew-ps = <0>;
134			txd3-skew-ps = <0>;
135			txen-skew-ps = <0>;
136		};
137	};
138};
139
140&usb1 {
141	status = "okay";
142	dr_mode = "host";
143};