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aspeed-g6.dtsi
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linux-6.19.14/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
1// SPDX-License-Identifier: GPL-2.0-or-later 2// Copyright 2019 IBM Corp. 3 4#include <dt-bindings/interrupt-controller/arm-gic.h> 5#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 6#include <dt-bindings/clock/ast2600-clock.h> 7 8/ { 9 model = "Aspeed BMC"; 10 compatible = "aspeed,ast2600"; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&gic>; 14 15 aliases { 16 i2c0 = &i2c0; 17 i2c1 = &i2c1; 18 i2c2 = &i2c2; 19 i2c3 = &i2c3; 20 i2c4 = &i2c4; 21 i2c5 = &i2c5; 22 i2c6 = &i2c6; 23 i2c7 = &i2c7; 24 i2c8 = &i2c8; 25 i2c9 = &i2c9; 26 i2c10 = &i2c10; 27 i2c11 = &i2c11; 28 i2c12 = &i2c12; 29 i2c13 = &i2c13; 30 i2c14 = &i2c14; 31 i2c15 = &i2c15; 32 serial0 = &uart1; 33 serial1 = &uart2; 34 serial2 = &uart3; 35 serial3 = &uart4; 36 serial4 = &uart5; 37 serial5 = &vuart1; 38 serial6 = &vuart2; 39 mdio0 = &mdio0; 40 mdio1 = &mdio1; 41 mdio2 = &mdio2; 42 mdio3 = &mdio3; 43 }; 44 45 46 cpus { 47 #address-cells = <1>; 48 #size-cells = <0>; 49 enable-method = "aspeed,ast2600-smp"; 50 51 cpu@f00 { 52 compatible = "arm,cortex-a7"; 53 device_type = "cpu"; 54 reg = <0xf00>; 55 }; 56 57 cpu@f01 { 58 compatible = "arm,cortex-a7"; 59 device_type = "cpu"; 60 reg = <0xf01>; 61 }; 62 }; 63 64 timer { 65 compatible = "arm,armv7-timer"; 66 interrupt-parent = <&gic>; 67 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 68 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 69 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 70 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 71 clocks = <&syscon ASPEED_CLK_HPLL>; 72 arm,cpu-registers-not-fw-configured; 73 always-on; 74 }; 75 76 edac: sdram@1e6e0000 { 77 compatible = "aspeed,ast2600-sdram-edac", "syscon"; 78 reg = <0x1e6e0000 0x174>; 79 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 80 }; 81 82 ahb { 83 compatible = "simple-bus"; 84 #address-cells = <1>; 85 #size-cells = <1>; 86 device_type = "soc"; 87 ranges; 88 89 gic: interrupt-controller@40461000 { 90 compatible = "arm,cortex-a7-gic"; 91 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 92 #interrupt-cells = <3>; 93 interrupt-controller; 94 interrupt-parent = <&gic>; 95 reg = <0x40461000 0x1000>, 96 <0x40462000 0x1000>, 97 <0x40464000 0x2000>, 98 <0x40466000 0x2000>; 99 }; 100 101 ahbc: bus@1e600000 { 102 compatible = "aspeed,ast2600-ahbc", "syscon"; 103 reg = <0x1e600000 0x100>; 104 }; 105 106 fmc: spi@1e620000 { 107 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; 108 #address-cells = <1>; 109 #size-cells = <0>; 110 compatible = "aspeed,ast2600-fmc"; 111 clocks = <&syscon ASPEED_CLK_AHB>; 112 status = "disabled"; 113 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 114 flash@0 { 115 reg = < 0 >; 116 compatible = "jedec,spi-nor"; 117 spi-max-frequency = <50000000>; 118 spi-rx-bus-width = <2>; 119 status = "disabled"; 120 }; 121 flash@1 { 122 reg = < 1 >; 123 compatible = "jedec,spi-nor"; 124 spi-max-frequency = <50000000>; 125 spi-rx-bus-width = <2>; 126 status = "disabled"; 127 }; 128 flash@2 { 129 reg = < 2 >; 130 compatible = "jedec,spi-nor"; 131 spi-max-frequency = <50000000>; 132 spi-rx-bus-width = <2>; 133 status = "disabled"; 134 }; 135 }; 136 137 spi1: spi@1e630000 { 138 reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>; 139 #address-cells = <1>; 140 #size-cells = <0>; 141 compatible = "aspeed,ast2600-spi"; 142 clocks = <&syscon ASPEED_CLK_AHB>; 143 status = "disabled"; 144 flash@0 { 145 reg = < 0 >; 146 compatible = "jedec,spi-nor"; 147 spi-max-frequency = <50000000>; 148 spi-rx-bus-width = <2>; 149 status = "disabled"; 150 }; 151 flash@1 { 152 reg = < 1 >; 153 compatible = "jedec,spi-nor"; 154 spi-max-frequency = <50000000>; 155 spi-rx-bus-width = <2>; 156 status = "disabled"; 157 }; 158 }; 159 160 spi2: spi@1e631000 { 161 reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>; 162 #address-cells = <1>; 163 #size-cells = <0>; 164 compatible = "aspeed,ast2600-spi"; 165 clocks = <&syscon ASPEED_CLK_AHB>; 166 status = "disabled"; 167 flash@0 { 168 reg = < 0 >; 169 compatible = "jedec,spi-nor"; 170 spi-max-frequency = <50000000>; 171 spi-rx-bus-width = <2>; 172 status = "disabled"; 173 }; 174 flash@1 { 175 reg = < 1 >; 176 compatible = "jedec,spi-nor"; 177 spi-max-frequency = <50000000>; 178 spi-rx-bus-width = <2>; 179 status = "disabled"; 180 }; 181 flash@2 { 182 reg = < 2 >; 183 compatible = "jedec,spi-nor"; 184 spi-max-frequency = <50000000>; 185 spi-rx-bus-width = <2>; 186 status = "disabled"; 187 }; 188 }; 189 190 mdio0: mdio@1e650000 { 191 compatible = "aspeed,ast2600-mdio"; 192 reg = <0x1e650000 0x8>; 193 #address-cells = <1>; 194 #size-cells = <0>; 195 status = "disabled"; 196 pinctrl-names = "default"; 197 pinctrl-0 = <&pinctrl_mdio1_default>; 198 resets = <&syscon ASPEED_RESET_MII>; 199 }; 200 201 mdio1: mdio@1e650008 { 202 compatible = "aspeed,ast2600-mdio"; 203 reg = <0x1e650008 0x8>; 204 #address-cells = <1>; 205 #size-cells = <0>; 206 status = "disabled"; 207 pinctrl-names = "default"; 208 pinctrl-0 = <&pinctrl_mdio2_default>; 209 resets = <&syscon ASPEED_RESET_MII>; 210 }; 211 212 mdio2: mdio@1e650010 { 213 compatible = "aspeed,ast2600-mdio"; 214 reg = <0x1e650010 0x8>; 215 #address-cells = <1>; 216 #size-cells = <0>; 217 status = "disabled"; 218 pinctrl-names = "default"; 219 pinctrl-0 = <&pinctrl_mdio3_default>; 220 resets = <&syscon ASPEED_RESET_MII>; 221 }; 222 223 mdio3: mdio@1e650018 { 224 compatible = "aspeed,ast2600-mdio"; 225 reg = <0x1e650018 0x8>; 226 #address-cells = <1>; 227 #size-cells = <0>; 228 status = "disabled"; 229 pinctrl-names = "default"; 230 pinctrl-0 = <&pinctrl_mdio4_default>; 231 resets = <&syscon ASPEED_RESET_MII>; 232 }; 233 234 mac0: ethernet@1e660000 { 235 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 236 reg = <0x1e660000 0x180>; 237 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 238 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>; 239 status = "disabled"; 240 }; 241 242 mac1: ethernet@1e680000 { 243 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 244 reg = <0x1e680000 0x180>; 245 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 246 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>; 247 status = "disabled"; 248 }; 249 250 mac2: ethernet@1e670000 { 251 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 252 reg = <0x1e670000 0x180>; 253 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 254 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>; 255 status = "disabled"; 256 }; 257 258 mac3: ethernet@1e690000 { 259 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 260 reg = <0x1e690000 0x180>; 261 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 262 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>; 263 status = "disabled"; 264 }; 265 266 ehci0: usb@1e6a1000 { 267 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 268 reg = <0x1e6a1000 0x100>; 269 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 270 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 271 pinctrl-names = "default"; 272 pinctrl-0 = <&pinctrl_usb2ah_default>; 273 status = "disabled"; 274 }; 275 276 ehci1: usb@1e6a3000 { 277 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 278 reg = <0x1e6a3000 0x100>; 279 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 280 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 281 pinctrl-names = "default"; 282 pinctrl-0 = <&pinctrl_usb2bh_default>; 283 status = "disabled"; 284 }; 285 286 uhci: usb@1e6b0000 { 287 compatible = "aspeed,ast2600-uhci", "generic-uhci"; 288 reg = <0x1e6b0000 0x100>; 289 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 290 #ports = <2>; 291 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; 292 status = "disabled"; 293 /* 294 * No default pinmux, it will follow EHCI, use an 295 * explicit pinmux override if EHCI is not enabled. 296 */ 297 }; 298 299 vhub: usb-vhub@1e6a0000 { 300 compatible = "aspeed,ast2600-usb-vhub"; 301 reg = <0x1e6a0000 0x350>; 302 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 303 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 304 aspeed,vhub-downstream-ports = <7>; 305 aspeed,vhub-generic-endpoints = <21>; 306 pinctrl-names = "default"; 307 pinctrl-0 = <&pinctrl_usb2ad_default>; 308 status = "disabled"; 309 }; 310 311 udc: usb@1e6a2000 { 312 compatible = "aspeed,ast2600-udc"; 313 reg = <0x1e6a2000 0x300>; 314 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 315 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 316 pinctrl-names = "default"; 317 pinctrl-0 = <&pinctrl_usb2bd_default>; 318 status = "disabled"; 319 }; 320 321 apb { 322 compatible = "simple-bus"; 323 #address-cells = <1>; 324 #size-cells = <1>; 325 ranges; 326 327 hace: crypto@1e6d0000 { 328 compatible = "aspeed,ast2600-hace"; 329 reg = <0x1e6d0000 0x200>; 330 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 331 clocks = <&syscon ASPEED_CLK_GATE_YCLK>; 332 resets = <&syscon ASPEED_RESET_HACE>; 333 }; 334 335 syscon: syscon@1e6e2000 { 336 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd"; 337 reg = <0x1e6e2000 0x1000>; 338 ranges = <0 0x1e6e2000 0x1000>; 339 #address-cells = <1>; 340 #size-cells = <1>; 341 #clock-cells = <1>; 342 #reset-cells = <1>; 343 344 pinctrl: pinctrl { 345 compatible = "aspeed,ast2600-pinctrl"; 346 }; 347 348 silicon-id@14 { 349 compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id"; 350 reg = <0x14 0x4 0x5b0 0x8>; 351 }; 352 353 smp-memram@180 { 354 compatible = "aspeed,ast2600-smpmem"; 355 reg = <0x180 0x40>; 356 }; 357 358 scu_ic0: interrupt-controller@560 { 359 #interrupt-cells = <1>; 360 compatible = "aspeed,ast2600-scu-ic0"; 361 reg = <0x560 0x4>; 362 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 363 interrupt-controller; 364 }; 365 366 scu_ic1: interrupt-controller@570 { 367 #interrupt-cells = <1>; 368 compatible = "aspeed,ast2600-scu-ic1"; 369 reg = <0x570 0x4>; 370 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 371 interrupt-controller; 372 }; 373 }; 374 375 rng: hwrng@1e6e2524 { 376 compatible = "timeriomem_rng"; 377 reg = <0x1e6e2524 0x4>; 378 period = <1>; 379 quality = <100>; 380 }; 381 382 gfx: display@1e6e6000 { 383 compatible = "aspeed,ast2600-gfx", "syscon"; 384 reg = <0x1e6e6000 0x1000>; 385 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; 386 resets = <&syscon ASPEED_RESET_GRAPHICS>; 387 syscon = <&syscon>; 388 status = "disabled"; 389 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 390 }; 391 392 adc0: adc@1e6e9000 { 393 compatible = "aspeed,ast2600-adc0"; 394 reg = <0x1e6e9000 0x100>; 395 clocks = <&syscon ASPEED_CLK_APB2>; 396 resets = <&syscon ASPEED_RESET_ADC>; 397 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 398 #io-channel-cells = <1>; 399 status = "disabled"; 400 }; 401 402 adc1: adc@1e6e9100 { 403 compatible = "aspeed,ast2600-adc1"; 404 reg = <0x1e6e9100 0x100>; 405 clocks = <&syscon ASPEED_CLK_APB2>; 406 resets = <&syscon ASPEED_RESET_ADC>; 407 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 408 #io-channel-cells = <1>; 409 status = "disabled"; 410 }; 411 412 sbc: secure-boot-controller@1e6f2000 { 413 compatible = "aspeed,ast2600-sbc"; 414 reg = <0x1e6f2000 0x1000>; 415 }; 416 417 acry: crypto@1e6fa000 { 418 compatible = "aspeed,ast2600-acry"; 419 reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>; 420 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; 421 clocks = <&syscon ASPEED_CLK_GATE_RSACLK>; 422 aspeed,ahbc = <&ahbc>; 423 }; 424 425 video: video@1e700000 { 426 compatible = "aspeed,ast2600-video-engine"; 427 reg = <0x1e700000 0x1000>; 428 clocks = <&syscon ASPEED_CLK_GATE_VCLK>, 429 <&syscon ASPEED_CLK_GATE_ECLK>; 430 clock-names = "vclk", "eclk"; 431 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 432 status = "disabled"; 433 }; 434 435 gpio0: gpio@1e780000 { 436 #gpio-cells = <2>; 437 gpio-controller; 438 compatible = "aspeed,ast2600-gpio"; 439 reg = <0x1e780000 0x400>; 440 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 441 gpio-ranges = <&pinctrl 0 0 208>; 442 ngpios = <208>; 443 clocks = <&syscon ASPEED_CLK_APB2>; 444 interrupt-controller; 445 #interrupt-cells = <2>; 446 }; 447 448 sgpiom0: sgpiom@1e780500 { 449 #gpio-cells = <2>; 450 gpio-controller; 451 compatible = "aspeed,ast2600-sgpiom"; 452 reg = <0x1e780500 0x100>; 453 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 454 clocks = <&syscon ASPEED_CLK_APB2>; 455 #interrupt-cells = <2>; 456 interrupt-controller; 457 bus-frequency = <12000000>; 458 pinctrl-names = "default"; 459 pinctrl-0 = <&pinctrl_sgpm1_default>; 460 status = "disabled"; 461 }; 462 463 sgpiom1: sgpiom@1e780600 { 464 #gpio-cells = <2>; 465 gpio-controller; 466 compatible = "aspeed,ast2600-sgpiom"; 467 reg = <0x1e780600 0x100>; 468 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 469 clocks = <&syscon ASPEED_CLK_APB2>; 470 #interrupt-cells = <2>; 471 interrupt-controller; 472 bus-frequency = <12000000>; 473 pinctrl-names = "default"; 474 pinctrl-0 = <&pinctrl_sgpm2_default>; 475 status = "disabled"; 476 }; 477 478 gpio1: gpio@1e780800 { 479 #gpio-cells = <2>; 480 gpio-controller; 481 compatible = "aspeed,ast2600-gpio"; 482 reg = <0x1e780800 0x800>; 483 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 484 gpio-ranges = <&pinctrl 0 208 36>; 485 ngpios = <36>; 486 clocks = <&syscon ASPEED_CLK_APB1>; 487 interrupt-controller; 488 #interrupt-cells = <2>; 489 }; 490 491 rtc: rtc@1e781000 { 492 compatible = "aspeed,ast2600-rtc"; 493 reg = <0x1e781000 0x18>; 494 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 495 status = "disabled"; 496 }; 497 498 timer: timer@1e782000 { 499 compatible = "aspeed,ast2600-timer"; 500 reg = <0x1e782000 0x90>; 501 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 502 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 503 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 504 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 505 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, 506 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 507 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, 508 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 509 clocks = <&syscon ASPEED_CLK_APB1>; 510 clock-names = "PCLK"; 511 status = "disabled"; 512 }; 513 514 uart1: serial@1e783000 { 515 compatible = "ns16550a"; 516 reg = <0x1e783000 0x20>; 517 reg-shift = <2>; 518 reg-io-width = <4>; 519 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 520 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>; 521 resets = <&lpc_reset 4>; 522 no-loopback-test; 523 pinctrl-names = "default"; 524 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>; 525 status = "disabled"; 526 }; 527 528 uart5: serial@1e784000 { 529 compatible = "ns16550a"; 530 reg = <0x1e784000 0x1000>; 531 reg-shift = <2>; 532 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 533 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>; 534 no-loopback-test; 535 }; 536 537 wdt1: watchdog@1e785000 { 538 compatible = "aspeed,ast2600-wdt"; 539 reg = <0x1e785000 0x40>; 540 }; 541 542 wdt2: watchdog@1e785040 { 543 compatible = "aspeed,ast2600-wdt"; 544 reg = <0x1e785040 0x40>; 545 status = "disabled"; 546 }; 547 548 wdt3: watchdog@1e785080 { 549 compatible = "aspeed,ast2600-wdt"; 550 reg = <0x1e785080 0x40>; 551 status = "disabled"; 552 }; 553 554 wdt4: watchdog@1e7850c0 { 555 compatible = "aspeed,ast2600-wdt"; 556 reg = <0x1e7850C0 0x40>; 557 status = "disabled"; 558 }; 559 560 peci0: peci-controller@1e78b000 { 561 compatible = "aspeed,ast2600-peci"; 562 reg = <0x1e78b000 0x100>; 563 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 564 clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; 565 resets = <&syscon ASPEED_RESET_PECI>; 566 cmd-timeout-ms = <1000>; 567 clock-frequency = <1000000>; 568 status = "disabled"; 569 }; 570 571 lpc: lpc@1e789000 { 572 compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"; 573 reg = <0x1e789000 0x1000>; 574 575 #address-cells = <1>; 576 #size-cells = <1>; 577 ranges = <0x0 0x1e789000 0x1000>; 578 579 kcs1: kcs@24 { 580 compatible = "aspeed,ast2500-kcs-bmc-v2"; 581 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>; 582 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 583 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 584 kcs_chan = <1>; 585 status = "disabled"; 586 }; 587 588 kcs2: kcs@28 { 589 compatible = "aspeed,ast2500-kcs-bmc-v2"; 590 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>; 591 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 592 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 593 status = "disabled"; 594 }; 595 596 kcs3: kcs@2c { 597 compatible = "aspeed,ast2500-kcs-bmc-v2"; 598 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>; 599 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 600 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 601 status = "disabled"; 602 }; 603 604 kcs4: kcs@114 { 605 compatible = "aspeed,ast2500-kcs-bmc-v2"; 606 reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>; 607 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 608 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 609 status = "disabled"; 610 }; 611 612 lpc_ctrl: lpc-ctrl@80 { 613 compatible = "aspeed,ast2600-lpc-ctrl"; 614 reg = <0x80 0x80>; 615 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 616 status = "disabled"; 617 }; 618 619 lpc_snoop: lpc-snoop@80 { 620 compatible = "aspeed,ast2600-lpc-snoop"; 621 reg = <0x80 0x80>; 622 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 623 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 624 status = "disabled"; 625 }; 626 627 lhc: lhc@a0 { 628 compatible = "aspeed,ast2600-lhc"; 629 reg = <0xa0 0x24 0xc8 0x8>; 630 }; 631 632 lpc_reset: reset-controller@98 { 633 compatible = "aspeed,ast2600-lpc-reset"; 634 reg = <0x98 0x4>; 635 #reset-cells = <1>; 636 }; 637 638 uart_routing: uart-routing@98 { 639 compatible = "aspeed,ast2600-uart-routing"; 640 reg = <0x98 0x8>; 641 status = "disabled"; 642 }; 643 644 ibt: ibt@140 { 645 compatible = "aspeed,ast2600-ibt-bmc"; 646 reg = <0x140 0x18>; 647 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 648 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 649 status = "disabled"; 650 }; 651 }; 652 653 sdc: sdc@1e740000 { 654 compatible = "aspeed,ast2600-sd-controller"; 655 reg = <0x1e740000 0x100>; 656 #address-cells = <1>; 657 #size-cells = <1>; 658 ranges = <0 0x1e740000 0x10000>; 659 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; 660 status = "disabled"; 661 662 sdhci0: sdhci@1e740100 { 663 compatible = "aspeed,ast2600-sdhci"; 664 reg = <0x100 0x100>; 665 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 666 sdhci,auto-cmd12; 667 clocks = <&syscon ASPEED_CLK_SDIO>; 668 status = "disabled"; 669 }; 670 671 sdhci1: sdhci@1e740200 { 672 compatible = "aspeed,ast2600-sdhci"; 673 reg = <0x200 0x100>; 674 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 675 sdhci,auto-cmd12; 676 clocks = <&syscon ASPEED_CLK_SDIO>; 677 status = "disabled"; 678 }; 679 }; 680 681 emmc_controller: sdc@1e750000 { 682 compatible = "aspeed,ast2600-sd-controller"; 683 reg = <0x1e750000 0x100>; 684 #address-cells = <1>; 685 #size-cells = <1>; 686 ranges = <0 0x1e750000 0x10000>; 687 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>; 688 status = "disabled"; 689 690 emmc: sdhci@1e750100 { 691 compatible = "aspeed,ast2600-sdhci"; 692 reg = <0x100 0x100>; 693 sdhci,auto-cmd12; 694 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 695 clocks = <&syscon ASPEED_CLK_EMMC>; 696 pinctrl-names = "default"; 697 pinctrl-0 = <&pinctrl_emmc_default>; 698 }; 699 }; 700 701 vuart1: serial@1e787000 { 702 compatible = "aspeed,ast2500-vuart"; 703 reg = <0x1e787000 0x40>; 704 reg-shift = <2>; 705 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 706 clocks = <&syscon ASPEED_CLK_APB1>; 707 no-loopback-test; 708 status = "disabled"; 709 }; 710 711 vuart3: serial@1e787800 { 712 compatible = "aspeed,ast2500-vuart"; 713 reg = <0x1e787800 0x40>; 714 reg-shift = <2>; 715 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; 716 clocks = <&syscon ASPEED_CLK_APB2>; 717 no-loopback-test; 718 status = "disabled"; 719 }; 720 721 vuart2: serial@1e788000 { 722 compatible = "aspeed,ast2500-vuart"; 723 reg = <0x1e788000 0x40>; 724 reg-shift = <2>; 725 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 726 clocks = <&syscon ASPEED_CLK_APB1>; 727 no-loopback-test; 728 status = "disabled"; 729 }; 730 731 vuart4: serial@1e788800 { 732 compatible = "aspeed,ast2500-vuart"; 733 reg = <0x1e788800 0x40>; 734 reg-shift = <2>; 735 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; 736 clocks = <&syscon ASPEED_CLK_APB2>; 737 no-loopback-test; 738 status = "disabled"; 739 }; 740 741 uart2: serial@1e78d000 { 742 compatible = "ns16550a"; 743 reg = <0x1e78d000 0x20>; 744 reg-shift = <2>; 745 reg-io-width = <4>; 746 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 747 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>; 748 resets = <&lpc_reset 5>; 749 no-loopback-test; 750 pinctrl-names = "default"; 751 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; 752 status = "disabled"; 753 }; 754 755 uart3: serial@1e78e000 { 756 compatible = "ns16550a"; 757 reg = <0x1e78e000 0x20>; 758 reg-shift = <2>; 759 reg-io-width = <4>; 760 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 761 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>; 762 resets = <&lpc_reset 6>; 763 no-loopback-test; 764 pinctrl-names = "default"; 765 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>; 766 status = "disabled"; 767 }; 768 769 uart4: serial@1e78f000 { 770 compatible = "ns16550a"; 771 reg = <0x1e78f000 0x20>; 772 reg-shift = <2>; 773 reg-io-width = <4>; 774 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 775 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>; 776 resets = <&lpc_reset 7>; 777 no-loopback-test; 778 pinctrl-names = "default"; 779 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>; 780 status = "disabled"; 781 }; 782 783 uart6: serial@1e790000 { 784 compatible = "ns16550a"; 785 reg = <0x1e790000 0x20>; 786 reg-shift = <2>; 787 reg-io-width = <4>; 788 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 789 clocks = <&syscon ASPEED_CLK_GATE_UART6CLK>; 790 no-loopback-test; 791 pinctrl-names = "default"; 792 pinctrl-0 = <&pinctrl_uart6_default>; 793 794 status = "disabled"; 795 }; 796 797 uart7: serial@1e790100 { 798 compatible = "ns16550a"; 799 reg = <0x1e790100 0x20>; 800 reg-shift = <2>; 801 reg-io-width = <4>; 802 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 803 clocks = <&syscon ASPEED_CLK_GATE_UART7CLK>; 804 no-loopback-test; 805 pinctrl-names = "default"; 806 pinctrl-0 = <&pinctrl_uart7_default>; 807 808 status = "disabled"; 809 }; 810 811 uart8: serial@1e790200 { 812 compatible = "ns16550a"; 813 reg = <0x1e790200 0x20>; 814 reg-shift = <2>; 815 reg-io-width = <4>; 816 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 817 clocks = <&syscon ASPEED_CLK_GATE_UART8CLK>; 818 no-loopback-test; 819 pinctrl-names = "default"; 820 pinctrl-0 = <&pinctrl_uart8_default>; 821 822 status = "disabled"; 823 }; 824 825 uart9: serial@1e790300 { 826 compatible = "ns16550a"; 827 reg = <0x1e790300 0x20>; 828 reg-shift = <2>; 829 reg-io-width = <4>; 830 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; 831 clocks = <&syscon ASPEED_CLK_GATE_UART9CLK>; 832 no-loopback-test; 833 pinctrl-names = "default"; 834 pinctrl-0 = <&pinctrl_uart9_default>; 835 836 status = "disabled"; 837 }; 838 839 i2c: bus@1e78a000 { 840 compatible = "simple-bus"; 841 #address-cells = <1>; 842 #size-cells = <1>; 843 ranges = <0 0x1e78a000 0x1000>; 844 }; 845 846 fsim0: fsi@1e79b000 { 847 #interrupt-cells = <1>; 848 compatible = "aspeed,ast2600-fsi-master"; 849 reg = <0x1e79b000 0x94>; 850 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 851 pinctrl-names = "default"; 852 pinctrl-0 = <&pinctrl_fsi1_default>; 853 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 854 interrupt-controller; 855 status = "disabled"; 856 }; 857 858 fsim1: fsi@1e79b100 { 859 #interrupt-cells = <1>; 860 compatible = "aspeed,ast2600-fsi-master"; 861 reg = <0x1e79b100 0x94>; 862 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 863 pinctrl-names = "default"; 864 pinctrl-0 = <&pinctrl_fsi2_default>; 865 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 866 interrupt-controller; 867 status = "disabled"; 868 }; 869 870 udma: dma-controller@1e79e000 { 871 compatible = "aspeed,ast2600-udma"; 872 reg = <0x1e79e000 0x1000>; 873 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 874 dma-channels = <28>; 875 #dma-cells = <1>; 876 status = "disabled"; 877 }; 878 }; 879 }; 880}; 881 882#include "aspeed-g6-pinctrl.dtsi" 883 884&i2c { 885 i2c0: i2c@80 { 886 #address-cells = <1>; 887 #size-cells = <0>; 888 reg = <0x80 0x80>; 889 compatible = "aspeed,ast2600-i2c-bus"; 890 clocks = <&syscon ASPEED_CLK_APB2>; 891 resets = <&syscon ASPEED_RESET_I2C>; 892 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 893 bus-frequency = <100000>; 894 pinctrl-names = "default"; 895 pinctrl-0 = <&pinctrl_i2c1_default>; 896 status = "disabled"; 897 }; 898 899 i2c1: i2c@100 { 900 #address-cells = <1>; 901 #size-cells = <0>; 902 reg = <0x100 0x80>; 903 compatible = "aspeed,ast2600-i2c-bus"; 904 clocks = <&syscon ASPEED_CLK_APB2>; 905 resets = <&syscon ASPEED_RESET_I2C>; 906 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 907 bus-frequency = <100000>; 908 pinctrl-names = "default"; 909 pinctrl-0 = <&pinctrl_i2c2_default>; 910 status = "disabled"; 911 }; 912 913 i2c2: i2c@180 { 914 #address-cells = <1>; 915 #size-cells = <0>; 916 reg = <0x180 0x80>; 917 compatible = "aspeed,ast2600-i2c-bus"; 918 clocks = <&syscon ASPEED_CLK_APB2>; 919 resets = <&syscon ASPEED_RESET_I2C>; 920 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 921 bus-frequency = <100000>; 922 pinctrl-names = "default"; 923 pinctrl-0 = <&pinctrl_i2c3_default>; 924 status = "disabled"; 925 }; 926 927 i2c3: i2c@200 { 928 #address-cells = <1>; 929 #size-cells = <0>; 930 reg = <0x200 0x80>; 931 compatible = "aspeed,ast2600-i2c-bus"; 932 clocks = <&syscon ASPEED_CLK_APB2>; 933 resets = <&syscon ASPEED_RESET_I2C>; 934 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 935 bus-frequency = <100000>; 936 pinctrl-names = "default"; 937 pinctrl-0 = <&pinctrl_i2c4_default>; 938 status = "disabled"; 939 }; 940 941 i2c4: i2c@280 { 942 #address-cells = <1>; 943 #size-cells = <0>; 944 reg = <0x280 0x80>; 945 compatible = "aspeed,ast2600-i2c-bus"; 946 clocks = <&syscon ASPEED_CLK_APB2>; 947 resets = <&syscon ASPEED_RESET_I2C>; 948 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 949 bus-frequency = <100000>; 950 pinctrl-names = "default"; 951 pinctrl-0 = <&pinctrl_i2c5_default>; 952 status = "disabled"; 953 }; 954 955 i2c5: i2c@300 { 956 #address-cells = <1>; 957 #size-cells = <0>; 958 reg = <0x300 0x80>; 959 compatible = "aspeed,ast2600-i2c-bus"; 960 clocks = <&syscon ASPEED_CLK_APB2>; 961 resets = <&syscon ASPEED_RESET_I2C>; 962 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 963 bus-frequency = <100000>; 964 pinctrl-names = "default"; 965 pinctrl-0 = <&pinctrl_i2c6_default>; 966 status = "disabled"; 967 }; 968 969 i2c6: i2c@380 { 970 #address-cells = <1>; 971 #size-cells = <0>; 972 reg = <0x380 0x80>; 973 compatible = "aspeed,ast2600-i2c-bus"; 974 clocks = <&syscon ASPEED_CLK_APB2>; 975 resets = <&syscon ASPEED_RESET_I2C>; 976 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 977 bus-frequency = <100000>; 978 pinctrl-names = "default"; 979 pinctrl-0 = <&pinctrl_i2c7_default>; 980 status = "disabled"; 981 }; 982 983 i2c7: i2c@400 { 984 #address-cells = <1>; 985 #size-cells = <0>; 986 reg = <0x400 0x80>; 987 compatible = "aspeed,ast2600-i2c-bus"; 988 clocks = <&syscon ASPEED_CLK_APB2>; 989 resets = <&syscon ASPEED_RESET_I2C>; 990 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 991 bus-frequency = <100000>; 992 pinctrl-names = "default"; 993 pinctrl-0 = <&pinctrl_i2c8_default>; 994 status = "disabled"; 995 }; 996 997 i2c8: i2c@480 { 998 #address-cells = <1>; 999 #size-cells = <0>; 1000 reg = <0x480 0x80>; 1001 compatible = "aspeed,ast2600-i2c-bus"; 1002 clocks = <&syscon ASPEED_CLK_APB2>; 1003 resets = <&syscon ASPEED_RESET_I2C>; 1004 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1005 bus-frequency = <100000>; 1006 pinctrl-names = "default"; 1007 pinctrl-0 = <&pinctrl_i2c9_default>; 1008 status = "disabled"; 1009 }; 1010 1011 i2c9: i2c@500 { 1012 #address-cells = <1>; 1013 #size-cells = <0>; 1014 reg = <0x500 0x80>; 1015 compatible = "aspeed,ast2600-i2c-bus"; 1016 clocks = <&syscon ASPEED_CLK_APB2>; 1017 resets = <&syscon ASPEED_RESET_I2C>; 1018 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 1019 bus-frequency = <100000>; 1020 pinctrl-names = "default"; 1021 pinctrl-0 = <&pinctrl_i2c10_default>; 1022 status = "disabled"; 1023 }; 1024 1025 i2c10: i2c@580 { 1026 #address-cells = <1>; 1027 #size-cells = <0>; 1028 reg = <0x580 0x80>; 1029 compatible = "aspeed,ast2600-i2c-bus"; 1030 clocks = <&syscon ASPEED_CLK_APB2>; 1031 resets = <&syscon ASPEED_RESET_I2C>; 1032 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 1033 bus-frequency = <100000>; 1034 pinctrl-names = "default"; 1035 pinctrl-0 = <&pinctrl_i2c11_default>; 1036 status = "disabled"; 1037 }; 1038 1039 i2c11: i2c@600 { 1040 #address-cells = <1>; 1041 #size-cells = <0>; 1042 reg = <0x600 0x80>; 1043 compatible = "aspeed,ast2600-i2c-bus"; 1044 clocks = <&syscon ASPEED_CLK_APB2>; 1045 resets = <&syscon ASPEED_RESET_I2C>; 1046 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 1047 bus-frequency = <100000>; 1048 pinctrl-names = "default"; 1049 pinctrl-0 = <&pinctrl_i2c12_default>; 1050 status = "disabled"; 1051 }; 1052 1053 i2c12: i2c@680 { 1054 #address-cells = <1>; 1055 #size-cells = <0>; 1056 reg = <0x680 0x80>; 1057 compatible = "aspeed,ast2600-i2c-bus"; 1058 clocks = <&syscon ASPEED_CLK_APB2>; 1059 resets = <&syscon ASPEED_RESET_I2C>; 1060 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 1061 bus-frequency = <100000>; 1062 pinctrl-names = "default"; 1063 pinctrl-0 = <&pinctrl_i2c13_default>; 1064 status = "disabled"; 1065 }; 1066 1067 i2c13: i2c@700 { 1068 #address-cells = <1>; 1069 #size-cells = <0>; 1070 reg = <0x700 0x80>; 1071 compatible = "aspeed,ast2600-i2c-bus"; 1072 clocks = <&syscon ASPEED_CLK_APB2>; 1073 resets = <&syscon ASPEED_RESET_I2C>; 1074 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 1075 bus-frequency = <100000>; 1076 pinctrl-names = "default"; 1077 pinctrl-0 = <&pinctrl_i2c14_default>; 1078 status = "disabled"; 1079 }; 1080 1081 i2c14: i2c@780 { 1082 #address-cells = <1>; 1083 #size-cells = <0>; 1084 reg = <0x780 0x80>; 1085 compatible = "aspeed,ast2600-i2c-bus"; 1086 clocks = <&syscon ASPEED_CLK_APB2>; 1087 resets = <&syscon ASPEED_RESET_I2C>; 1088 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; 1089 bus-frequency = <100000>; 1090 pinctrl-names = "default"; 1091 pinctrl-0 = <&pinctrl_i2c15_default>; 1092 status = "disabled"; 1093 }; 1094 1095 i2c15: i2c@800 { 1096 #address-cells = <1>; 1097 #size-cells = <0>; 1098 reg = <0x800 0x80>; 1099 compatible = "aspeed,ast2600-i2c-bus"; 1100 clocks = <&syscon ASPEED_CLK_APB2>; 1101 resets = <&syscon ASPEED_RESET_I2C>; 1102 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 1103 bus-frequency = <100000>; 1104 pinctrl-names = "default"; 1105 pinctrl-0 = <&pinctrl_i2c16_default>; 1106 status = "disabled"; 1107 }; 1108};
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