output_format.rst

  1.. SPDX-License-Identifier: GPL-2.0
  2
  3==================
  4APEI output format
  5==================
  6
  7APEI uses printk as hardware error reporting interface, the output
  8format is as follow::
  9
 10        <error record> :=
 11        APEI generic hardware error status
 12        severity: <integer>, <severity string>
 13        section: <integer>, severity: <integer>, <severity string>
 14        flags: <integer>
 15        <section flags strings>
 16        fru_id: <uuid string>
 17        fru_text: <string>
 18        section_type: <section type string>
 19        <section data>
 20
 21        <severity string>* := recoverable | fatal | corrected | info
 22
 23        <section flags strings># :=
 24        [primary][, containment warning][, reset][, threshold exceeded]\
 25        [, resource not accessible][, latent error]
 26
 27        <section type string> := generic processor error | memory error | \
 28        PCIe error | unknown, <uuid string>
 29
 30        <section data> :=
 31        <generic processor section data> | <memory section data> | \
 32        <pcie section data> | <null>
 33
 34        <generic processor section data> :=
 35        [processor_type: <integer>, <proc type string>]
 36        [processor_isa: <integer>, <proc isa string>]
 37        [error_type: <integer>
 38        <proc error type strings>]
 39        [operation: <integer>, <proc operation string>]
 40        [flags: <integer>
 41        <proc flags strings>]
 42        [level: <integer>]
 43        [version_info: <integer>]
 44        [processor_id: <integer>]
 45        [target_address: <integer>]
 46        [requestor_id: <integer>]
 47        [responder_id: <integer>]
 48        [IP: <integer>]
 49
 50        <proc type string>* := IA32/X64 | IA64
 51
 52        <proc isa string>* := IA32 | IA64 | X64
 53
 54        <processor error type strings># :=
 55        [cache error][, TLB error][, bus error][, micro-architectural error]
 56
 57        <proc operation string>* := unknown or generic | data read | data write | \
 58        instruction execution
 59
 60        <proc flags strings># :=
 61        [restartable][, precise IP][, overflow][, corrected]
 62
 63        <memory section data> :=
 64        [error_status: <integer>]
 65        [physical_address: <integer>]
 66        [physical_address_mask: <integer>]
 67        [node: <integer>]
 68        [card: <integer>]
 69        [module: <integer>]
 70        [bank: <integer>]
 71        [device: <integer>]
 72        [row: <integer>]
 73        [column: <integer>]
 74        [bit_position: <integer>]
 75        [requestor_id: <integer>]
 76        [responder_id: <integer>]
 77        [target_id: <integer>]
 78        [error_type: <integer>, <mem error type string>]
 79
 80        <mem error type string>* :=
 81        unknown | no error | single-bit ECC | multi-bit ECC | \
 82        single-symbol chipkill ECC | multi-symbol chipkill ECC | master abort | \
 83        target abort | parity error | watchdog timeout | invalid address | \
 84        mirror Broken | memory sparing | scrub corrected error | \
 85        scrub uncorrected error
 86
 87        <pcie section data> :=
 88        [port_type: <integer>, <pcie port type string>]
 89        [version: <integer>.<integer>]
 90        [command: <integer>, status: <integer>]
 91        [device_id: <integer>:<integer>:<integer>.<integer>
 92        slot: <integer>
 93        secondary_bus: <integer>
 94        vendor_id: <integer>, device_id: <integer>
 95        class_code: <integer>]
 96        [serial number: <integer>, <integer>]
 97        [bridge: secondary_status: <integer>, control: <integer>]
 98        [aer_status: <integer>, aer_mask: <integer>
 99        <aer status string>
100        [aer_uncor_severity: <integer>]
101        aer_layer=<aer layer string>, aer_agent=<aer agent string>
102        aer_tlp_header: <integer> <integer> <integer> <integer>]
103
104        <pcie port type string>* := PCIe end point | legacy PCI end point | \
105        unknown | unknown | root port | upstream switch port | \
106        downstream switch port | PCIe to PCI/PCI-X bridge | \
107        PCI/PCI-X to PCIe bridge | root complex integrated endpoint device | \
108        root complex event collector
109
110        if section severity is fatal or recoverable
111        <aer status string># :=
112        unknown | unknown | unknown | unknown | Data Link Protocol | \
113        unknown | unknown | unknown | unknown | unknown | unknown | unknown | \
114        Poisoned TLP | Flow Control Protocol | Completion Timeout | \
115        Completer Abort | Unexpected Completion | Receiver Overflow | \
116        Malformed TLP | ECRC | Unsupported Request
117        else
118        <aer status string># :=
119        Receiver Error | unknown | unknown | unknown | unknown | unknown | \
120        Bad TLP | Bad DLLP | RELAY_NUM Rollover | unknown | unknown | unknown | \
121        Replay Timer Timeout | Advisory Non-Fatal
122        fi
123
124        <aer layer string> :=
125        Physical Layer | Data Link Layer | Transaction Layer
126
127        <aer agent string> :=
128        Receiver ID | Requester ID | Completer ID | Transmitter ID
129
130Where, [] designate corresponding content is optional
131
132All <field string> description with * has the following format::
133
134        field: <integer>, <field string>
135
136Where value of <integer> should be the position of "string" in <field
137string> description. Otherwise, <field string> will be "unknown".
138
139All <field strings> description with # has the following format::
140
141        field: <integer>
142        <field strings>
143
144Where each string in <fields strings> corresponding to one set bit of
145<integer>. The bit position is the position of "string" in <field
146strings> description.
147
148For more detailed explanation of every field, please refer to UEFI
149specification version 2.3 or later, section Appendix N: Common
150Platform Error Record.