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renesas,rzg2l-wdt.yaml
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linux-6.19.14/Documentation/devicetree/bindings/watchdog/renesas,rzg2l-wdt.yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/watchdog/renesas,rzg2l-wdt.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas RZ/G2L Watchdog Timer (WDT) Controller 8 9maintainers: 10 - Biju Das <biju.das.jz@bp.renesas.com> 11 12properties: 13 compatible: 14 oneOf: 15 - items: 16 - enum: 17 - renesas,r9a07g043-wdt # RZ/G2UL and RZ/Five 18 - renesas,r9a07g044-wdt # RZ/G2{L,LC} 19 - renesas,r9a07g054-wdt # RZ/V2L 20 - renesas,r9a08g045-wdt # RZ/G3S 21 - const: renesas,rzg2l-wdt 22 23 - items: 24 - const: renesas,r9a09g011-wdt # RZ/V2M 25 - const: renesas,rzv2m-wdt # RZ/V2M 26 27 reg: 28 maxItems: 1 29 30 interrupts: 31 minItems: 1 32 items: 33 - description: Timeout 34 - description: Parity error 35 36 interrupt-names: 37 minItems: 1 38 items: 39 - const: wdt 40 - const: perrout 41 42 clocks: 43 items: 44 - description: Register access clock 45 - description: Main clock 46 47 clock-names: 48 items: 49 - const: pclk 50 - const: oscclk 51 52 power-domains: 53 maxItems: 1 54 55 resets: 56 maxItems: 1 57 58 timeout-sec: true 59 60required: 61 - compatible 62 - reg 63 - interrupts 64 - clocks 65 - clock-names 66 - power-domains 67 - resets 68 69allOf: 70 - $ref: watchdog.yaml# 71 72 - if: 73 properties: 74 compatible: 75 contains: 76 const: renesas,rzg2l-wdt 77 then: 78 properties: 79 interrupts: 80 minItems: 2 81 interrupt-names: 82 minItems: 2 83 required: 84 - interrupt-names 85 else: 86 properties: 87 interrupts: 88 maxItems: 1 89 interrupt-names: 90 maxItems: 1 91 92additionalProperties: false 93 94examples: 95 - | 96 #include <dt-bindings/clock/r9a07g044-cpg.h> 97 #include <dt-bindings/interrupt-controller/arm-gic.h> 98 99 watchdog@12800800 { 100 compatible = "renesas,r9a07g044-wdt", 101 "renesas,rzg2l-wdt"; 102 reg = <0x12800800 0x400>; 103 clocks = <&cpg CPG_MOD R9A07G044_WDT0_PCLK>, 104 <&cpg CPG_MOD R9A07G044_WDT0_CLK>; 105 clock-names = "pclk", "oscclk"; 106 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 107 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 108 interrupt-names = "wdt", "perrout"; 109 resets = <&cpg R9A07G044_WDT0_PRESETN>; 110 power-domains = <&cpg>; 111 };
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