aspeed,ast2400-wdt.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/watchdog/aspeed,ast2400-wdt.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Aspeed watchdog timer controllers
  8
  9maintainers:
 10  - Andrew Jeffery <andrew@codeconstruct.com.au>
 11
 12properties:
 13  compatible:
 14    enum:
 15      - aspeed,ast2400-wdt
 16      - aspeed,ast2500-wdt
 17      - aspeed,ast2600-wdt
 18      - aspeed,ast2700-wdt
 19
 20  reg:
 21    maxItems: 1
 22
 23  clocks:
 24    maxItems: 1
 25    description: >
 26      The clock used to drive the watchdog counter. From the AST2500 no source
 27      other than the 1MHz clock can be selected, so the clocks property is
 28      optional.
 29
 30  aspeed,reset-type:
 31    $ref: /schemas/types.yaml#/definitions/string
 32    enum:
 33      - cpu
 34      - soc
 35      - system
 36      - none
 37    default: system
 38    description: >
 39      The watchdog can be programmed to generate one of three different types of
 40      reset when a timeout occcurs.
 41
 42      Specifying 'cpu' will only reset the processor on a timeout event.
 43
 44      Specifying 'soc' will reset a configurable subset of the SoC's controllers
 45      on a timeout event. Controllers critical to the SoC's operation may remain
 46      untouched. The set of SoC controllers to reset may be specified via the
 47      aspeed,reset-mask property if the node has the aspeed,ast2500-wdt or
 48      aspeed,ast2600-wdt compatible.
 49
 50      Specifying 'system' will reset all controllers on a timeout event, as if
 51      EXTRST had been asserted.
 52
 53      Specifying 'none' will cause the timeout event to have no reset effect.
 54      Another watchdog engine on the chip must be used for chip reset operations.
 55
 56  aspeed,alt-boot:
 57    $ref: /schemas/types.yaml#/definitions/flag
 58    description: >
 59      Direct the watchdog to configure the SoC to boot from the alternative boot
 60      region if a timeout occurs.
 61
 62  aspeed,external-signal:
 63    $ref: /schemas/types.yaml#/definitions/flag
 64    description: >
 65      Assert the timeout event on an external signal pin associated with the
 66      watchdog controller instance. The pin must be muxed appropriately.
 67
 68  aspeed,ext-pulse-duration:
 69    $ref: /schemas/types.yaml#/definitions/uint32
 70    description: >
 71      The duration, in microseconds, of the pulse emitted on the external signal
 72      pin.
 73
 74  aspeed,ext-push-pull:
 75    $ref: /schemas/types.yaml#/definitions/flag
 76    description: >
 77      If aspeed,external-signal is specified in the node, set the external
 78      signal pin's drive type to push-pull. If aspeed,ext-push-pull is not
 79      specified then the pin is configured as open-drain.
 80
 81  aspeed,ext-active-high:
 82    $ref: /schemas/types.yaml#/definitions/flag
 83    description: >
 84      If both aspeed,external-signal and aspeed,ext-push-pull are specified in
 85      the node, set the pulse polarity to active-high. If aspeed,ext-active-high
 86      is not specified then the pin is configured as active-low.
 87
 88  aspeed,reset-mask:
 89    $ref: /schemas/types.yaml#/definitions/uint32-array
 90    minItems: 1
 91    maxItems: 5
 92    description: >
 93      A bitmask indicating which peripherals will be reset if the watchdog
 94      timer expires. On AST2500 SoCs this should be a single word defined using
 95      the AST2500_WDT_RESET_* macros; on AST2600 SoCs this should be a two-word
 96      array with the first word defined using the AST2600_WDT_RESET1_* macros,
 97      and the second word defined using the AST2600_WDT_RESET2_* macros; on
 98      AST2700 SoCs, this should be five-word array from AST2700_WDT_RESET1_*
 99      macros to AST2700_WDT_RESET5_* macros.
100
101required:
102  - compatible
103  - reg
104
105allOf:
106  - if:
107      anyOf:
108        - required:
109            - aspeed,ext-push-pull
110        - required:
111            - aspeed,ext-active-high
112        - required:
113            - aspeed,reset-mask
114    then:
115      properties:
116        compatible:
117          enum:
118            - aspeed,ast2500-wdt
119            - aspeed,ast2600-wdt
120            - aspeed,ast2700-wdt
121  - if:
122      required:
123        - aspeed,ext-active-high
124    then:
125      required:
126        - aspeed,ext-push-pull
127
128additionalProperties: false
129
130examples:
131  - |
132    watchdog@1e785000 {
133        compatible = "aspeed,ast2400-wdt";
134        reg = <0x1e785000 0x1c>;
135        aspeed,reset-type = "system";
136        aspeed,external-signal;
137    };
138  - |
139    #include <dt-bindings/watchdog/aspeed-wdt.h>
140    watchdog@1e785040 {
141        compatible = "aspeed,ast2600-wdt";
142        reg = <0x1e785040 0x40>;
143        aspeed,reset-type = "soc";
144        aspeed,reset-mask = <AST2600_WDT_RESET1_DEFAULT
145                            (AST2600_WDT_RESET2_DEFAULT & ~AST2600_WDT_RESET2_LPC)>;
146    };