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onnn,nb7vpq904m.yaml

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linux-6.19.14/Documentation/devicetree/bindings/usb/onnn,nb7vpq904m.yaml YAML
  1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/usb/onnn,nb7vpq904m.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: ON Semiconductor Type-C DisplayPort ALT Mode Linear Redriver
  8
  9maintainers:
 10  - Neil Armstrong <neil.armstrong@linaro.org>
 11
 12properties:
 13  compatible:
 14    enum:
 15      - onnn,nb7vpq904m
 16
 17  reg:
 18    maxItems: 1
 19
 20  vcc-supply:
 21    description: power supply (1.8V)
 22
 23  enable-gpios: true
 24  orientation-switch: true
 25  retimer-switch: true
 26
 27  ports:
 28    $ref: /schemas/graph.yaml#/properties/ports
 29    properties:
 30      port@0:
 31        $ref: /schemas/graph.yaml#/properties/port
 32        description: Super Speed (SS) Output endpoint to the Type-C connector
 33
 34      port@1:
 35        $ref: /schemas/graph.yaml#/$defs/port-base
 36        description: Super Speed (SS) Input endpoint from the Super-Speed PHY
 37        unevaluatedProperties: false
 38
 39        properties:
 40          endpoint:
 41            $ref: /schemas/graph.yaml#/$defs/endpoint-base
 42            unevaluatedProperties: false
 43
 44            properties:
 45              data-lanes:
 46                $ref: /schemas/types.yaml#/definitions/uint32-array
 47                description: |
 48                  An array of physical data lane indexes. Position determines how
 49                  lanes are connected to the redriver, It is assumed the same order
 50                  is kept on the other side of the redriver.
 51                  Lane number represents the following
 52                  - 0 is RX2 lane
 53                  - 1 is TX2 lane
 54                  - 2 is TX1 lane
 55                  - 3 is RX1 lane
 56                  The position determines the physical port of the redriver, in the
 57                  order A, B, C & D.
 58                oneOf:
 59                  - items:
 60                      - const: 0
 61                      - const: 1
 62                      - const: 2
 63                      - const: 3
 64                    description: |
 65                      This is the lanes default layout
 66                      - Port A to RX2 lane
 67                      - Port B to TX2 lane
 68                      - Port C to TX1 lane
 69                      - Port D to RX1 lane
 70                  - items:
 71                      - const: 3
 72                      - const: 2
 73                      - const: 1
 74                      - const: 0
 75                    description: |
 76                      This is the USBRX2/USBTX2 and USBRX1/USBTX1 swapped lanes layout
 77                      - Port A to RX1 lane
 78                      - Port B to TX1 lane
 79                      - Port C to TX2 lane
 80                      - Port D to RX2 lane
 81
 82      port@2:
 83        $ref: /schemas/graph.yaml#/properties/port
 84        description:
 85          Sideband Use (SBU) AUX lines endpoint to the Type-C connector for the purpose of
 86          handling altmode muxing and orientation switching.
 87
 88required:
 89  - compatible
 90  - reg
 91
 92allOf:
 93  - $ref: usb-switch.yaml#
 94  - $ref: usb-switch-ports.yaml#
 95
 96additionalProperties: false
 97
 98examples:
 99  - |
100    i2c {
101        #address-cells = <1>;
102        #size-cells = <0>;
103
104        typec-mux@32 {
105            compatible = "onnn,nb7vpq904m";
106            reg = <0x32>;
107
108            vcc-supply = <&vreg_l15b_1p8>;
109
110            retimer-switch;
111            orientation-switch;
112
113            ports {
114                #address-cells = <1>;
115                #size-cells = <0>;
116
117                port@0 {
118                    reg = <0>;
119                    usb_con_ss: endpoint {
120                        remote-endpoint = <&typec_con_ss>;
121                    };
122                };
123                port@1 {
124                    reg = <1>;
125                    phy_con_ss: endpoint {
126                        remote-endpoint = <&usb_phy_ss>;
127                        data-lanes = <3 2 1 0>;
128                    };
129                };
130                port@2 {
131                    reg = <2>;
132                    usb_con_sbu: endpoint {
133                        remote-endpoint = <&typec_dp_aux>;
134                    };
135                };
136            };
137        };
138    };
139...
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