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samsung,exynos-ufs.yaml
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linux-6.19.14/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Samsung SoC series UFS host controller 8 9maintainers: 10 - Alim Akhtar <alim.akhtar@samsung.com> 11 12description: | 13 Each Samsung UFS host controller instance should have its own node. 14 15properties: 16 compatible: 17 enum: 18 - google,gs101-ufs 19 - samsung,exynos7-ufs 20 - samsung,exynosautov9-ufs 21 - samsung,exynosautov9-ufs-vh 22 - tesla,fsd-ufs 23 24 reg: 25 items: 26 - description: HCI register 27 - description: vendor specific register 28 - description: unipro register 29 - description: UFS protector register 30 31 reg-names: 32 items: 33 - const: hci 34 - const: vs_hci 35 - const: unipro 36 - const: ufsp 37 38 clocks: 39 minItems: 2 40 items: 41 - description: ufs link core clock 42 - description: unipro main clock 43 - description: fmp clock 44 - description: ufs aclk clock 45 - description: ufs pclk clock 46 - description: sysreg clock 47 48 clock-names: 49 minItems: 2 50 items: 51 - const: core_clk 52 - const: sclk_unipro_main 53 - const: fmp 54 - const: aclk 55 - const: pclk 56 - const: sysreg 57 58 phys: 59 maxItems: 1 60 61 phy-names: 62 const: ufs-phy 63 64 power-domains: 65 maxItems: 1 66 67 samsung,sysreg: 68 $ref: /schemas/types.yaml#/definitions/phandle-array 69 items: 70 - items: 71 - description: phandle to FSYSx sysreg node 72 - description: offset of the control register for UFS io coherency setting 73 description: 74 Phandle and offset to the FSYSx sysreg for UFS io coherency setting. 75 76 dma-coherent: true 77 78required: 79 - compatible 80 - reg 81 - phys 82 - phy-names 83 - clocks 84 - clock-names 85 86allOf: 87 - $ref: ufs-common.yaml 88 - if: 89 properties: 90 compatible: 91 contains: 92 const: google,gs101-ufs 93 94 then: 95 properties: 96 clocks: 97 minItems: 6 98 99 clock-names: 100 minItems: 6 101 102 else: 103 properties: 104 clocks: 105 maxItems: 2 106 107 clock-names: 108 maxItems: 2 109 110unevaluatedProperties: false 111 112examples: 113 - | 114 #include <dt-bindings/interrupt-controller/arm-gic.h> 115 #include <dt-bindings/clock/exynos7-clk.h> 116 117 ufs: ufs@15570000 { 118 compatible = "samsung,exynos7-ufs"; 119 reg = <0x15570000 0x100>, 120 <0x15570100 0x100>, 121 <0x15571000 0x200>, 122 <0x15572000 0x300>; 123 reg-names = "hci", "vs_hci", "unipro", "ufsp"; 124 interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; 125 clocks = <&clock_fsys1 ACLK_UFS20_LINK>, 126 <&clock_fsys1 SCLK_UFSUNIPRO20_USER>; 127 clock-names = "core_clk", "sclk_unipro_main"; 128 pinctrl-names = "default"; 129 pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; 130 phys = <&ufs_phy>; 131 phy-names = "ufs-phy"; 132 }; 133...
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