actions,owl-timer.yaml

  1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/timer/actions,owl-timer.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Actions Semi Owl timer
  8
  9maintainers:
 10  - Andreas Färber <afaerber@suse.de>
 11
 12description:
 13  Actions Semi Owl SoCs provide 32bit and 2Hz timers.
 14  The 32bit timers support dynamic irq, as well as one-shot mode.
 15
 16properties:
 17  compatible:
 18    enum:
 19      - actions,s500-timer
 20      - actions,s700-timer
 21      - actions,s900-timer
 22
 23  clocks:
 24    maxItems: 1
 25
 26  interrupts:
 27    minItems: 1
 28    maxItems: 6
 29
 30  interrupt-names:
 31    minItems: 1
 32    maxItems: 6
 33    items:
 34      enum:
 35        - 2hz0
 36        - 2hz1
 37        - timer0
 38        - timer1
 39        - timer2
 40        - timer3
 41
 42  reg:
 43    maxItems: 1
 44
 45required:
 46  - compatible
 47  - clocks
 48  - interrupts
 49  - interrupt-names
 50  - reg
 51
 52allOf:
 53  - if:
 54      properties:
 55        compatible:
 56          contains:
 57            enum:
 58              - actions,s500-timer
 59    then:
 60      properties:
 61        interrupts:
 62          minItems: 4
 63          maxItems: 4
 64        interrupt-names:
 65          items:
 66            - const: 2hz0
 67            - const: 2hz1
 68            - const: timer0
 69            - const: timer1
 70
 71  - if:
 72      properties:
 73        compatible:
 74          contains:
 75            enum:
 76              - actions,s700-timer
 77              - actions,s900-timer
 78    then:
 79      properties:
 80        interrupts:
 81          minItems: 1
 82          maxItems: 1
 83        interrupt-names:
 84          items:
 85            - const: timer1
 86
 87additionalProperties: false
 88
 89examples:
 90  - |
 91    #include <dt-bindings/interrupt-controller/arm-gic.h>
 92    #include <dt-bindings/interrupt-controller/irq.h>
 93    soc {
 94      #address-cells = <1>;
 95      #size-cells = <1>;
 96      timer@b0168000 {
 97        compatible = "actions,s500-timer";
 98        reg = <0xb0168000 0x100>;
 99        clocks = <&hosc>;
100        interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
101                     <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
102                     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
103                     <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
104        interrupt-names = "2hz0", "2hz1", "timer0", "timer1";
105      };
106    };
107...