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renesas,r9a09g047-tsu.yaml
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linux-6.19.14/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/thermal/renesas,r9a09g047-tsu.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas RZ/G3E Temperature Sensor Unit (TSU) 8 9maintainers: 10 - John Madieu <john.madieu.xa@bp.renesas.com> 11 12description: 13 The Temperature Sensor Unit (TSU) is an integrated thermal sensor that 14 monitors the chip temperature on the Renesas RZ/G3E SoC. The TSU provides 15 real-time temperature measurements for thermal management. 16 17properties: 18 compatible: 19 oneOf: 20 - const: renesas,r9a09g047-tsu # RZ/G3E 21 - items: 22 - const: renesas,r9a09g057-tsu # RZ/V2H 23 - const: renesas,r9a09g047-tsu # RZ/G3E 24 25 reg: 26 maxItems: 1 27 28 clocks: 29 maxItems: 1 30 31 resets: 32 maxItems: 1 33 34 power-domains: 35 maxItems: 1 36 37 interrupts: 38 items: 39 - description: Conversion complete interrupt signal (pulse) 40 - description: Comparison result interrupt signal (level) 41 42 interrupt-names: 43 items: 44 - const: adi 45 - const: adcmpi 46 47 "#thermal-sensor-cells": 48 const: 0 49 50 renesas,tsu-trim: 51 $ref: /schemas/types.yaml#/definitions/phandle-array 52 items: 53 - items: 54 - description: phandle to system controller 55 - description: offset of trim registers 56 description: 57 Phandle and offset to the system controller containing the TSU 58 calibration trim values. The offset points to the first trim register 59 (OTPTSU1TRMVAL0), with the second trim register (OTPTSU1TRMVAL1) located 60 at offset + 4. 61 62required: 63 - compatible 64 - reg 65 - clocks 66 - resets 67 - power-domains 68 - interrupts 69 - interrupt-names 70 - "#thermal-sensor-cells" 71 - renesas,tsu-trim 72 73additionalProperties: false 74 75examples: 76 - | 77 #include <dt-bindings/clock/renesas,r9a09g047-cpg.h> 78 #include <dt-bindings/interrupt-controller/arm-gic.h> 79 80 thermal-sensor@14002000 { 81 compatible = "renesas,r9a09g047-tsu"; 82 reg = <0x14002000 0x1000>; 83 clocks = <&cpg CPG_MOD 0x10a>; 84 resets = <&cpg 0xf8>; 85 power-domains = <&cpg>; 86 interrupts = <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>, 87 <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 88 interrupt-names = "adi", "adcmpi"; 89 #thermal-sensor-cells = <0>; 90 renesas,tsu-trim = <&sys 0x330>; 91 };
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