mediatek,lvts-thermal.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: MediaTek SoC Low Voltage Thermal Sensor (LVTS)
  8
  9maintainers:
 10  - Balsam CHIHI <bchihi@baylibre.com>
 11
 12description: |
 13  LVTS is a thermal management architecture composed of three subsystems,
 14  a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU),
 15  a Converter - Low Voltage Thermal Sensor converter (LVTS), and
 16  a Digital controller (LVTS_CTRL).
 17
 18properties:
 19  compatible:
 20    enum:
 21      - mediatek,mt7988-lvts-ap
 22      - mediatek,mt8186-lvts
 23      - mediatek,mt8188-lvts-ap
 24      - mediatek,mt8188-lvts-mcu
 25      - mediatek,mt8192-lvts-ap
 26      - mediatek,mt8192-lvts-mcu
 27      - mediatek,mt8195-lvts-ap
 28      - mediatek,mt8195-lvts-mcu
 29
 30  reg:
 31    maxItems: 1
 32
 33  interrupts:
 34    maxItems: 1
 35
 36  clocks:
 37    maxItems: 1
 38
 39  resets:
 40    maxItems: 1
 41    description: LVTS reset for clearing temporary data on AP/MCU.
 42
 43  nvmem-cells:
 44    minItems: 1
 45    items:
 46      - description: Calibration eFuse data 1 for LVTS
 47      - description: Calibration eFuse data 2 for LVTS
 48
 49  nvmem-cell-names:
 50    minItems: 1
 51    items:
 52      - const: lvts-calib-data-1
 53      - const: lvts-calib-data-2
 54
 55  "#thermal-sensor-cells":
 56    const: 1
 57
 58allOf:
 59  - $ref: thermal-sensor.yaml#
 60
 61  - if:
 62      properties:
 63        compatible:
 64          contains:
 65            enum:
 66              - mediatek,mt8188-lvts-ap
 67              - mediatek,mt8188-lvts-mcu
 68              - mediatek,mt8192-lvts-ap
 69              - mediatek,mt8192-lvts-mcu
 70    then:
 71      properties:
 72        nvmem-cells:
 73          maxItems: 1
 74
 75        nvmem-cell-names:
 76          maxItems: 1
 77
 78  - if:
 79      properties:
 80        compatible:
 81          contains:
 82            enum:
 83              - mediatek,mt8186-lvts
 84              - mediatek,mt8195-lvts-ap
 85              - mediatek,mt8195-lvts-mcu
 86    then:
 87      properties:
 88        nvmem-cells:
 89          minItems: 2
 90
 91        nvmem-cell-names:
 92          minItems: 2
 93
 94required:
 95  - compatible
 96  - reg
 97  - interrupts
 98  - clocks
 99  - resets
100  - nvmem-cells
101  - nvmem-cell-names
102
103additionalProperties: false
104
105examples:
106  - |
107    #include <dt-bindings/interrupt-controller/arm-gic.h>
108    #include <dt-bindings/clock/mt8195-clk.h>
109    #include <dt-bindings/reset/mt8195-resets.h>
110    #include <dt-bindings/thermal/mediatek,lvts-thermal.h>
111
112    soc {
113      #address-cells = <2>;
114      #size-cells = <2>;
115
116      lvts_mcu: thermal-sensor@11278000 {
117        compatible = "mediatek,mt8195-lvts-mcu";
118        reg = <0 0x11278000 0 0x1000>;
119        interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
120        clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
121        resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>;
122        nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>;
123        nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2";
124        #thermal-sensor-cells = <1>;
125      };
126    };
127
128    thermal_zones: thermal-zones {
129      cpu0-thermal {
130        polling-delay = <1000>;
131        polling-delay-passive = <250>;
132        thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>;
133
134        trips {
135          cpu0_alert: trip-alert {
136            temperature = <85000>;
137            hysteresis = <2000>;
138            type = "passive";
139          };
140
141          cpu0_crit: trip-crit {
142            temperature = <100000>;
143            hysteresis = <2000>;
144            type = "critical";
145          };
146        };
147      };
148    };