snps,dw-apb-ssi.yaml

  1# SPDX-License-Identifier: GPL-2.0-only
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface
  8
  9maintainers:
 10  - Mark Brown <broonie@kernel.org>
 11
 12allOf:
 13  - $ref: spi-controller.yaml#
 14  - if:
 15      properties:
 16        compatible:
 17          contains:
 18            enum:
 19              - mscc,ocelot-spi
 20              - mscc,jaguar2-spi
 21    then:
 22      properties:
 23        reg:
 24          minItems: 2
 25  - if:
 26      properties:
 27        compatible:
 28          contains:
 29            enum:
 30              - baikal,bt1-sys-ssi
 31    then:
 32      properties:
 33        mux-controls:
 34          maxItems: 1
 35      required:
 36        - mux-controls
 37    else:
 38      required:
 39        - interrupts
 40  - if:
 41      properties:
 42        compatible:
 43          contains:
 44            const: amd,pensando-elba-spi
 45    then:
 46      required:
 47        - amd,pensando-elba-syscon
 48    else:
 49      properties:
 50        amd,pensando-elba-syscon: false
 51
 52properties:
 53  compatible:
 54    oneOf:
 55      - description: Generic DW SPI Controller
 56        enum:
 57          - snps,dw-apb-ssi
 58          - snps,dwc-ssi-1.01a
 59      - description: Microchip Sparx5 SoC SPI Controller
 60        const: microchip,sparx5-spi
 61      - description: Amazon Alpine SPI Controller
 62        const: amazon,alpine-dw-apb-ssi
 63      - description: Vendor controllers which use snps,dw-apb-ssi as fallback
 64        items:
 65          - enum:
 66              - mscc,ocelot-spi
 67              - mscc,jaguar2-spi
 68              - renesas,rzn1-spi
 69              - sophgo,sg2042-spi
 70              - thead,th1520-spi
 71          - const: snps,dw-apb-ssi
 72      - description: Intel Keem Bay SPI Controller
 73        const: intel,keembay-ssi
 74      - description: Intel Mount Evans Integrated Management Complex SPI Controller
 75        const: intel,mountevans-imc-ssi
 76      - description: AMD Pensando Elba SoC SPI Controller
 77        const: amd,pensando-elba-spi
 78      - description: Baikal-T1 SPI Controller
 79        const: baikal,bt1-ssi
 80      - description: Baikal-T1 System Boot SPI Controller
 81        const: baikal,bt1-sys-ssi
 82      - description: Canaan Kendryte K210 SoS SPI Controller
 83        const: canaan,k210-spi
 84      - description: Renesas RZ/N1 SPI Controller
 85        items:
 86          - const: renesas,r9a06g032-spi # RZ/N1D
 87          - const: renesas,rzn1-spi   # RZ/N1
 88
 89  reg:
 90    minItems: 1
 91    items:
 92      - description: DW APB SSI controller memory mapped registers
 93      - description: SPI MST region map or directly mapped SPI ROM
 94
 95  interrupts:
 96    maxItems: 1
 97
 98  clocks:
 99    minItems: 1
100    items:
101      - description: SPI Controller reference clock source
102      - description: APB interface clock source
103
104  clock-names:
105    minItems: 1
106    items:
107      - const: ssi_clk
108      - const: pclk
109
110  resets:
111    maxItems: 1
112
113  reset-names:
114    const: spi
115
116  reg-io-width:
117    description: I/O register width (in bytes) implemented by this device
118    default: 4
119    enum: [ 2, 4 ]
120
121  num-cs:
122    default: 4
123    minimum: 1
124    maximum: 16
125
126  dmas:
127    items:
128      - description: TX DMA Channel
129      - description: RX DMA Channel
130
131  dma-names:
132    items:
133      - const: tx
134      - const: rx
135
136  rx-sample-delay-ns:
137    default: 0
138    description: |
139      Default value of the rx-sample-delay-ns property.
140      This value will be used if the property is not explicitly defined
141      for a SPI slave device.
142
143      SPI Rx sample delay offset, unit is nanoseconds.
144      The delay from the default sample time before the actual sample of the
145      rxd input signal occurs. The "rx_sample_delay" is an optional feature
146      of the designware controller, and the upper limit is also subject to
147      controller configuration.
148
149  amd,pensando-elba-syscon:
150    $ref: /schemas/types.yaml#/definitions/phandle-array
151    description:
152      Block address to control SPI chip-selects. The Elba SoC system controller
153      provides an interface to override the native DWC SSI CS control.
154
155patternProperties:
156  "@[0-9a-f]$":
157    type: object
158    additionalProperties: true
159
160    properties:
161      reg:
162        minimum: 0
163        maximum: 0xf
164
165unevaluatedProperties: false
166
167required:
168  - compatible
169  - reg
170  - "#address-cells"
171  - "#size-cells"
172  - clocks
173
174examples:
175  - |
176    spi@fff00000 {
177      compatible = "snps,dw-apb-ssi";
178      reg = <0xfff00000 0x1000>;
179      #address-cells = <1>;
180      #size-cells = <0>;
181      interrupts = <0 154 4>;
182      clocks = <&spi_m_clk>;
183      num-cs = <2>;
184      cs-gpios = <&gpio0 13 0>,
185                 <&gpio0 14 0>;
186      rx-sample-delay-ns = <3>;
187      flash@1 {
188        compatible = "spi-nand";
189        reg = <1>;
190        rx-sample-delay-ns = <7>;
191      };
192    };
193  - |
194    spi@1f040100 {
195      compatible = "baikal,bt1-sys-ssi";
196      reg = <0x1f040100 0x900>,
197            <0x1c000000 0x1000000>;
198      #address-cells = <1>;
199      #size-cells = <0>;
200      mux-controls = <&boot_mux>;
201      clocks = <&ccu_sys>;
202      clock-names = "ssi_clk";
203    };
204...