nvidia,tegra210-quad.yaml

  1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Tegra Quad SPI Controller
  8
  9maintainers:
 10  - Thierry Reding <thierry.reding@gmail.com>
 11  - Jonathan Hunter <jonathanh@nvidia.com>
 12
 13properties:
 14  compatible:
 15    enum:
 16      - nvidia,tegra210-qspi
 17      - nvidia,tegra186-qspi
 18      - nvidia,tegra194-qspi
 19      - nvidia,tegra234-qspi
 20      - nvidia,tegra241-qspi
 21
 22  reg:
 23    maxItems: 1
 24
 25  interrupts:
 26    maxItems: 1
 27
 28  clock-names:
 29    items:
 30      - const: qspi
 31      - const: qspi_out
 32
 33  clocks:
 34    maxItems: 2
 35
 36  resets:
 37    maxItems: 1
 38
 39  dmas:
 40    maxItems: 2
 41
 42  dma-names:
 43    items:
 44      - const: rx
 45      - const: tx
 46
 47  iommus:
 48    maxItems: 1
 49
 50patternProperties:
 51  "@[0-9a-f]+$":
 52    type: object
 53    additionalProperties: true
 54
 55    properties:
 56      spi-rx-bus-width:
 57        enum: [1, 2, 4]
 58
 59      spi-tx-bus-width:
 60        enum: [1, 2, 4]
 61
 62required:
 63  - compatible
 64  - reg
 65  - interrupts
 66  - clock-names
 67  - clocks
 68  - resets
 69
 70unevaluatedProperties: false
 71
 72allOf:
 73  - $ref: spi-controller.yaml#
 74  - if:
 75      properties:
 76        compatible:
 77          not:
 78            contains:
 79              const: nvidia,tegra234-qspi
 80    then:
 81      properties:
 82        iommus: false
 83
 84examples:
 85  - |
 86    #include <dt-bindings/clock/tegra210-car.h>
 87    #include <dt-bindings/reset/tegra210-car.h>
 88    #include <dt-bindings/interrupt-controller/arm-gic.h>
 89    spi@70410000 {
 90        compatible = "nvidia,tegra210-qspi";
 91        reg = <0x70410000 0x1000>;
 92        interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 93        #address-cells = <1>;
 94        #size-cells = <0>;
 95        clocks = <&tegra_car TEGRA210_CLK_QSPI>,
 96                 <&tegra_car TEGRA210_CLK_QSPI_PM>;
 97        clock-names = "qspi", "qspi_out";
 98        resets = <&tegra_car 211>;
 99        dmas = <&apbdma 5>, <&apbdma 5>;
100        dma-names = "rx", "tx";
101
102        flash@0 {
103            compatible = "jedec,spi-nor";
104            reg = <0>;
105            spi-max-frequency = <104000000>;
106            spi-tx-bus-width = <2>;
107            spi-rx-bus-width = <2>;
108            nvidia,tx-clk-tap-delay = <0>;
109            nvidia,rx-clk-tap-delay = <0>;
110        };
111    };