mediatek,spi-mt65xx.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: SPI Bus controller for MediaTek ARM SoCs
  8
  9maintainers:
 10  - Leilk Liu <leilk.liu@mediatek.com>
 11
 12allOf:
 13  - $ref: /schemas/spi/spi-controller.yaml#
 14
 15properties:
 16  compatible:
 17    oneOf:
 18      - items:
 19          - enum:
 20              - mediatek,mt7629-spi
 21              - mediatek,mt8365-spi
 22          - const: mediatek,mt7622-spi
 23      - items:
 24          - enum:
 25              - mediatek,mt8516-spi
 26          - const: mediatek,mt2712-spi
 27      - items:
 28          - enum:
 29              - mediatek,mt6779-spi
 30              - mediatek,mt8186-spi
 31              - mediatek,mt8192-spi
 32              - mediatek,mt8195-spi
 33          - const: mediatek,mt6765-spi
 34      - items:
 35          - enum:
 36              - mediatek,mt7981-spi-ipm
 37              - mediatek,mt7986-spi-ipm
 38              - mediatek,mt7988-spi-quad
 39              - mediatek,mt7988-spi-single
 40              - mediatek,mt8188-spi-ipm
 41          - const: mediatek,spi-ipm
 42      - items:
 43          - enum:
 44              - mediatek,mt8196-spi
 45          - const: mediatek,mt6991-spi
 46      - items:
 47          - enum:
 48              - mediatek,mt2701-spi
 49              - mediatek,mt2712-spi
 50              - mediatek,mt6589-spi
 51              - mediatek,mt6765-spi
 52              - mediatek,mt6893-spi
 53              - mediatek,mt6991-spi
 54              - mediatek,mt7622-spi
 55              - mediatek,mt8135-spi
 56              - mediatek,mt8173-spi
 57              - mediatek,mt8183-spi
 58
 59  reg:
 60    maxItems: 1
 61
 62  interrupts:
 63    maxItems: 1
 64
 65  clocks:
 66    minItems: 3
 67    items:
 68      - description: clock used for the parent clock
 69      - description: clock used for the muxes clock
 70      - description: clock used for the clock gate
 71      - description: clock used for the AHB bus, this clock is optional
 72
 73  clock-names:
 74    minItems: 3
 75    items:
 76      - const: parent-clk
 77      - const: sel-clk
 78      - const: spi-clk
 79      - const: hclk
 80
 81  mediatek,pad-select:
 82    $ref: /schemas/types.yaml#/definitions/uint32-array
 83    minItems: 1
 84    maxItems: 4
 85    items:
 86      enum: [0, 1, 2, 3]
 87    description:
 88      specify which pins group(ck/mi/mo/cs) spi controller used.
 89      This is an array.
 90
 91required:
 92  - compatible
 93  - reg
 94  - interrupts
 95  - clocks
 96  - clock-names
 97  - '#address-cells'
 98  - '#size-cells'
 99
100unevaluatedProperties: false
101
102examples:
103  - |
104    #include <dt-bindings/clock/mt8173-clk.h>
105    #include <dt-bindings/gpio/gpio.h>
106    #include <dt-bindings/interrupt-controller/arm-gic.h>
107    #include <dt-bindings/interrupt-controller/irq.h>
108
109    spi@1100a000 {
110      compatible = "mediatek,mt8173-spi";
111      #address-cells = <1>;
112      #size-cells = <0>;
113      reg = <0x1100a000 0x1000>;
114      interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
115      clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
116               <&topckgen CLK_TOP_SPI_SEL>,
117               <&pericfg CLK_PERI_SPI0>;
118      clock-names = "parent-clk", "sel-clk", "spi-clk";
119      cs-gpios = <&pio 105 GPIO_ACTIVE_LOW>, <&pio 72 GPIO_ACTIVE_LOW>;
120      mediatek,pad-select = <1>, <0>;
121    };