fsl,spi-fsl-qspi.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/spi/fsl,spi-fsl-qspi.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Freescale Quad Serial Peripheral Interface (QuadSPI)
  8
  9maintainers:
 10  - Han Xu <han.xu@nxp.com>
 11
 12properties:
 13  compatible:
 14    oneOf:
 15      - enum:
 16          - fsl,vf610-qspi
 17          - fsl,imx6sx-qspi
 18          - fsl,imx7d-qspi
 19          - fsl,imx6ul-qspi
 20          - fsl,ls1021a-qspi
 21          - fsl,ls2080a-qspi
 22          - spacemit,k1-qspi
 23      - items:
 24          - enum:
 25              - fsl,ls1043a-qspi
 26          - const: fsl,ls1021a-qspi
 27      - items:
 28          - enum:
 29              - fsl,imx8mq-qspi
 30          - const: fsl,imx7d-qspi
 31
 32  reg:
 33    items:
 34      - description: registers
 35      - description: memory mapping
 36
 37  reg-names:
 38    items:
 39      - const: QuadSPI
 40      - const: QuadSPI-memory
 41
 42  interrupts:
 43    maxItems: 1
 44
 45  clocks:
 46    items:
 47      - description: SoC SPI qspi_en clock
 48      - description: SoC SPI qspi clock
 49
 50  clock-names:
 51    items:
 52      - const: qspi_en
 53      - const: qspi
 54
 55  resets:
 56    items:
 57      - description: SoC QSPI reset
 58      - description: SoC QSPI bus reset
 59
 60required:
 61  - compatible
 62  - reg
 63  - reg-names
 64  - interrupts
 65  - clocks
 66  - clock-names
 67
 68allOf:
 69  - $ref: spi-controller.yaml#
 70  - if:
 71      properties:
 72        compatible:
 73          not:
 74            contains:
 75              const: spacemit,k1-qspi
 76    then:
 77      properties:
 78        resets: false
 79
 80unevaluatedProperties: false
 81
 82examples:
 83  - |
 84    #include <dt-bindings/interrupt-controller/arm-gic.h>
 85    #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
 86
 87    soc {
 88        #address-cells = <2>;
 89        #size-cells = <2>;
 90
 91        spi@1550000 {
 92            compatible = "fsl,ls1021a-qspi";
 93            reg = <0x0 0x1550000 0x0 0x100000>,
 94                  <0x0 0x40000000 0x0 0x10000000>;
 95            reg-names = "QuadSPI", "QuadSPI-memory";
 96            interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
 97            #address-cells = <1>;
 98            #size-cells = <0>;
 99            clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>,
100                     <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>;
101            clock-names = "qspi_en", "qspi";
102
103            flash@0 {
104                compatible = "jedec,spi-nor";
105                spi-max-frequency = <50000000>;
106                reg = <0>;
107                spi-rx-bus-width = <4>;
108                spi-tx-bus-width = <4>;
109            };
110        };
111    };