atmel,quadspi.yaml

  1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/spi/atmel,quadspi.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Atmel Quad Serial Peripheral Interface (QSPI)
  8
  9maintainers:
 10  - Tudor Ambarus <tudor.ambarus@linaro.org>
 11
 12allOf:
 13  - $ref: spi-controller.yaml#
 14
 15properties:
 16  compatible:
 17    enum:
 18      - atmel,sama5d2-qspi
 19      - microchip,sam9x60-qspi
 20      - microchip,sam9x7-ospi
 21      - microchip,sama7d65-qspi
 22      - microchip,sama7d65-ospi
 23      - microchip,sama7g5-qspi
 24      - microchip,sama7g5-ospi
 25
 26  reg:
 27    items:
 28      - description: base registers
 29      - description: mapped memory
 30
 31  reg-names:
 32    items:
 33      - const: qspi_base
 34      - const: qspi_mmap
 35
 36  clocks:
 37    minItems: 1
 38    items:
 39      - description: peripheral clock
 40      - description: system clock or generic clock, if available
 41
 42  clock-names:
 43    minItems: 1
 44    items:
 45      - const: pclk
 46      - enum: [ qspick, gclk ]
 47
 48  interrupts:
 49    maxItems: 1
 50
 51  dmas:
 52    items:
 53      - description: tx DMA channel
 54      - description: rx DMA channel
 55
 56  dma-names:
 57    items:
 58      - const: tx
 59      - const: rx
 60
 61  '#address-cells':
 62    const: 1
 63
 64  '#size-cells':
 65    const: 0
 66
 67required:
 68  - compatible
 69  - reg
 70  - reg-names
 71  - interrupts
 72  - clocks
 73  - clock-names
 74  - '#address-cells'
 75  - '#size-cells'
 76
 77unevaluatedProperties: false
 78
 79examples:
 80  - |
 81    #include <dt-bindings/interrupt-controller/irq.h>
 82    #include <dt-bindings/clock/at91.h>
 83    spi@f0020000 {
 84        compatible = "atmel,sama5d2-qspi";
 85        reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>;
 86        reg-names = "qspi_base", "qspi_mmap";
 87        interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
 88        clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
 89        clock-names = "pclk";
 90        #address-cells = <1>;
 91        #size-cells = <0>;
 92        pinctrl-names = "default";
 93        pinctrl-0 = <&pinctrl_spi0_default>;
 94
 95        flash@0 {
 96            compatible = "jedec,spi-nor";
 97            spi-max-frequency = <50000000>;
 98            reg = <0>;
 99            spi-rx-bus-width = <4>;
100            spi-tx-bus-width = <4>;
101        };
102    };