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aspeed,ast2600-fmc.yaml
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linux-6.19.14/Documentation/devicetree/bindings/spi/aspeed,ast2600-fmc.yaml
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/spi/aspeed,ast2600-fmc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Aspeed SMC controllers 8 9maintainers: 10 - Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> 11 - Cédric Le Goater <clg@kaod.org> 12 13description: | 14 This binding describes the Aspeed Static Memory Controllers (FMC and 15 SPI) of the AST2400, AST2500, AST2600 and AST2700 SOCs. 16 17allOf: 18 - $ref: spi-controller.yaml# 19 20properties: 21 compatible: 22 enum: 23 - aspeed,ast2700-fmc 24 - aspeed,ast2700-spi 25 - aspeed,ast2600-fmc 26 - aspeed,ast2600-spi 27 - aspeed,ast2500-fmc 28 - aspeed,ast2500-spi 29 - aspeed,ast2400-fmc 30 - aspeed,ast2400-spi 31 32 reg: 33 items: 34 - description: registers 35 - description: memory mapping 36 37 clocks: 38 maxItems: 1 39 40 interrupts: 41 maxItems: 1 42 43required: 44 - compatible 45 - reg 46 - clocks 47 48unevaluatedProperties: false 49 50examples: 51 - | 52 #include <dt-bindings/interrupt-controller/arm-gic.h> 53 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 54 #include <dt-bindings/clock/ast2600-clock.h> 55 56 spi@1e620000 { 57 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; 58 #address-cells = <1>; 59 #size-cells = <0>; 60 compatible = "aspeed,ast2600-fmc"; 61 clocks = <&syscon ASPEED_CLK_AHB>; 62 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 63 64 flash@0 { 65 reg = < 0 >; 66 compatible = "jedec,spi-nor"; 67 spi-max-frequency = <50000000>; 68 spi-rx-bus-width = <2>; 69 }; 70 71 flash@1 { 72 reg = < 1 >; 73 compatible = "jedec,spi-nor"; 74 spi-max-frequency = <50000000>; 75 spi-rx-bus-width = <2>; 76 }; 77 78 flash@2 { 79 reg = < 2 >; 80 compatible = "jedec,spi-nor"; 81 spi-max-frequency = <50000000>; 82 spi-rx-bus-width = <2>; 83 }; 84 };
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