wlf,wm8904.yaml

  1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/sound/wlf,wm8904.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Wolfson WM8904/WM8912 audio codecs
  8
  9maintainers:
 10  - patches@opensource.cirrus.com
 11
 12description: |
 13  Pins on the device (for linking into audio routes):
 14  IN1L, IN1R, IN2L, IN2R, IN3L, IN3R, HPOUTL, HPOUTR, LINEOUTL, LINEOUTR,
 15  MICBIAS
 16
 17properties:
 18  compatible:
 19    enum:
 20      - wlf,wm8904
 21      - wlf,wm8912
 22
 23  reg:
 24    maxItems: 1
 25
 26  "#sound-dai-cells":
 27    const: 0
 28
 29  clocks:
 30    maxItems: 1
 31
 32  clock-names:
 33    const: mclk
 34
 35  AVDD-supply: true
 36  CPVDD-supply: true
 37  DBVDD-supply: true
 38  DCVDD-supply: true
 39  MICVDD-supply: true
 40
 41  wlf,in1l-as-dmicdat1:
 42    type: boolean
 43    description:
 44      Use IN1L/DMICDAT1 as DMICDAT1, enabling the DMIC input path.
 45      Can be used separately or together with wlf,in1r-as-dmicdat2.
 46
 47  wlf,in1r-as-dmicdat2:
 48    type: boolean
 49    description:
 50      Use IN1R/DMICDAT2 as DMICDAT2, enabling the DMIC input path.
 51      Can be used separately or together with wlf,in1l-as-dmicdat1.
 52
 53  wlf,gpio-cfg:
 54    $ref: /schemas/types.yaml#/definitions/uint32-array
 55    minItems: 4
 56    maxItems: 4
 57    description:
 58      Default register values for R121/122/123/124 (GPIO Control).
 59      If any entry has the value 0xFFFF, the related register won't be set.
 60    default: [0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF]
 61
 62  wlf,micbias-cfg:
 63    $ref: /schemas/types.yaml#/definitions/uint32-array
 64    minItems: 2
 65    maxItems: 2
 66    description:
 67      Default register values for R6/R7 (Mic Bias Control).
 68    default: [0, 0]
 69
 70  wlf,drc-cfg-names:
 71    $ref: /schemas/types.yaml#/definitions/string-array
 72    description:
 73      List of strings for the available DRC modes.
 74      If absent, DRC is disabled.
 75
 76  wlf,drc-cfg-regs:
 77    $ref: /schemas/types.yaml#/definitions/uint16-matrix
 78    description:
 79      Sets of default register values for R40/41/42/43 (DRC).
 80      Each set corresponds to a DRC mode, so the number of sets should equal
 81      the length of wlf,drc-cfg-names.
 82      If absent, DRC is disabled.
 83    items:
 84      minItems: 4
 85      maxItems: 4
 86
 87  wlf,retune-mobile-cfg-names:
 88    $ref: /schemas/types.yaml#/definitions/non-unique-string-array
 89    description:
 90      List of strings for the available retune modes.
 91      If absent, retune is disabled.
 92
 93  wlf,retune-mobile-cfg-hz:
 94    description:
 95      The list must be the same length as wlf,retune-mobile-cfg-names.
 96      If absent, retune is disabled.
 97
 98  wlf,retune-mobile-cfg-regs:
 99    $ref: /schemas/types.yaml#/definitions/uint16-matrix
100    description:
101      Sets of default register values for R134/.../157 (EQ).
102      Each set corresponds to a retune mode, so the number of sets should equal
103      the length of wlf,retune-mobile-cfg-names.
104      If absent, retune is disabled.
105    items:
106      minItems: 24
107      maxItems: 24
108
109dependencies:
110  wlf,drc-cfg-names: [ 'wlf,drc-cfg-regs' ]
111  wlf,drc-cfg-regs: [ 'wlf,drc-cfg-names' ]
112
113  wlf,retune-mobile-cfg-names: [ 'wlf,retune-mobile-cfg-hz', 'wlf,retune-mobile-cfg-regs' ]
114  wlf,retune-mobile-cfg-regs: [ 'wlf,retune-mobile-cfg-names', 'wlf,retune-mobile-cfg-hz' ]
115  wlf,retune-mobile-cfg-hz: [ 'wlf,retune-mobile-cfg-names', 'wlf,retune-mobile-cfg-regs' ]
116
117required:
118  - compatible
119  - reg
120  - clocks
121  - clock-names
122  - AVDD-supply
123  - CPVDD-supply
124  - DBVDD-supply
125  - DCVDD-supply
126  - MICVDD-supply
127
128allOf:
129  - $ref: dai-common.yaml#
130
131unevaluatedProperties: false
132
133examples:
134  - |
135    i2c {
136        #address-cells = <1>;
137        #size-cells = <0>;
138
139        codec@1a {
140            compatible = "wlf,wm8904";
141            reg = <0x1a>;
142            clocks = <&pck0>;
143            clock-names = "mclk";
144            AVDD-supply = <&reg_1p8v>;
145            CPVDD-supply = <&reg_1p8v>;
146            DBVDD-supply = <&reg_1p8v>;
147            DCVDD-supply = <&reg_1p8v>;
148            MICVDD-supply = <&reg_1p8v>;
149
150            wlf,drc-cfg-names = "default", "peaklimiter", "tradition", "soft",
151                                "music";
152            /*
153             * Config registers per name, respectively:
154             * KNEE_IP = 0,   KNEE_OP = 0,     HI_COMP = 1,   LO_COMP = 1
155             * KNEE_IP = -24, KNEE_OP = -6,    HI_COMP = 1/4, LO_COMP = 1
156             * KNEE_IP = -42, KNEE_OP = -3,    HI_COMP = 0,   LO_COMP = 1
157             * KNEE_IP = -45, KNEE_OP = -9,    HI_COMP = 1/8, LO_COMP = 1
158             * KNEE_IP = -30, KNEE_OP = -10.5, HI_COMP = 1/4, LO_COMP = 1
159             */
160            wlf,drc-cfg-regs = /bits/ 16 <0x01af 0x3248 0x0000 0x0000>,
161                               /bits/ 16 <0x04af 0x324b 0x0010 0x0408>,
162                               /bits/ 16 <0x04af 0x324b 0x0028 0x0704>,
163                               /bits/ 16 <0x04af 0x324b 0x0018 0x078c>,
164                               /bits/ 16 <0x04af 0x324b 0x0010 0x050e>;
165
166            /* GPIO1 = DMIC_CLK, don't touch others */
167            wlf,gpio-cfg = <0x0018>, <0xffff>, <0xffff>, <0xffff>;
168
169            /* Use IN1R as DMICDAT2, leave IN1L as an analog input path */
170            wlf,in1r-as-dmicdat2;
171
172            wlf,retune-mobile-cfg-names = "bassboost", "bassboost", "treble";
173            wlf,retune-mobile-cfg-hz = <48000>, <44100>, <48000>;
174            /*
175             * Config registers per name, respectively:
176             * EQ_ENA,  100 Hz,  300 Hz,  875 Hz, 2400 Hz, 6900 Hz
177             *      1,   +6 dB,   +3 dB,    0 dB,    0 dB,    0 dB
178             *      1,   +6 dB,   +3 dB,    0 dB,    0 dB,    0 dB
179             *      1,   -2 dB,   -2 dB,    0 dB,    0 dB,   +3 dB
180             * Each one uses the defaults for ReTune Mobile registers 140-157
181             */
182            wlf,retune-mobile-cfg-regs = /bits/ 16 <0x1 0x12 0xf 0xc 0xc 0xc
183                                                    0x0fca 0x0400 0x00d8 0x1eb5
184                                                    0xf145 0x0bd5 0x0075 0x1c58
185                                                    0xf3d3 0x0a54 0x0568 0x168e
186                                                    0xf829 0x07ad 0x1103 0x0564
187                                                    0x0559 0x4000>,
188
189                                         /bits/ 16 <0x1 0x12 0xf 0xc 0xc 0xc
190                                                    0x0fca 0x0400 0x00d8 0x1eb5
191                                                    0xf145 0x0bd5 0x0075 0x1c58
192                                                    0xf3d3 0x0a54 0x0568 0x168e
193                                                    0xf829 0x07ad 0x1103 0x0564
194                                                    0x0559 0x4000>,
195
196                                         /bits/ 16 <0x1 0xa 0xa 0xc 0xc 0xf
197                                                    0x0fca 0x0400 0x00d8 0x1eb5
198                                                    0xf145 0x0bd5 0x0075 0x1c58
199                                                    0xf3d3 0x0a54 0x0568 0x168e
200                                                    0xf829 0x07ad 0x1103 0x0564
201                                                    0x0559 0x4000>;
202        };
203    };