nvidia,tegra210-ahub.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Tegra210 AHUB
  8
  9description: |
 10  The Audio Hub (AHUB) comprises a collection of hardware accelerators
 11  for audio pre-processing, post-processing and a programmable full
 12  crossbar for routing audio data across these accelerators. It has
 13  external interfaces such as I2S, DMIC, DSPK. It interfaces with ADMA
 14  engine through ADMAIF.
 15
 16maintainers:
 17  - Jon Hunter <jonathanh@nvidia.com>
 18  - Sameer Pujar <spujar@nvidia.com>
 19
 20properties:
 21  $nodename:
 22    pattern: "^ahub@[0-9a-f]*$"
 23
 24  compatible:
 25    oneOf:
 26      - enum:
 27          - nvidia,tegra210-ahub
 28          - nvidia,tegra186-ahub
 29          - nvidia,tegra234-ahub
 30          - nvidia,tegra264-ahub
 31      - items:
 32          - const: nvidia,tegra194-ahub
 33          - const: nvidia,tegra186-ahub
 34
 35  reg:
 36    maxItems: 1
 37
 38  clocks:
 39    maxItems: 1
 40
 41  clock-names:
 42    const: ahub
 43
 44  assigned-clocks:
 45    maxItems: 1
 46
 47  assigned-clock-parents:
 48    maxItems: 1
 49
 50  assigned-clock-rates:
 51    maxItems: 1
 52
 53  "#address-cells":
 54    enum: [ 1, 2 ]
 55
 56  "#size-cells":
 57    enum: [ 1, 2 ]
 58
 59  ranges: true
 60
 61  ports:
 62    $ref: /schemas/graph.yaml#/properties/ports
 63    description: |
 64      Contains list of ACIF (Audio CIF) port nodes for AHUB (Audio Hub).
 65      These are connected to ACIF interfaces of AHUB clients. Thus the
 66      number of port nodes depend on the number of clients that AHUB may
 67      have depending on the SoC revision.
 68
 69    patternProperties:
 70      '^port@[0-9]':
 71        $ref: audio-graph-port.yaml#
 72        unevaluatedProperties: false
 73
 74patternProperties:
 75  '^i2s@[0-9a-f]+$':
 76    type: object
 77
 78  '^dmic@[0-9a-f]+$':
 79    type: object
 80    $ref: nvidia,tegra210-dmic.yaml#
 81
 82  '^admaif@[0-9a-f]+$':
 83    type: object
 84    $ref: nvidia,tegra210-admaif.yaml#
 85
 86  '^dspk@[0-9a-f]+$':
 87    type: object
 88    $ref: nvidia,tegra186-dspk.yaml#
 89
 90  '^mvc@[0-9a-f]+$':
 91    type: object
 92    $ref: nvidia,tegra210-mvc.yaml#
 93
 94  '^sfc@[0-9a-f]+$':
 95    type: object
 96    $ref: nvidia,tegra210-sfc.yaml#
 97
 98  '^amx@[0-9a-f]+$':
 99    type: object
100    $ref: nvidia,tegra210-amx.yaml#
101
102  '^adx@[0-9a-f]+$':
103    type: object
104    $ref: nvidia,tegra210-adx.yaml#
105
106  '^amixer@[0-9a-f]+$':
107    type: object
108    $ref: nvidia,tegra210-mixer.yaml#
109
110  '^asrc@[0-9a-f]+$':
111    type: object
112    $ref: nvidia,tegra186-asrc.yaml#
113
114  '^processing-engine@[0-9a-f]+$':
115    type: object
116    $ref: nvidia,tegra210-ope.yaml#
117
118required:
119  - compatible
120  - reg
121  - clocks
122  - clock-names
123  - assigned-clocks
124  - assigned-clock-parents
125  - "#address-cells"
126  - "#size-cells"
127  - ranges
128
129additionalProperties: false
130
131examples:
132  - |
133    #include<dt-bindings/clock/tegra210-car.h>
134
135    ahub@702d0800 {
136        compatible = "nvidia,tegra210-ahub";
137        reg = <0x702d0800 0x800>;
138        clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
139        clock-names = "ahub";
140        assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
141        assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
142        #address-cells = <1>;
143        #size-cells = <1>;
144        ranges = <0x702d0000 0x702d0000 0x0000e400>;
145
146        // All AHUB child nodes below
147        admaif@702d0000 {
148            compatible = "nvidia,tegra210-admaif";
149            reg = <0x702d0000 0x800>;
150            dmas = <&adma 1>,  <&adma 1>,
151               <&adma 2>,  <&adma 2>,
152               <&adma 3>,  <&adma 3>,
153               <&adma 4>,  <&adma 4>,
154               <&adma 5>,  <&adma 5>,
155               <&adma 6>,  <&adma 6>,
156               <&adma 7>,  <&adma 7>,
157               <&adma 8>,  <&adma 8>,
158               <&adma 9>,  <&adma 9>,
159               <&adma 10>, <&adma 10>;
160            dma-names = "rx1",  "tx1",
161                    "rx2",  "tx2",
162                    "rx3",  "tx3",
163                    "rx4",  "tx4",
164                    "rx5",  "tx5",
165                    "rx6",  "tx6",
166                    "rx7",  "tx7",
167                    "rx8",  "tx8",
168                    "rx9",  "tx9",
169                    "rx10", "tx10";
170        };
171
172        i2s@702d1000 {
173            compatible = "nvidia,tegra210-i2s";
174            reg = <0x702d1000 0x100>;
175            clocks = <&tegra_car TEGRA210_CLK_I2S0>;
176            clock-names = "i2s";
177            assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
178            assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
179            assigned-clock-rates = <1536000>;
180            sound-name-prefix = "I2S1";
181        };
182
183        dmic@702d4000 {
184            compatible = "nvidia,tegra210-dmic";
185            reg = <0x702d4000 0x100>;
186            clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
187            clock-names = "dmic";
188            assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
189            assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
190            assigned-clock-rates = <3072000>;
191            sound-name-prefix = "DMIC1";
192        };
193
194        // More child nodes to follow
195    };
196
197...