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nvidia,tegra210-admaif.yaml
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linux-6.19.14/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/sound/nvidia,tegra210-admaif.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Tegra210 ADMAIF 8 9description: | 10 ADMAIF is the interface between ADMA and AHUB. Each ADMA channel 11 that sends/receives data to/from AHUB must interface through an 12 ADMAIF channel. ADMA channel sending data to AHUB pairs with ADMAIF 13 Tx channel and ADMA channel receiving data from AHUB pairs with 14 ADMAIF Rx channel. 15 16maintainers: 17 - Jon Hunter <jonathanh@nvidia.com> 18 - Sameer Pujar <spujar@nvidia.com> 19 20properties: 21 $nodename: 22 pattern: "^admaif@[0-9a-f]*$" 23 24 compatible: 25 oneOf: 26 - enum: 27 - nvidia,tegra210-admaif 28 - nvidia,tegra186-admaif 29 - nvidia,tegra264-admaif 30 - items: 31 - enum: 32 - nvidia,tegra234-admaif 33 - nvidia,tegra194-admaif 34 - const: nvidia,tegra186-admaif 35 36 reg: 37 maxItems: 1 38 39 dmas: true 40 41 dma-names: true 42 43 interconnects: 44 items: 45 - description: APE read memory client 46 - description: APE write memory client 47 48 interconnect-names: 49 items: 50 - const: dma-mem # read 51 - const: write 52 53 iommus: 54 maxItems: 1 55 56 ports: 57 $ref: /schemas/graph.yaml#/properties/ports 58 description: | 59 Contains list of ACIF (Audio CIF) port nodes for ADMAIF channels. 60 The number of port nodes depends on the number of ADMAIF channels 61 that SoC may have. These are interfaced with respective ACIF ports 62 in AHUB (Audio Hub). Each port is capable of data transfers in 63 both directions. 64 65 patternProperties: 66 '^port@[0-9]': 67 $ref: audio-graph-port.yaml# 68 unevaluatedProperties: false 69 70allOf: 71 - if: 72 properties: 73 compatible: 74 contains: 75 const: nvidia,tegra210-admaif 76 then: 77 properties: 78 dmas: 79 description: 80 DMA channel specifiers, equally divided for Tx and Rx. 81 minItems: 1 82 maxItems: 20 83 dma-names: 84 items: 85 pattern: "^[rt]x(10|[1-9])$" 86 description: 87 Should be "rx1", "rx2" ... "rx10" for DMA Rx channel 88 Should be "tx1", "tx2" ... "tx10" for DMA Tx channel 89 minItems: 1 90 maxItems: 20 91 interconnects: false 92 interconnect-names: false 93 iommus: false 94 95 - if: 96 properties: 97 compatible: 98 contains: 99 const: nvidia,tegra186-admaif 100 then: 101 properties: 102 dmas: 103 description: 104 DMA channel specifiers, equally divided for Tx and Rx. 105 minItems: 1 106 maxItems: 40 107 dma-names: 108 items: 109 pattern: "^[rt]x(1[0-9]|[1-9]|20)$" 110 description: 111 Should be "rx1", "rx2" ... "rx20" for DMA Rx channel 112 Should be "tx1", "tx2" ... "tx20" for DMA Tx channel 113 minItems: 1 114 maxItems: 40 115 116 - if: 117 properties: 118 compatible: 119 contains: 120 const: nvidia,tegra264-admaif 121 then: 122 properties: 123 dmas: 124 description: 125 DMA channel specifiers, equally divided for Tx and Rx. 126 minItems: 1 127 maxItems: 64 128 dma-names: 129 items: 130 pattern: "^[rt]x(3[0-2]|[1-2][0-9]|[1-9])$" 131 description: 132 Should be "rx1", "rx2" ... "rx32" for DMA Rx channel 133 Should be "tx1", "tx2" ... "tx32" for DMA Tx channel 134 minItems: 1 135 maxItems: 64 136 137required: 138 - compatible 139 - reg 140 - dmas 141 - dma-names 142 143additionalProperties: false 144 145examples: 146 - | 147 admaif@702d0000 { 148 compatible = "nvidia,tegra210-admaif"; 149 reg = <0x702d0000 0x800>; 150 dmas = <&adma 1>, <&adma 1>, 151 <&adma 2>, <&adma 2>, 152 <&adma 3>, <&adma 3>, 153 <&adma 4>, <&adma 4>, 154 <&adma 5>, <&adma 5>, 155 <&adma 6>, <&adma 6>, 156 <&adma 7>, <&adma 7>, 157 <&adma 8>, <&adma 8>, 158 <&adma 9>, <&adma 9>, 159 <&adma 10>, <&adma 10>; 160 dma-names = "rx1", "tx1", 161 "rx2", "tx2", 162 "rx3", "tx3", 163 "rx4", "tx4", 164 "rx5", "tx5", 165 "rx6", "tx6", 166 "rx7", "tx7", 167 "rx8", "tx8", 168 "rx9", "tx9", 169 "rx10", "tx10"; 170 }; 171 172...
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