mt8192-afe-pcm.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/sound/mt8192-afe-pcm.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Mediatek AFE PCM controller for mt8192
  8
  9maintainers:
 10  - Jiaxin Yu <jiaxin.yu@mediatek.com>
 11  - Shane Chien <shane.chien@mediatek.com>
 12
 13properties:
 14  compatible:
 15    const: mediatek,mt8192-audio
 16
 17  interrupts:
 18    maxItems: 1
 19
 20  resets:
 21    maxItems: 1
 22
 23  reset-names:
 24    const: audiosys
 25
 26  memory-region:
 27    description: memory region for audio DMA buffers
 28    maxItems: 1
 29
 30  mediatek,apmixedsys:
 31    $ref: /schemas/types.yaml#/definitions/phandle
 32    description: The phandle of the mediatek apmixedsys controller
 33
 34  mediatek,infracfg:
 35    $ref: /schemas/types.yaml#/definitions/phandle
 36    description: The phandle of the mediatek infracfg controller
 37
 38  mediatek,topckgen:
 39    $ref: /schemas/types.yaml#/definitions/phandle
 40    description: The phandle of the mediatek topckgen controller
 41
 42  power-domains:
 43    maxItems: 1
 44
 45  clocks:
 46    items:
 47      - description: AFE clock
 48      - description: ADDA DAC clock
 49      - description: ADDA DAC pre-distortion clock
 50      - description: audio infra sys clock
 51      - description: audio infra 26M clock
 52
 53  clock-names:
 54    items:
 55      - const: aud_afe_clk
 56      - const: aud_dac_clk
 57      - const: aud_dac_predis_clk
 58      - const: aud_infra_clk
 59      - const: aud_infra_26m_clk
 60
 61required:
 62  - compatible
 63  - interrupts
 64  - resets
 65  - reset-names
 66  - mediatek,apmixedsys
 67  - mediatek,infracfg
 68  - mediatek,topckgen
 69  - power-domains
 70  - clocks
 71  - clock-names
 72
 73additionalProperties: false
 74
 75examples:
 76  - |
 77    #include <dt-bindings/clock/mt8192-clk.h>
 78    #include <dt-bindings/interrupt-controller/arm-gic.h>
 79    #include <dt-bindings/interrupt-controller/irq.h>
 80    #include <dt-bindings/power/mt8192-power.h>
 81    #include <dt-bindings/reset/mt8192-resets.h>
 82
 83    afe: mt8192-afe-pcm {
 84        compatible = "mediatek,mt8192-audio";
 85        interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
 86        resets = <&watchdog MT8192_TOPRGU_AUDIO_SW_RST>;
 87        reset-names = "audiosys";
 88        mediatek,apmixedsys = <&apmixedsys>;
 89        mediatek,infracfg = <&infracfg>;
 90        mediatek,topckgen = <&topckgen>;
 91        power-domains = <&scpsys MT8192_POWER_DOMAIN_AUDIO>;
 92        clocks = <&audsys CLK_AUD_AFE>,
 93                 <&audsys CLK_AUD_DAC>,
 94                 <&audsys CLK_AUD_DAC_PREDIS>,
 95                 <&infracfg CLK_INFRA_AUDIO>,
 96                 <&infracfg CLK_INFRA_AUDIO_26M_B>;
 97        clock-names = "aud_afe_clk",
 98                      "aud_dac_clk",
 99                      "aud_dac_predis_clk",
100                      "aud_infra_clk",
101                      "aud_infra_26m_clk";
102        memory-region = <&afe_dma_mem>;
103    };
104
105...