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mt8186-afe-pcm.yaml

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linux-6.19.14/Documentation/devicetree/bindings/sound/mt8186-afe-pcm.yaml YAML
  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/sound/mt8186-afe-pcm.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Mediatek AFE PCM controller for mt8186
  8
  9maintainers:
 10  - Jiaxin Yu <jiaxin.yu@mediatek.com>
 11
 12properties:
 13  compatible:
 14    const: mediatek,mt8186-sound
 15
 16  reg:
 17    maxItems: 1
 18
 19  interrupts:
 20    maxItems: 1
 21
 22  resets:
 23    maxItems: 1
 24
 25  reset-names:
 26    const: audiosys
 27
 28  memory-region:
 29    description: memory region for audio DMA buffers
 30    maxItems: 1
 31
 32  mediatek,apmixedsys:
 33    $ref: /schemas/types.yaml#/definitions/phandle
 34    description: The phandle of the mediatek apmixedsys controller
 35
 36  mediatek,infracfg:
 37    $ref: /schemas/types.yaml#/definitions/phandle
 38    description: The phandle of the mediatek infracfg controller
 39
 40  mediatek,topckgen:
 41    $ref: /schemas/types.yaml#/definitions/phandle
 42    description: The phandle of the mediatek topckgen controller
 43
 44  clocks:
 45    items:
 46      - description: audio infra sys clock
 47      - description: audio infra 26M clock
 48      - description: audio top mux
 49      - description: audio intbus mux
 50      - description: mainpll 136.5M clock
 51      - description: faud1 mux
 52      - description: apll1 clock
 53      - description: faud2 mux
 54      - description: apll2 clock
 55      - description: audio engen1 mux
 56      - description: apll1_d8 22.5792M clock
 57      - description: audio engen2 mux
 58      - description: apll2_d8 24.576M clock
 59      - description: i2s0 mclk mux
 60      - description: i2s1 mclk mux
 61      - description: i2s2 mclk mux
 62      - description: i2s4 mclk mux
 63      - description: tdm mclk mux
 64      - description: i2s0_mck divider
 65      - description: i2s1_mck divider
 66      - description: i2s2_mck divider
 67      - description: i2s4_mck divider
 68      - description: tdm_mck divider
 69      - description: audio hires mux
 70      - description: 26M clock
 71
 72  clock-names:
 73    items:
 74      - const: aud_infra_clk
 75      - const: mtkaif_26m_clk
 76      - const: top_mux_audio
 77      - const: top_mux_audio_int
 78      - const: top_mainpll_d2_d4
 79      - const: top_mux_aud_1
 80      - const: top_apll1_ck
 81      - const: top_mux_aud_2
 82      - const: top_apll2_ck
 83      - const: top_mux_aud_eng1
 84      - const: top_apll1_d8
 85      - const: top_mux_aud_eng2
 86      - const: top_apll2_d8
 87      - const: top_i2s0_m_sel
 88      - const: top_i2s1_m_sel
 89      - const: top_i2s2_m_sel
 90      - const: top_i2s4_m_sel
 91      - const: top_tdm_m_sel
 92      - const: top_apll12_div0
 93      - const: top_apll12_div1
 94      - const: top_apll12_div2
 95      - const: top_apll12_div4
 96      - const: top_apll12_div_tdm
 97      - const: top_mux_audio_h
 98      - const: top_clk26m_clk
 99
100required:
101  - compatible
102  - interrupts
103  - resets
104  - reset-names
105  - mediatek,apmixedsys
106  - mediatek,infracfg
107  - mediatek,topckgen
108  - clocks
109  - clock-names
110
111additionalProperties: false
112
113examples:
114  - |
115    #include <dt-bindings/interrupt-controller/arm-gic.h>
116    #include <dt-bindings/interrupt-controller/irq.h>
117
118    afe: mt8186-afe-pcm@11210000 {
119        compatible = "mediatek,mt8186-sound";
120        reg = <0x11210000 0x2000>;
121        interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
122        resets = <&watchdog 17>; //MT8186_TOPRGU_AUDIO_SW_RST
123        reset-names = "audiosys";
124        mediatek,apmixedsys = <&apmixedsys>;
125        mediatek,infracfg = <&infracfg>;
126        mediatek,topckgen = <&topckgen>;
127        clocks = <&infracfg_ao 44>, //CLK_INFRA_AO_AUDIO
128                 <&infracfg_ao 54>, //CLK_INFRA_AO_AUDIO_26M_BCLK
129                 <&topckgen 15>, //CLK_TOP_AUDIO
130                 <&topckgen 16>, //CLK_TOP_AUD_INTBUS
131                 <&topckgen 70>, //CLK_TOP_MAINPLL_D2_D4
132                 <&topckgen 17>, //CLK_TOP_AUD_1
133                 <&apmixedsys 12>, //CLK_APMIXED_APLL1
134                 <&topckgen 18>, //CLK_TOP_AUD_2
135                 <&apmixedsys 13>, //CLK_APMIXED_APLL2
136                 <&topckgen 19>, //CLK_TOP_AUD_ENGEN1
137                 <&topckgen 101>, //CLK_TOP_APLL1_D8
138                 <&topckgen 20>, //CLK_TOP_AUD_ENGEN2
139                 <&topckgen 104>, //CLK_TOP_APLL2_D8
140                 <&topckgen 63>, //CLK_TOP_APLL_I2S0_MCK_SEL
141                 <&topckgen 64>, //CLK_TOP_APLL_I2S1_MCK_SEL
142                 <&topckgen 65>, //CLK_TOP_APLL_I2S2_MCK_SEL
143                 <&topckgen 66>, //CLK_TOP_APLL_I2S4_MCK_SEL
144                 <&topckgen 67>, //CLK_TOP_APLL_TDMOUT_MCK_SEL
145                 <&topckgen 131>, //CLK_TOP_APLL12_CK_DIV0
146                 <&topckgen 132>, //CLK_TOP_APLL12_CK_DIV1
147                 <&topckgen 133>, //CLK_TOP_APLL12_CK_DIV2
148                 <&topckgen 134>, //CLK_TOP_APLL12_CK_DIV4
149                 <&topckgen 135>, //CLK_TOP_APLL12_CK_DIV_TDMOUT_M
150                 <&topckgen 44>, //CLK_TOP_AUDIO_H
151                 <&clk26m>;
152        clock-names = "aud_infra_clk",
153                      "mtkaif_26m_clk",
154                      "top_mux_audio",
155                      "top_mux_audio_int",
156                      "top_mainpll_d2_d4",
157                      "top_mux_aud_1",
158                      "top_apll1_ck",
159                      "top_mux_aud_2",
160                      "top_apll2_ck",
161                      "top_mux_aud_eng1",
162                      "top_apll1_d8",
163                      "top_mux_aud_eng2",
164                      "top_apll2_d8",
165                      "top_i2s0_m_sel",
166                      "top_i2s1_m_sel",
167                      "top_i2s2_m_sel",
168                      "top_i2s4_m_sel",
169                      "top_tdm_m_sel",
170                      "top_apll12_div0",
171                      "top_apll12_div1",
172                      "top_apll12_div2",
173                      "top_apll12_div4",
174                      "top_apll12_div_tdm",
175                      "top_mux_audio_h",
176                      "top_clk26m_clk";
177        memory-region = <&afe_dma_mem>;
178    };
179
180...
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