cirrus,cs4271.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/sound/cirrus,cs4271.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Cirrus Logic CS4271 audio CODEC
  8
  9maintainers:
 10  - Alexander Sverdlin <alexander.sverdlin@gmail.com>
 11  - Nikita Shubin <nikita.shubin@maquefel.me>
 12
 13description:
 14  The CS4271 is a stereo audio codec. This device supports both the I2C
 15  and the SPI bus.
 16
 17allOf:
 18  - $ref: dai-common.yaml#
 19  - $ref: /schemas/spi/spi-peripheral-props.yaml#
 20
 21properties:
 22  compatible:
 23    const: cirrus,cs4271
 24
 25  reg:
 26    maxItems: 1
 27
 28  clocks:
 29    items:
 30      - description:
 31          Master clock connected to the MCLK pin if MCLK is an input (i.e. no
 32          crystal used).
 33
 34  clock-names:
 35    items:
 36      - const: mclk
 37
 38  spi-cpha: true
 39
 40  spi-cpol: true
 41
 42  '#sound-dai-cells':
 43    const: 0
 44
 45  reset-gpios:
 46    description:
 47      This pin will be deasserted before communication to the codec starts.
 48    maxItems: 1
 49
 50  va-supply:
 51    description: Analog power supply.
 52
 53  vd-supply:
 54    description: Digital power supply.
 55
 56  vl-supply:
 57    description: Serial Control Port power supply.
 58
 59  port:
 60    $ref: audio-graph-port.yaml#
 61    unevaluatedProperties: false
 62
 63  cirrus,amuteb-eq-bmutec:
 64    description:
 65      When given, the Codec's AMUTEB=BMUTEC flag is enabled.
 66    type: boolean
 67
 68  cirrus,enable-soft-reset:
 69    description: |
 70      The CS4271 requires its LRCLK and MCLK to be stable before its RESET
 71      line is de-asserted. That also means that clocks cannot be changed
 72      without putting the chip back into hardware reset, which also requires
 73      a complete re-initialization of all registers.
 74
 75      One (undocumented) workaround is to assert and de-assert the PDN bit
 76      in the MODE2 register. This workaround can be enabled with this DT
 77      property.
 78
 79      Note that this is not needed in case the clocks are stable
 80      throughout the entire runtime of the codec.
 81    type: boolean
 82
 83required:
 84  - compatible
 85  - reg
 86
 87unevaluatedProperties: false
 88
 89examples:
 90  - |
 91    #include <dt-bindings/gpio/gpio.h>
 92    spi {
 93        #address-cells = <1>;
 94        #size-cells = <0>;
 95        codec@0 {
 96            compatible = "cirrus,cs4271";
 97            reg = <0>;
 98            #sound-dai-cells = <0>;
 99            spi-max-frequency = <6000000>;
100            spi-cpol;
101            spi-cpha;
102            reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
103            port {
104                endpoint {
105                    remote-endpoint = <&i2s_ep>;
106                };
107            };
108        };
109    };
110
111...