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qcom,smp2p.yaml

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linux-6.19.14/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml YAML
  1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/soc/qcom/qcom,smp2p.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Qualcomm Shared Memory Point 2 Point
  8
  9maintainers:
 10  - Andy Gross <agross@kernel.org>
 11  - Bjorn Andersson <bjorn.andersson@linaro.org>
 12  - Krzysztof Kozlowski <krzk@kernel.org>
 13
 14description:
 15  The Shared Memory Point to Point (SMP2P) protocol facilitates communication
 16  of a single 32-bit value between two processors.  Each value has a single
 17  writer (the local side) and a single reader (the remote side).  Values are
 18  uniquely identified in the system by the directed edge (local processor ID to
 19  remote processor ID) and a string identifier.
 20
 21properties:
 22  compatible:
 23    const: qcom,smp2p
 24
 25  interrupts:
 26    maxItems: 1
 27
 28  mboxes:
 29    maxItems: 1
 30    description:
 31      Reference to the mailbox representing the outgoing doorbell in APCS for
 32      this client.
 33
 34  qcom,ipc:
 35    $ref: /schemas/types.yaml#/definitions/phandle-array
 36    items:
 37      - items:
 38          - description: phandle to a syscon node representing the APCS registers
 39          - description: u32 representing offset to the register within the syscon
 40          - description: u32 representing the ipc bit within the register
 41    description:
 42      Three entries specifying the outgoing ipc bit used for signaling the
 43      remote end of the smp2p edge.
 44    deprecated: true
 45
 46  qcom,local-pid:
 47    $ref: /schemas/types.yaml#/definitions/uint32
 48    description:
 49      The identifier of the local endpoint of this edge.
 50
 51  qcom,remote-pid:
 52    $ref: /schemas/types.yaml#/definitions/uint32
 53    description:
 54      The identifier of the remote endpoint of this edge.
 55
 56  qcom,smem:
 57    $ref: /schemas/types.yaml#/definitions/uint32-array
 58    maxItems: 2
 59    description:
 60      Two identifiers of the inbound and outbound smem items used for this edge.
 61
 62patternProperties:
 63  "^master-kernel|slave-kernel|ipa-ap-to-modem|ipa-modem-to-ap|wlan-ap-to-wpss|wlan-wpss-to-ap$":
 64    type: object
 65    description:
 66      Each SMP2P pair contain a set of inbound and outbound entries, these are
 67      described in subnodes of the smp2p device node. The node names are not
 68      important.
 69
 70    properties:
 71      interrupt-controller:
 72        description:
 73          Marks the entry as inbound; the node should be specified as a two
 74          cell interrupt-controller.  If not specified this node will denote
 75          the outgoing entry.
 76
 77      '#interrupt-cells':
 78        const: 2
 79
 80      qcom,entry-name:
 81        $ref: /schemas/types.yaml#/definitions/string
 82        description:
 83          The name of this entry, for inbound entries this will be used to
 84          match against the remotely allocated entry and for outbound entries
 85          this name is used for allocating entries.
 86
 87      '#qcom,smem-state-cells':
 88        $ref: /schemas/types.yaml#/definitions/uint32
 89        const: 1
 90        description:
 91          Required for outgoing entries.
 92
 93    required:
 94      - qcom,entry-name
 95
 96    oneOf:
 97      - required:
 98          - interrupt-controller
 99          - '#interrupt-cells'
100      - required:
101          - '#qcom,smem-state-cells'
102
103    additionalProperties: false
104
105required:
106  - compatible
107  - interrupts
108  - qcom,local-pid
109  - qcom,remote-pid
110  - qcom,smem
111
112oneOf:
113  - required:
114      - mboxes
115  - required:
116      - qcom,ipc
117
118additionalProperties: false
119
120examples:
121  # The following example shows the SMP2P setup with the wireless processor,
122  # defined from the 8974 apps processor's point-of-view. It encompasses one
123  # inbound and one outbound entry.
124  - |
125    #include <dt-bindings/interrupt-controller/arm-gic.h>
126
127    shared-memory {
128        compatible = "qcom,smp2p";
129        qcom,smem = <431>, <451>;
130        interrupts = <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>;
131        mboxes = <&apcs 18>;
132        qcom,local-pid = <0>;
133        qcom,remote-pid = <4>;
134
135        wcnss_smp2p_out: master-kernel {
136            qcom,entry-name = "master-kernel";
137            #qcom,smem-state-cells = <1>;
138        };
139
140        wcnss_smp2p_in: slave-kernel {
141            qcom,entry-name = "slave-kernel";
142            interrupt-controller;
143            #interrupt-cells = <2>;
144        };
145    };
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