fsl,imx8mm-vpu-blk-ctrl.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: NXP i.MX8MM VPU blk-ctrl
  8
  9maintainers:
 10  - Lucas Stach <l.stach@pengutronix.de>
 11
 12description:
 13  The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to
 14  the NoC and ensuring proper power sequencing of the VPU peripherals
 15  located in the VPU domain of the SoC.
 16
 17properties:
 18  compatible:
 19    items:
 20      - const: fsl,imx8mm-vpu-blk-ctrl
 21      - const: syscon
 22
 23  reg:
 24    maxItems: 1
 25
 26  '#power-domain-cells':
 27    const: 1
 28
 29  power-domains:
 30    maxItems: 4
 31
 32  power-domain-names:
 33    maxItems: 4
 34
 35  clocks:
 36    maxItems: 3
 37
 38  clock-names:
 39    maxItems: 3
 40
 41  interconnects:
 42    maxItems: 3
 43
 44  interconnect-names:
 45    maxItems: 3
 46
 47required:
 48  - compatible
 49  - reg
 50  - power-domains
 51  - power-domain-names
 52  - clocks
 53  - clock-names
 54
 55allOf:
 56  - if:
 57      properties:
 58        compatible:
 59          contains:
 60            const: fsl,imx8mm-vpu-blk-ctrl
 61    then:
 62      properties:
 63        power-domains:
 64          items:
 65            - description: bus power domain
 66            - description: G1 decoder power domain
 67            - description: G2 decoder power domain
 68            - description: H1 encoder power domain
 69
 70        power-domain-names:
 71          items:
 72            - const: bus
 73            - const: g1
 74            - const: g2
 75            - const: h1
 76
 77        clocks:
 78          items:
 79            - description: G1 decoder clk
 80            - description: G2 decoder clk
 81            - description: H1 encoder clk
 82
 83        clock-names:
 84          items:
 85            - const: g1
 86            - const: g2
 87            - const: h1
 88
 89        interconnects:
 90          items:
 91            - description: G1 decoder interconnect
 92            - description: G2 decoder interconnect
 93            - description: H1 encoder power domain
 94
 95        interconnect-names:
 96          items:
 97            - const: g1
 98            - const: g2
 99            - const: h1
100
101  - if:
102      properties:
103        compatible:
104          contains:
105            const: fsl,imx8mp-vpu-blk-ctrl
106    then:
107      properties:
108        power-domains:
109          items:
110            - description: bus power domain
111            - description: G1 decoder power domain
112            - description: G2 decoder power domain
113            - description: VC8000E encoder power domain
114
115        power-domain-names:
116          items:
117            - const: bus
118            - const: g1
119            - const: g2
120            - const: vc8000e
121
122        clocks:
123          items:
124            - description: G1 decoder clk
125            - description: G2 decoder clk
126            - description: VC8000E encoder clk
127
128        clock-names:
129          items:
130            - const: g1
131            - const: g2
132            - const: vc8000e
133
134        interconnects:
135          items:
136            - description: G1 decoder interconnect
137            - description: G2 decoder interconnect
138            - description: VC8000E encoder interconnect
139
140        interconnect-names:
141          items:
142            - const: g1
143            - const: g2
144            - const: vc8000e
145
146additionalProperties: false
147
148examples:
149  - |
150    #include <dt-bindings/clock/imx8mm-clock.h>
151    #include <dt-bindings/power/imx8mm-power.h>
152
153    blk-ctrl@38330000 {
154      compatible = "fsl,imx8mm-vpu-blk-ctrl", "syscon";
155      reg = <0x38330000 0x100>;
156      power-domains = <&pgc_vpumix>, <&pgc_vpu_g1>,
157                      <&pgc_vpu_g2>, <&pgc_vpu_h1>;
158      power-domain-names = "bus", "g1", "g2", "h1";
159      clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>,
160               <&clk IMX8MM_CLK_VPU_G2_ROOT>,
161               <&clk IMX8MM_CLK_VPU_H1_ROOT>;
162      clock-names = "g1", "g2", "h1";
163      #power-domain-cells = <1>;
164    };