samsung_uart.yaml

  1# SPDX-License-Identifier: GPL-2.0
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/serial/samsung_uart.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Samsung S3C, S5P, Exynos, and S5L (Apple SoC) SoC UART Controller
  8
  9maintainers:
 10  - Krzysztof Kozlowski <krzk@kernel.org>
 11  - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 12
 13description: |+
 14  Each Samsung UART should have an alias correctly numbered in the "aliases"
 15  node, according to serialN format, where N is the port number (non-negative
 16  decimal integer) as specified by User's Manual of respective SoC.
 17
 18properties:
 19  compatible:
 20    oneOf:
 21      - enum:
 22          - apple,s5l-uart
 23          - axis,artpec8-uart
 24          - google,gs101-uart
 25          - samsung,s3c6400-uart
 26          - samsung,s5pv210-uart
 27          - samsung,exynos4210-uart
 28          - samsung,exynos5433-uart
 29          - samsung,exynos850-uart
 30          - samsung,exynos8895-uart
 31      - items:
 32          - enum:
 33              - samsung,exynos2200-uart
 34          - const: google,gs101-uart
 35      - items:
 36          - enum:
 37              - samsung,exynos7-uart
 38              - tesla,fsd-uart
 39          - const: samsung,exynos4210-uart
 40      - items:
 41          - enum:
 42              - samsung,exynos7885-uart
 43          - const: samsung,exynos5433-uart
 44      - items:
 45          - enum:
 46              - samsung,exynosautov9-uart
 47              - samsung,exynosautov920-uart
 48          - const: samsung,exynos850-uart
 49      - items:
 50          - enum:
 51              - axis,artpec9-uart
 52              - samsung,exynos7870-uart
 53              - samsung,exynos8890-uart
 54          - const: samsung,exynos8895-uart
 55
 56  reg:
 57    maxItems: 1
 58
 59  reg-io-width:
 60    description: |
 61      The size (in bytes) of the IO accesses that should be performed
 62      on the device.
 63    enum: [ 1, 4 ]
 64
 65  clocks:
 66    minItems: 2
 67    maxItems: 5
 68
 69  clock-names:
 70    minItems: 2
 71    maxItems: 5
 72
 73  dmas:
 74    items:
 75      - description: DMA controller phandle and request line for RX
 76      - description: DMA controller phandle and request line for TX
 77
 78  dma-names:
 79    items:
 80      - const: rx
 81      - const: tx
 82
 83  interrupts:
 84    description: RX interrupt and optionally TX interrupt.
 85    minItems: 1
 86    maxItems: 2
 87
 88  power-domains:
 89    maxItems: 1
 90
 91  samsung,uart-fifosize:
 92    description: The fifo size supported by the UART channel.
 93    $ref: /schemas/types.yaml#/definitions/uint32
 94    enum: [16, 64, 256]
 95
 96required:
 97  - compatible
 98  - clocks
 99  - clock-names
100  - interrupts
101  - reg
102
103allOf:
104  - $ref: serial.yaml#
105
106  - if:
107      properties:
108        compatible:
109          contains:
110            enum:
111              - samsung,s3c6400-uart
112    then:
113      properties:
114        clocks:
115          minItems: 3
116          maxItems: 3
117
118        clock-names:
119          items:
120            - const: uart
121            - const: clk_uart_baud2
122            - const: clk_uart_baud3
123
124    else:
125      properties:
126        clock-names:
127          minItems: 2
128          items:
129            - const: uart
130            - const: clk_uart_baud0
131            - const: clk_uart_baud1
132            - const: clk_uart_baud2
133            - const: clk_uart_baud3
134
135  - if:
136      properties:
137        compatible:
138          contains:
139            enum:
140              - samsung,s5pv210-uart
141    then:
142      properties:
143        clocks:
144          minItems: 3
145          maxItems: 3
146
147        clock-names:
148          minItems: 3
149          maxItems: 3
150
151  - if:
152      properties:
153        compatible:
154          contains:
155            enum:
156              - apple,s5l-uart
157              - axis,artpec8-uart
158              - samsung,exynos4210-uart
159              - samsung,exynos5433-uart
160    then:
161      properties:
162        clocks:
163          maxItems: 2
164
165        clock-names:
166          maxItems: 2
167
168  - if:
169      properties:
170        compatible:
171          contains:
172            enum:
173              - google,gs101-uart
174              - samsung,exynos8895-uart
175    then:
176      required:
177        - samsung,uart-fifosize
178      properties:
179        clocks:
180          maxItems: 2
181
182        clock-names:
183          maxItems: 2
184
185  - if:
186      properties:
187        compatible:
188          contains:
189            enum:
190              - google,gs101-uart
191    then:
192      properties:
193        reg-io-width: false
194
195unevaluatedProperties: false
196
197examples:
198  - |
199    #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
200
201    uart0: serial@7f005000 {
202        compatible = "samsung,s3c6400-uart";
203        reg = <0x7f005000 0x100>;
204        interrupt-parent = <&vic1>;
205        interrupts = <5>;
206        clock-names = "uart", "clk_uart_baud2",
207                      "clk_uart_baud3";
208        clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
209                 <&clocks SCLK_UART>;
210        samsung,uart-fifosize = <16>;
211    };
212  - |
213    #include <dt-bindings/clock/google,gs101.h>
214    #include <dt-bindings/interrupt-controller/arm-gic.h>
215    #include <dt-bindings/interrupt-controller/irq.h>
216
217    serial_0: serial@10a00000 {
218      compatible = "google,gs101-uart";
219      reg = <0x10a00000 0xc0>;
220      clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>,
221               <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
222      clock-names = "uart", "clk_uart_baud0";
223      interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>;
224      pinctrl-0 = <&uart0_bus>;
225      pinctrl-names = "default";
226      samsung,uart-fifosize = <256>;
227    };