nvidia,tegra20-hsuart.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/serial/nvidia,tegra20-hsuart.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: NVIDIA Tegra20/Tegra30 high speed (DMA based) UART controller driver
  8
  9maintainers:
 10  - Thierry Reding <thierry.reding@gmail.com>
 11  - Jon Hunter <jonathanh@nvidia.com>
 12
 13properties:
 14  compatible:
 15    oneOf:
 16      - enum:
 17          - nvidia,tegra20-hsuart
 18          - nvidia,tegra30-hsuart
 19          - nvidia,tegra186-hsuart
 20          - nvidia,tegra194-hsuart
 21      - items:
 22          - const: nvidia,tegra124-hsuart
 23          - const: nvidia,tegra30-hsuart
 24
 25  reg:
 26    maxItems: 1
 27
 28  interrupts:
 29    maxItems: 1
 30
 31  clocks:
 32    items:
 33      - description: module clock
 34
 35  resets:
 36    items:
 37      - description: module reset
 38
 39  reset-names:
 40    items:
 41      - const: serial
 42
 43  dmas:
 44    items:
 45      - description: DMA channel used for reception
 46      - description: DMA channel used for transmission
 47
 48  dma-names:
 49    items:
 50      - const: rx
 51      - const: tx
 52
 53  nvidia,enable-modem-interrupt:
 54    $ref: /schemas/types.yaml#/definitions/flag
 55    description: Enable modem interrupts. Should be enable only if all 8 lines of UART controller
 56      are pinmuxed.
 57
 58  nvidia,adjust-baud-rates:
 59    $ref: /schemas/types.yaml#/definitions/uint32-matrix
 60    description: |
 61      List of entries providing percentage of baud rate adjustment within a range. Each entry
 62      contains a set of 3 values: range low/high and adjusted rate. When the baud rate set on the
 63      controller falls within the range mentioned in this field, the baud rate will be adjusted by
 64      percentage mentioned here.
 65
 66      Example: <9600 115200 200>
 67
 68      Increase baud rate by 2% when set baud rate falls within range 9600 to 115200.
 69
 70      Standard UART devices are expected to have tolerance for baud rate error by -4 to +4 %. All
 71      Tegra devices till Tegra210 had this support. However, Tegra186 chip has a known hardware
 72      issue. UART RX baud rate tolerance level is 0% to +4% in 1-stop config. Otherwise, the
 73      received data will have corruption/invalid framing errors. Parker errata suggests adjusting
 74      baud rate to be higher than the deviations observed in TX.
 75
 76      TX deviation of connected device can be captured over scope (or noted from its spec) for
 77      valid range and Tegra baud rate has to be set above actual TX baud rate observed. To do this
 78      we use nvidia,adjust-baud-rates.
 79
 80      As an example, consider there is deviation observed in TX for baud rates as listed below. 0
 81      to 9600 has 1% deviation 9600 to 115200 2% deviation. This slight deviation is expected and
 82      Tegra UART is expected to handle it. Due to the issue stated above, baud rate on Tegra UART
 83      should be set equal to or above deviation observed for avoiding frame errors. Property
 84      should be set like this:
 85
 86        nvidia,adjust-baud-rates = <0 9600 100>,
 87                                   <9600 115200 200>;
 88    items:
 89      items:
 90        - description: range lower bound
 91        - description: range upper bound
 92        - description: adjustment (in permyriad, i.e. 0.01%)
 93
 94required:
 95  - compatible
 96  - reg
 97  - interrupts
 98  - clocks
 99  - resets
100  - reset-names
101  - dmas
102  - dma-names
103
104allOf:
105  - $ref: serial.yaml
106
107unevaluatedProperties: false
108
109examples:
110  - |
111    #include <dt-bindings/clock/tegra30-car.h>
112    #include <dt-bindings/interrupt-controller/arm-gic.h>
113
114    serial@70006000 {
115        compatible = "nvidia,tegra30-hsuart";
116        reg = <0x70006000 0x40>;
117        interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
118        nvidia,enable-modem-interrupt;
119        clocks = <&tegra_car TEGRA30_CLK_UARTA>;
120        resets = <&tegra_car 6>;
121        reset-names = "serial";
122        dmas = <&apbdma 8>, <&apbdma 8>;
123        dma-names = "rx", "tx";
124        nvidia,adjust-baud-rates = <1000000 4000000 136>; /* 1.36% shift */
125    };