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renesas,rzg2l-usbphy-ctrl.yaml

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linux-6.19.14/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml YAML
  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/reset/renesas,rzg2l-usbphy-ctrl.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Renesas RZ/{G2L,V2L} USBPHY Control
  8
  9maintainers:
 10  - Biju Das <biju.das.jz@bp.renesas.com>
 11
 12description:
 13  The RZ/G2L USBPHY Control mainly controls reset and power down of the
 14  USB/PHY.
 15
 16properties:
 17  compatible:
 18    oneOf:
 19      - items:
 20          - enum:
 21              - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five
 22              - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC}
 23              - renesas,r9a07g054-usbphy-ctrl # RZ/V2L
 24          - const: renesas,rzg2l-usbphy-ctrl
 25      - const: renesas,r9a08g045-usbphy-ctrl # RZ/G3S
 26
 27  reg:
 28    maxItems: 1
 29
 30  clocks:
 31    maxItems: 1
 32
 33  resets:
 34    maxItems: 1
 35
 36  power-domains:
 37    maxItems: 1
 38
 39  '#reset-cells':
 40    const: 1
 41    description: |
 42      The phandle's argument in the reset specifier is the PHY reset associated
 43      with the USB port.
 44      0 = Port 1 Phy reset
 45      1 = Port 2 Phy reset
 46
 47  regulator-vbus:
 48    type: object
 49    description: USB VBUS regulator
 50    $ref: /schemas/regulator/regulator.yaml#
 51    unevaluatedProperties: false
 52
 53  renesas,sysc-pwrrdy:
 54    description:
 55      The system controller PWRRDY indicates to the USB PHY if the power supply
 56      is ready. PWRRDY needs to be set during power-on before applying any
 57      other settings. It also needs to be set before powering off the USB.
 58    $ref: /schemas/types.yaml#/definitions/phandle-array
 59    items:
 60      - items:
 61          - description:
 62              System controller phandle required by USB PHY CTRL driver to set
 63              PWRRDY
 64          - description: Register offset associated with PWRRDY
 65          - description: Register bitmask associated with PWRRDY
 66
 67required:
 68  - compatible
 69  - reg
 70  - clocks
 71  - resets
 72  - power-domains
 73  - '#reset-cells'
 74  - regulator-vbus
 75
 76allOf:
 77  - if:
 78      properties:
 79        compatible:
 80          contains:
 81            const: renesas,r9a08g045-usbphy-ctrl
 82    then:
 83      required:
 84        - renesas,sysc-pwrrdy
 85    else:
 86      properties:
 87        renesas,sysc-pwrrdy: false
 88
 89additionalProperties: false
 90
 91examples:
 92  - |
 93    #include <dt-bindings/clock/r9a07g044-cpg.h>
 94
 95    phyrst: usbphy-ctrl@11c40000 {
 96        compatible = "renesas,r9a07g044-usbphy-ctrl",
 97                     "renesas,rzg2l-usbphy-ctrl";
 98        reg = <0x11c40000 0x10000>;
 99        clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>;
100        resets = <&cpg R9A07G044_USB_PRESETN>;
101        power-domains = <&cpg>;
102        #reset-cells = <1>;
103        regulator-vbus {
104            regulator-name = "vbus";
105        };
106    };
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