fsl,imx-rproc.yaml

  1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: NXP i.MX Co-Processor
  8
  9description:
 10  This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
 11
 12maintainers:
 13  - Peng Fan <peng.fan@nxp.com>
 14
 15properties:
 16  compatible:
 17    enum:
 18      - fsl,imx6sx-cm4
 19      - fsl,imx7d-cm4
 20      - fsl,imx7ulp-cm4
 21      - fsl,imx8mm-cm4
 22      - fsl,imx8mn-cm7
 23      - fsl,imx8mn-cm7-mmio
 24      - fsl,imx8mp-cm7
 25      - fsl,imx8mp-cm7-mmio
 26      - fsl,imx8mq-cm4
 27      - fsl,imx8qm-cm4
 28      - fsl,imx8qxp-cm4
 29      - fsl,imx8ulp-cm33
 30      - fsl,imx93-cm33
 31
 32  clocks:
 33    maxItems: 1
 34
 35  syscon:
 36    $ref: /schemas/types.yaml#/definitions/phandle
 37    description:
 38      Phandle to syscon block which provide access to System Reset Controller
 39
 40  mbox-names:
 41    items:
 42      - const: tx
 43      - const: rx
 44      - const: rxdb
 45
 46  mboxes:
 47    description:
 48      This property is required only if the rpmsg/virtio functionality is used.
 49      List of <&phandle type channel> - 1 channel for TX, 1 channel for RX, 1 channel for RXDB.
 50      (see mailbox/fsl,mu.yaml)
 51    minItems: 1
 52    maxItems: 3
 53
 54  memory-region:
 55    description:
 56      If present, a phandle for a reserved memory area that used for vdev buffer,
 57      resource table, vring region and others used by remote processor.
 58    minItems: 1
 59    maxItems: 32
 60
 61  power-domains:
 62    minItems: 2
 63    maxItems: 8
 64
 65  fsl,auto-boot:
 66    $ref: /schemas/types.yaml#/definitions/flag
 67    description:
 68      Indicate whether need to load the default firmware and start the remote
 69      processor automatically.
 70
 71  fsl,entry-address:
 72    $ref: /schemas/types.yaml#/definitions/uint32
 73    description:
 74      Specify CPU entry address for SCU enabled processor.
 75
 76  fsl,iomuxc-gpr:
 77    $ref: /schemas/types.yaml#/definitions/phandle
 78    description:
 79      Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit.
 80
 81  fsl,resource-id:
 82    $ref: /schemas/types.yaml#/definitions/uint32
 83    description:
 84      This property is to specify the resource id of the remote processor in SoC
 85      which supports SCFW
 86
 87required:
 88  - compatible
 89
 90allOf:
 91  - if:
 92      properties:
 93        compatible:
 94          not:
 95            contains:
 96              enum:
 97                - fsl,imx8mn-cm7-mmio
 98                - fsl,imx8mp-cm7-mmio
 99    then:
100      properties:
101        fsl,iomuxc-gpr: false
102
103  - if:
104      properties:
105        compatible:
106          contains:
107            enum:
108              - fsl,imx8qxp-cm4
109              - fsl,imx8qm-cm4
110    then:
111      required:
112        - power-domains
113    else:
114      properties:
115        power-domains: false
116
117additionalProperties: false
118
119examples:
120  - |
121    #include <dt-bindings/clock/imx7d-clock.h>
122    m4_reserved_sysmem1: cm4@80000000 {
123      reg = <0x80000000 0x80000>;
124    };
125
126    m4_reserved_sysmem2: cm4@81000000 {
127      reg = <0x81000000 0x80000>;
128    };
129
130    imx7d-cm4 {
131      compatible = "fsl,imx7d-cm4";
132      memory-region = <&m4_reserved_sysmem1>, <&m4_reserved_sysmem2>;
133      syscon = <&src>;
134      clocks = <&clks IMX7D_ARM_M4_ROOT_CLK>;
135    };
136
137  - |
138    #include <dt-bindings/clock/imx8mm-clock.h>
139
140    imx8mm-cm4 {
141      compatible = "fsl,imx8mm-cm4";
142      clocks = <&clk IMX8MM_CLK_M4_DIV>;
143      mbox-names = "tx", "rx", "rxdb";
144      mboxes = <&mu 0 1
145                &mu 1 1
146                &mu 3 1>;
147      memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>, <&rsc_table>;
148      syscon = <&src>;
149    };
150...