pwm-samsung.yaml

  1# SPDX-License-Identifier: GPL-2.0
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Samsung SoC PWM timers
  8
  9maintainers:
 10  - Thierry Reding <thierry.reding@gmail.com>
 11  - Krzysztof Kozlowski <krzk@kernel.org>
 12
 13description: |+
 14  Samsung SoCs contain PWM timer blocks which can be used for system clock source
 15  and clock event timers, as well as to drive SoC outputs with PWM signal. Each
 16  PWM timer block provides 5 PWM channels (not all of them can drive physical
 17  outputs - see SoC and board manual).
 18
 19  Be aware that the clocksource driver supports only uniprocessor systems.
 20
 21properties:
 22  compatible:
 23    oneOf:
 24      - enum:
 25          - samsung,s3c2410-pwm             # 16-bit, S3C24xx
 26          - samsung,s3c6400-pwm             # 32-bit, S3C64xx
 27          - samsung,s5p6440-pwm             # 32-bit, S5P64x0
 28          - samsung,s5pc100-pwm             # 32-bit, S5PC100, S5PV210, Exynos4210 rev0 SoCs
 29          - samsung,exynos4210-pwm          # 32-bit, Exynos
 30      - items:
 31          - enum:
 32              - samsung,exynos5433-pwm
 33              - samsung,exynos7-pwm
 34              - samsung,exynos8890-pwm
 35              - samsung,exynosautov9-pwm
 36              - samsung,exynosautov920-pwm
 37              - tesla,fsd-pwm
 38          - const: samsung,exynos4210-pwm
 39
 40  reg:
 41    maxItems: 1
 42
 43  clocks:
 44    minItems: 1
 45    maxItems: 3
 46
 47  clock-names:
 48    description: |
 49      Should contain all following required clock names:
 50      - "timers" - PWM base clock used to generate PWM signals,
 51      and any subset of following optional clock names:
 52      - "pwm-tclk0" - first external PWM clock source,
 53      - "pwm-tclk1" - second external PWM clock source.
 54      Note that not all IP variants allow using all external clock sources.
 55      Refer to SoC documentation to learn which clock source configurations
 56      are available.
 57    oneOf:
 58      - items:
 59          - const: timers
 60      - items:
 61          - const: timers
 62          - const: pwm-tclk0
 63      - items:
 64          - const: timers
 65          - const: pwm-tclk1
 66      - items:
 67          - const: timers
 68          - const: pwm-tclk0
 69          - const: pwm-tclk1
 70
 71  interrupts:
 72    description:
 73      One interrupt per timer, starting at timer 0. Necessary only for SoCs which
 74      use PWM clocksource.
 75    minItems: 1
 76    maxItems: 5
 77
 78  "#pwm-cells":
 79    description:
 80      The only third cell flag supported by this binding
 81      is PWM_POLARITY_INVERTED.
 82    const: 3
 83
 84  samsung,pwm-outputs:
 85    description:
 86      A list of PWM channels used as PWM outputs on particular platform.
 87      It is an array of up to 5 elements being indices of PWM channels
 88      (from 0 to 4), the order does not matter.
 89    $ref: /schemas/types.yaml#/definitions/uint32-array
 90    uniqueItems: true
 91    items:
 92      minimum: 0
 93      maximum: 4
 94
 95required:
 96  - clocks
 97  - clock-names
 98  - compatible
 99  - reg
100
101additionalProperties: false
102
103allOf:
104  - $ref: pwm.yaml#
105
106  - if:
107      properties:
108        compatible:
109          contains:
110            enum:
111              - samsung,s3c2410-pwm
112              - samsung,s3c6400-pwm
113              - samsung,s5p6440-pwm
114              - samsung,s5pc100-pwm
115    then:
116      required:
117        - interrupts
118
119examples:
120  - |
121    pwm@7f006000 {
122        compatible = "samsung,s3c6400-pwm";
123        reg = <0x7f006000 0x1000>;
124        interrupt-parent = <&vic0>;
125        interrupts = <23>, <24>, <25>, <27>, <28>;
126        clocks = <&clock 67>;
127        clock-names = "timers";
128        samsung,pwm-outputs = <0>, <1>;
129        #pwm-cells = <3>;
130    };