rockchip,power-controller.yaml

  1# SPDX-License-Identifier: GPL-2.0
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Rockchip Power Domains
  8
  9maintainers:
 10  - Elaine Zhang <zhangqing@rock-chips.com>
 11  - Heiko Stuebner <heiko@sntech.de>
 12
 13description: |
 14  Rockchip processors include support for multiple power domains
 15  which can be powered up/down by software based on different
 16  application scenarios to save power.
 17
 18  Power domains contained within power-controller node are
 19  generic power domain providers documented in
 20  Documentation/devicetree/bindings/power/power-domain.yaml.
 21
 22  IP cores belonging to a power domain should contain a
 23  "power-domains" property that is a phandle for the
 24  power domain node representing the domain.
 25
 26properties:
 27  $nodename:
 28    const: power-controller
 29
 30  compatible:
 31    enum:
 32      - rockchip,px30-power-controller
 33      - rockchip,rk3036-power-controller
 34      - rockchip,rk3066-power-controller
 35      - rockchip,rk3128-power-controller
 36      - rockchip,rk3188-power-controller
 37      - rockchip,rk3228-power-controller
 38      - rockchip,rk3288-power-controller
 39      - rockchip,rk3328-power-controller
 40      - rockchip,rk3366-power-controller
 41      - rockchip,rk3368-power-controller
 42      - rockchip,rk3399-power-controller
 43      - rockchip,rk3528-power-controller
 44      - rockchip,rk3562-power-controller
 45      - rockchip,rk3568-power-controller
 46      - rockchip,rk3576-power-controller
 47      - rockchip,rk3588-power-controller
 48      - rockchip,rv1126-power-controller
 49      - rockchip,rv1126b-power-controller
 50
 51  "#power-domain-cells":
 52    const: 1
 53
 54  "#address-cells":
 55    const: 1
 56
 57  "#size-cells":
 58    const: 0
 59
 60required:
 61  - compatible
 62  - "#power-domain-cells"
 63
 64additionalProperties: false
 65
 66patternProperties:
 67  "^power-domain@[0-9a-f]+$":
 68
 69    $ref: "#/$defs/pd-node"
 70
 71    unevaluatedProperties: false
 72
 73    properties:
 74      "#address-cells":
 75        const: 1
 76
 77      "#size-cells":
 78        const: 0
 79
 80    patternProperties:
 81      "^power-domain@[0-9a-f]+$":
 82
 83        $ref: "#/$defs/pd-node"
 84
 85        unevaluatedProperties: false
 86
 87        properties:
 88          "#address-cells":
 89            const: 1
 90
 91          "#size-cells":
 92            const: 0
 93
 94        patternProperties:
 95          "^power-domain@[0-9a-f]+$":
 96
 97            $ref: "#/$defs/pd-node"
 98
 99            unevaluatedProperties: false
100
101            properties:
102              "#power-domain-cells":
103                const: 0
104
105$defs:
106  pd-node:
107    type: object
108    description: |
109      Represents the power domains within the power controller node.
110
111    properties:
112      reg:
113        maxItems: 1
114        description: |
115          Power domain index. Valid values are defined in
116          "include/dt-bindings/power/px30-power.h"
117          "include/dt-bindings/power/rk3036-power.h"
118          "include/dt-bindings/power/rk3066-power.h"
119          "include/dt-bindings/power/rk3128-power.h"
120          "include/dt-bindings/power/rk3188-power.h"
121          "include/dt-bindings/power/rk3228-power.h"
122          "include/dt-bindings/power/rk3288-power.h"
123          "include/dt-bindings/power/rk3328-power.h"
124          "include/dt-bindings/power/rk3366-power.h"
125          "include/dt-bindings/power/rk3368-power.h"
126          "include/dt-bindings/power/rk3399-power.h"
127          "include/dt-bindings/power/rk3568-power.h"
128          "include/dt-bindings/power/rk3588-power.h"
129          "include/dt-bindings/power/rockchip,rv1126-power.h"
130          "include/dt-bindings/power/rockchip,rv1126b-power-controller.h"
131
132      clocks:
133        minItems: 1
134        maxItems: 30
135        description: |
136          A number of phandles to clocks that need to be enabled
137          while power domain switches state.
138
139      domain-supply:
140        description: domain regulator supply.
141
142      pm_qos:
143        $ref: /schemas/types.yaml#/definitions/phandle-array
144        items:
145          maxItems: 1
146        description: |
147          A number of phandles to qos blocks which need to be saved and restored
148          while power domain switches state.
149
150      "#power-domain-cells":
151        enum: [0, 1]
152        description:
153          Must be 0 for nodes representing a single PM domain and 1 for nodes
154          providing multiple PM domains.
155
156    required:
157      - reg
158      - "#power-domain-cells"
159
160examples:
161  - |
162    #include <dt-bindings/clock/rk3399-cru.h>
163    #include <dt-bindings/power/rk3399-power.h>
164
165    soc {
166        #address-cells = <2>;
167        #size-cells = <2>;
168
169        qos_hdcp: qos@ffa90000 {
170            compatible = "rockchip,rk3399-qos", "syscon";
171            reg = <0x0 0xffa90000 0x0 0x20>;
172        };
173
174        qos_iep: qos@ffa98000 {
175            compatible = "rockchip,rk3399-qos", "syscon";
176            reg = <0x0 0xffa98000 0x0 0x20>;
177        };
178
179        qos_rga_r: qos@ffab0000 {
180            compatible = "rockchip,rk3399-qos", "syscon";
181            reg = <0x0 0xffab0000 0x0 0x20>;
182        };
183
184        qos_rga_w: qos@ffab0080 {
185            compatible = "rockchip,rk3399-qos", "syscon";
186            reg = <0x0 0xffab0080 0x0 0x20>;
187        };
188
189        qos_video_m0: qos@ffab8000 {
190            compatible = "rockchip,rk3399-qos", "syscon";
191            reg = <0x0 0xffab8000 0x0 0x20>;
192        };
193
194        qos_video_m1_r: qos@ffac0000 {
195            compatible = "rockchip,rk3399-qos", "syscon";
196            reg = <0x0 0xffac0000 0x0 0x20>;
197        };
198
199        qos_video_m1_w: qos@ffac0080 {
200            compatible = "rockchip,rk3399-qos", "syscon";
201            reg = <0x0 0xffac0080 0x0 0x20>;
202        };
203
204        power-management@ff310000 {
205            compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd";
206            reg = <0x0 0xff310000 0x0 0x1000>;
207
208            power-controller {
209                compatible = "rockchip,rk3399-power-controller";
210                #power-domain-cells = <1>;
211                #address-cells = <1>;
212                #size-cells = <0>;
213
214                /* These power domains are grouped by VD_CENTER */
215                power-domain@RK3399_PD_IEP {
216                    reg = <RK3399_PD_IEP>;
217                    clocks = <&cru ACLK_IEP>,
218                             <&cru HCLK_IEP>;
219                    pm_qos = <&qos_iep>;
220                    #power-domain-cells = <0>;
221                };
222                power-domain@RK3399_PD_RGA {
223                    reg = <RK3399_PD_RGA>;
224                    clocks = <&cru ACLK_RGA>,
225                             <&cru HCLK_RGA>;
226                    pm_qos = <&qos_rga_r>,
227                             <&qos_rga_w>;
228                    #power-domain-cells = <0>;
229                };
230                power-domain@RK3399_PD_VCODEC {
231                    reg = <RK3399_PD_VCODEC>;
232                    clocks = <&cru ACLK_VCODEC>,
233                             <&cru HCLK_VCODEC>;
234                    pm_qos = <&qos_video_m0>;
235                    #power-domain-cells = <0>;
236                };
237                power-domain@RK3399_PD_VDU {
238                    reg = <RK3399_PD_VDU>;
239                    clocks = <&cru ACLK_VDU>,
240                             <&cru HCLK_VDU>;
241                    pm_qos = <&qos_video_m1_r>,
242                             <&qos_video_m1_w>;
243                    #power-domain-cells = <0>;
244                };
245                power-domain@RK3399_PD_VIO {
246                    reg = <RK3399_PD_VIO>;
247                    #power-domain-cells = <1>;
248                    #address-cells = <1>;
249                    #size-cells = <0>;
250
251                    power-domain@RK3399_PD_HDCP {
252                        reg = <RK3399_PD_HDCP>;
253                        clocks = <&cru ACLK_HDCP>,
254                                 <&cru HCLK_HDCP>,
255                                 <&cru PCLK_HDCP>;
256                        pm_qos = <&qos_hdcp>;
257                        #power-domain-cells = <0>;
258                    };
259                };
260            };
261        };
262    };