renesas,rza1-ports.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/pinctrl/renesas,rza1-ports.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Renesas RZ/A1 combined Pin and GPIO controller
  8
  9maintainers:
 10  - Jacopo Mondi <jacopo+renesas@jmondi.org>
 11  - Geert Uytterhoeven <geert+renesas@glider.be>
 12
 13description:
 14  The Renesas SoCs of the RZ/A1 family feature a combined Pin and GPIO
 15  controller, named "Ports" in the hardware reference manual.
 16  Pin multiplexing and GPIO configuration is performed on a per-pin basis
 17  writing configuration values to per-port register sets.
 18  Each "port" features up to 16 pins, each of them configurable for GPIO
 19  function (port mode) or in alternate function mode.
 20  Up to 8 different alternate function modes exist for each single pin.
 21
 22properties:
 23  compatible:
 24    oneOf:
 25      - const: renesas,r7s72100-ports     # RZ/A1H
 26      - items:
 27          - const: renesas,r7s72101-ports # RZ/A1M
 28          - const: renesas,r7s72100-ports # fallback
 29      - const: renesas,r7s72102-ports     # RZ/A1L
 30
 31  reg:
 32    maxItems: 1
 33
 34allOf:
 35  - $ref: pinctrl.yaml#
 36
 37required:
 38  - compatible
 39  - reg
 40
 41patternProperties:
 42  "^gpio-[0-9]*$":
 43    type: object
 44    additionalProperties: false
 45
 46    description:
 47      Each port of the r7s72100 pin controller hardware is itself a GPIO
 48      controller.
 49      Different SoCs have different numbers of available pins per port, but
 50      generally speaking, each of them can be configured in GPIO ("port") mode
 51      on this hardware.
 52      Describe GPIO controllers using sub-nodes with the following properties.
 53
 54    properties:
 55      gpio-controller: true
 56
 57      '#gpio-cells':
 58        const: 2
 59
 60      gpio-ranges:
 61        maxItems: 1
 62
 63    required:
 64      - gpio-controller
 65      - '#gpio-cells'
 66      - gpio-ranges
 67
 68additionalProperties:
 69  anyOf:
 70    - type: object
 71      allOf:
 72        - $ref: pincfg-node.yaml#
 73        - $ref: pinmux-node.yaml#
 74
 75      description:
 76        A pin multiplexing sub-node describes how to configure a set of (or a
 77        single) pin in some desired alternate function mode.
 78        A single sub-node may define several pin configurations.
 79        A few alternate function require special pin configuration flags to be
 80        supplied along with the alternate function configuration number.
 81        The hardware reference manual specifies when a pin function requires
 82        "software IO driven" mode to be specified. To do so use the generic
 83        properties from the <include/linux/pinctrl/pinconf_generic.h> header
 84        file to instruct the pin controller to perform the desired pin
 85        configuration operation.
 86        The hardware reference manual specifies when a pin has to be configured
 87        to work in bi-directional mode and when the IO direction has to be
 88        specified by software. Bi-directional pins must be managed by the pin
 89        controller driver internally, while software driven IO direction has to
 90        be explicitly selected when multiple options are available.
 91
 92      properties:
 93        pinmux:
 94          description: |
 95            Integer array representing pin number and pin multiplexing
 96            configuration.
 97            When a pin has to be configured in alternate function mode, use
 98            this property to identify the pin by its global index, and provide
 99            its alternate function configuration number along with it.
100            When multiple pins are required to be configured as part of the
101            same alternate function they shall be specified as members of the
102            same argument list of a single "pinmux" property.
103            Helper macros to ease assembling the pin index from its position
104            (port where it sits on and pin number) and alternate function
105            identifier are provided by the pin controller header file at:
106            <include/dt-bindings/pinctrl/r7s72100-pinctrl.h>
107            Integers values in "pinmux" argument list are assembled as:
108            ((PORT * 16 + PIN) | MUX_FUNC << 16)
109
110        input-enable: true
111        output-enable: true
112
113      required:
114        - pinmux
115
116      additionalProperties: false
117
118    - type: object
119      additionalProperties:
120        $ref: '#/additionalProperties/anyOf/0'
121
122examples:
123  - |
124    #include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
125    pinctrl: pinctrl@fcfe3000 {
126            compatible = "renesas,r7s72100-ports";
127
128            reg = <0xfcfe3000 0x4230>;
129
130            /*
131             * A GPIO controller node, controlling 16 pins indexed from 0.
132             * The GPIO controller base in the global pin indexing space is pin
133             * 48, thus pins [0 - 15] on this controller map to pins [48 - 63]
134             * in the global pin indexing space.
135             */
136            port3: gpio-3 {
137                    gpio-controller;
138                    #gpio-cells = <2>;
139                    gpio-ranges = <&pinctrl 0 48 16>;
140            };
141
142            /*
143             * A serial communication interface with a TX output pin and an RX
144             * input pin.
145             * Pin #0 on port #3 is configured as alternate function #6.
146             * Pin #2 on port #3 is configured as alternate function #4.
147             */
148            scif2_pins: serial2 {
149                    pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>;
150            };
151
152            /*
153             * I2c master: both SDA and SCL pins need bi-directional operations
154             * Pin #4 on port #1 is configured as alternate function #1.
155             * Pin #5 on port #1 is configured as alternate function #1.
156             * Both need to work in bi-directional mode, the driver must manage
157             * this internally.
158             */
159            i2c2_pins: i2c2 {
160                    pinmux = <RZA1_PINMUX(1, 4, 1)>, <RZA1_PINMUX(1, 5, 1)>;
161            };
162
163            /*
164             * Multi-function timer input and output compare pins.
165             */
166            tioc0_pins: tioc0 {
167                    /*
168                     * Configure TIOC0A as software driven input
169                     * Pin #0 on port #4 is configured as alternate function #2
170                     * with IO direction specified by software as input.
171                     */
172                    tioc0_input_pins {
173                            pinmux = <RZA1_PINMUX(4, 0, 2)>;
174                            input-enable;
175                    };
176
177                    /*
178                     * Configure TIOC0B as software driven output
179                     * Pin #1 on port #4 is configured as alternate function #1
180                     * with IO direction specified by software as output.
181                     */
182                    tioc0_output_pins {
183                            pinmux = <RZA1_PINMUX(4, 1, 1)>;
184                            output-enable;
185                    };
186            };
187    };