qcom,sm6115-lpass-lpi-pinctrl.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Qualcomm SM6115 SoC LPASS LPI TLMM
  8
  9maintainers:
 10  - Konrad Dybcio <konradybcio@kernel.org>
 11  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
 12
 13description:
 14  Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
 15  (LPASS) Low Power Island (LPI) of Qualcomm SM6115 SoC.
 16
 17properties:
 18  compatible:
 19    oneOf:
 20      - enum:
 21          - qcom,sm6115-lpass-lpi-pinctrl
 22      - items:
 23          - enum:
 24              - qcom,qcm2290-lpass-lpi-pinctrl
 25          - const: qcom,sm6115-lpass-lpi-pinctrl
 26
 27  reg:
 28    items:
 29      - description: LPASS LPI TLMM Control and Status registers
 30      - description: LPASS LPI MCC registers
 31
 32  clocks:
 33    items:
 34      - description: LPASS Audio voting clock
 35
 36  clock-names:
 37    items:
 38      - const: audio
 39
 40patternProperties:
 41  "-state$":
 42    oneOf:
 43      - $ref: "#/$defs/qcom-sm6115-lpass-state"
 44      - patternProperties:
 45          "-pins$":
 46            $ref: "#/$defs/qcom-sm6115-lpass-state"
 47        additionalProperties: false
 48
 49$defs:
 50  qcom-sm6115-lpass-state:
 51    type: object
 52    description:
 53      Pinctrl node's client devices use subnodes for desired pin configuration.
 54      Client device subnodes use below standard properties.
 55    $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
 56    unevaluatedProperties: false
 57
 58    properties:
 59      pins:
 60        description:
 61          List of gpio pins affected by the properties specified in this
 62          subnode.
 63        items:
 64          pattern: "^gpio([0-9]|1[0-8])$"
 65
 66      function:
 67        enum: [ dmic01_clk, dmic01_data, dmic23_clk, dmic23_data, gpio, i2s1_clk,
 68                i2s1_data, i2s1_ws, i2s2_clk, i2s2_data, i2s2_ws, i2s3_clk,
 69                i2s3_data, i2s3_ws, qua_mi2s_data, qua_mi2s_sclk, qua_mi2s_ws,
 70                swr_rx_clk, swr_rx_data, swr_tx_clk, swr_tx_data, wsa_mclk ]
 71        description:
 72          Specify the alternative function to be configured for the specified
 73          pins.
 74
 75allOf:
 76  - $ref: qcom,lpass-lpi-common.yaml#
 77
 78required:
 79  - compatible
 80  - reg
 81  - clocks
 82  - clock-names
 83
 84unevaluatedProperties: false
 85
 86examples:
 87  - |
 88    #include <dt-bindings/sound/qcom,q6afe.h>
 89
 90    lpass_tlmm: pinctrl@a7c0000 {
 91        compatible = "qcom,sm6115-lpass-lpi-pinctrl";
 92        reg = <0x0a7c0000 0x20000>,
 93              <0x0a950000 0x10000>;
 94        clocks = <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
 95        clock-names = "audio";
 96
 97        gpio-controller;
 98        #gpio-cells = <2>;
 99        gpio-ranges = <&lpass_tlmm 0 0 19>;
100    };